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Fix "movnti"

This commit is contained in:
Alan Modra 2001-01-10 00:24:43 +00:00
parent cbcab25653
commit c0e5a443da
2 changed files with 10 additions and 6 deletions
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6
include/opcode/ChangeLog
View File

@ -1,3 +1,7 @@
2001-01-10 Richard Schaal <richard.schaal@intel.com>
* i386.h: Correct movnti instruction.
2001-01-09 Jeff Johnston <jjohnstn@redhat.com> 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
* cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
@ -20,7 +24,7 @@ Sat Dec 30 19:03:15 MET 2000 Jan Hubicka <jh@suse.cz>
add swapgs; disable jmp/call far direct instructions for add swapgs; disable jmp/call far direct instructions for
64bit mode; add syscall and sysret; disable registers for 0xc6 64bit mode; add syscall and sysret; disable registers for 0xc6
template. Add 'q' suffixes to extendable instructions, disable template. Add 'q' suffixes to extendable instructions, disable
obsoletted instructions, add new sign/zero extension ones. obsolete instructions, add new sign/zero extension ones.
(i386_regtab): Add extended registers. (i386_regtab): Add extended registers.
(*Suf): Add No_qSuf. (*Suf): Add No_qSuf.
(q_Suf, wlq_Suf, bwlq_Suf): New. (q_Suf, wlq_Suf, bwlq_Suf): New.

10
include/opcode/i386.h
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@ -951,11 +951,11 @@ static const template i386_optab[] = {
/* Pentium4 extensions. */ /* Pentium4 extensions. */
{"movnti", 2, 0x0fc3, X, CpuP4, lq_Suf|Modrm, { WordReg|WordMem, WordReg, 0 } }, {"movnti", 2, 0x0fc3, X, CpuP4, FP|Modrm, { WordReg, WordMem, 0 } },
{"clflush", 1, 0x0fae, 7, CpuP4, FP|Modrm, { ByteMem, 0, 0 } }, {"clflush", 1, 0x0fae, 7, CpuP4, FP|Modrm, { ByteMem, 0, 0 } },
{"lfence", 0, 0x0fae, 0xe8, CpuP4, FP|ImmExt, { 0, 0, 0 } }, {"lfence", 0, 0x0fae, 0xe8, CpuP4, FP|ImmExt, { 0, 0, 0 } },
{"mfence", 0, 0x0fae, 0xf0, CpuP4, FP|ImmExt, { 0, 0, 0 } }, {"mfence", 0, 0x0fae, 0xf0, CpuP4, FP|ImmExt, { 0, 0, 0 } },
{"pause", 0, 0xf390, X, CpuP4, FP, { 0, 0, 0 } }, {"pause", 0, 0xf390, X, CpuP4, FP, { 0, 0, 0 } },
/* MMX/SSE2 instructions. */ /* MMX/SSE2 instructions. */