* mips/crt0.S: Configure processor based on .MIPS.abiflags.

Remove FPU availability check, just use the pre-processor flags
	to indicicate what the user wanted.
	* mips/abiflags.S: New file.
	* mips/regs.S (SR_MSA): Define macro.
	* mips/mti32.ld: Place .MIPS.abiflags and wrap in marker symbols.
	* mips/mti64.ld: Likewise.
	* mips/mti64_64.ld: Likewise.
	* mips/mti64_n32.ld: Likewise.
This commit is contained in:
Corinna Vinschen
2014-11-28 08:51:03 +00:00
parent d37bfe1da2
commit b3281dd194
8 changed files with 195 additions and 29 deletions

View File

@ -98,6 +98,8 @@
#define SR_SX 0x00000040 /* Supervisor extended addressing enabled */
#define SR_UX 0x00000020 /* User extended addressing enabled */
#define SR_MSA 0x08000000 /* MSA ASE */
/* Standard (R4000) cache operations. Taken from "MIPS R4000
Microprocessor User's Manual" 2nd edition: */