[.]
* configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
This commit is contained in:
DJ Delorie
@@ -1,3 +1,8 @@
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2011-11-01 DJ Delorie <dj@redhat.com>
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* common.h (EM_RL78, EM_78K0R): New.
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* rl78.h: New.
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2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
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* epiphany.h: New file.
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@@ -296,6 +296,8 @@
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#define EM_MICROBLAZE 189 /* Xilinx MicroBlaze 32-bit RISC soft processor core */
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#define EM_CUDA 190 /* NVIDIA CUDA architecture */
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#define EM_TILEGX 191 /* Tilera TILE-Gx multicore architecture family */
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#define EM_RL78 197 /* Renesas RL78 family. */
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#define EM_78K0R 199 /* Renesas 78K0R. */
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/* If it is necessary to assign new unofficial EM_* values, please pick large
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random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision
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118
include/elf/rl78.h
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118
include/elf/rl78.h
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@@ -0,0 +1,118 @@
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/* RL78 ELF support for BFD.
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Copyright (C) 2008, 2009, 2010 Free Software Foundation, Inc.
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This file is part of BFD, the Binary File Descriptor library.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software Foundation,
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Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
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#ifndef _ELF_RL78_H
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#define _ELF_RL78_H
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#include "elf/reloc-macros.h"
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/* Note that there are a few internal relocation types used by the
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linker to do link-time relaxation. If you update this file, please
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check elf32-rl78.c to see if any of the internal relocations need to
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be, er, relocated. */
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/* Preliminary relocations. */
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START_RELOC_NUMBERS (elf_rl78_reloc_type)
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RELOC_NUMBER (R_RL78_NONE, 0x00)
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/* These are for data, and are bi-endian. */
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RELOC_NUMBER (R_RL78_DIR32, 0x01) /* Was: R_RL78_32. */
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RELOC_NUMBER (R_RL78_DIR24S, 0x02) /* Was: R_RL78_24. */
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RELOC_NUMBER (R_RL78_DIR16, 0x03)
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RELOC_NUMBER (R_RL78_DIR16U, 0x04) /* Was: R_RL78_16_UNS. */
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RELOC_NUMBER (R_RL78_DIR16S, 0x05) /* Was: R_RL78_16. */
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RELOC_NUMBER (R_RL78_DIR8, 0x06)
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RELOC_NUMBER (R_RL78_DIR8U, 0x07) /* Was: R_RL78_8_UNS. */
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RELOC_NUMBER (R_RL78_DIR8S, 0x08) /* Was: R_RL78_8. */
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/* Signed pc-relative values. */
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RELOC_NUMBER (R_RL78_DIR24S_PCREL, 0x09) /* Was: R_RL78_24_PCREL. */
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RELOC_NUMBER (R_RL78_DIR16S_PCREL, 0x0a) /* Was: R_RL78_16_PCREL. */
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RELOC_NUMBER (R_RL78_DIR8S_PCREL, 0x0b) /* Was: R_RL78_8_PCREL. */
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/* These are for fields in the instructions. */
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RELOC_NUMBER (R_RL78_DIR16UL, 0x0c)
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RELOC_NUMBER (R_RL78_DIR16UW, 0x0d)
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RELOC_NUMBER (R_RL78_DIR8UL, 0x0e)
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RELOC_NUMBER (R_RL78_DIR8UW, 0x0f)
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RELOC_NUMBER (R_RL78_DIR32_REV, 0x10)
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RELOC_NUMBER (R_RL78_DIR16_REV, 0x11)
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RELOC_NUMBER (R_RL78_DIR3U_PCREL, 0x12)
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/* These are for complex relocs. */
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RELOC_NUMBER (R_RL78_ABS32, 0x41)
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RELOC_NUMBER (R_RL78_ABS24S, 0x42)
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RELOC_NUMBER (R_RL78_ABS16, 0x43)
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RELOC_NUMBER (R_RL78_ABS16U, 0x44)
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RELOC_NUMBER (R_RL78_ABS16S, 0x45)
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RELOC_NUMBER (R_RL78_ABS8, 0x46)
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RELOC_NUMBER (R_RL78_ABS8U, 0x47)
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RELOC_NUMBER (R_RL78_ABS8S, 0x48)
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RELOC_NUMBER (R_RL78_ABS24S_PCREL, 0x49)
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RELOC_NUMBER (R_RL78_ABS16S_PCREL, 0x4a)
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RELOC_NUMBER (R_RL78_ABS8S_PCREL, 0x4b)
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RELOC_NUMBER (R_RL78_ABS16UL, 0x4c)
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RELOC_NUMBER (R_RL78_ABS16UW, 0x4d)
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RELOC_NUMBER (R_RL78_ABS8UL, 0x4e)
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RELOC_NUMBER (R_RL78_ABS8UW, 0x4f)
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RELOC_NUMBER (R_RL78_ABS32_REV, 0x50)
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RELOC_NUMBER (R_RL78_ABS16_REV, 0x51)
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RELOC_NUMBER (R_RL78_SYM, 0x80)
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RELOC_NUMBER (R_RL78_OPneg, 0x81)
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RELOC_NUMBER (R_RL78_OPadd, 0x82)
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RELOC_NUMBER (R_RL78_OPsub, 0x83)
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RELOC_NUMBER (R_RL78_OPmul, 0x84)
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RELOC_NUMBER (R_RL78_OPdiv, 0x85)
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RELOC_NUMBER (R_RL78_OPshla, 0x86)
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RELOC_NUMBER (R_RL78_OPshra, 0x87)
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RELOC_NUMBER (R_RL78_OPsctsize, 0x88)
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RELOC_NUMBER (R_RL78_OPscttop, 0x8d)
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RELOC_NUMBER (R_RL78_OPand, 0x90)
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RELOC_NUMBER (R_RL78_OPor, 0x91)
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RELOC_NUMBER (R_RL78_OPxor, 0x92)
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RELOC_NUMBER (R_RL78_OPnot, 0x93)
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RELOC_NUMBER (R_RL78_OPmod, 0x94)
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RELOC_NUMBER (R_RL78_OPromtop, 0x95)
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RELOC_NUMBER (R_RL78_OPramtop, 0x96)
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END_RELOC_NUMBERS (R_RL78_max)
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#define EF_RL78_CPU_RL78 0x00000079 /* FIXME: correct value? */
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#define EF_RL78_CPU_MASK 0x0000007F /* specific cpu bits. */
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#define EF_RL78_ALL_FLAGS (EF_RL78_CPU_MASK)
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/* Values for the e_flags field in the ELF header. */
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#define E_FLAG_RL78_64BIT_DOUBLES (1 << 0)
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#define E_FLAG_RL78_DSP (1 << 1) /* Defined in the RL78 CPU Object file specification, but not explained. */
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/* These define the addend field of R_RL78_RH_RELAX relocations. */
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#define RL78_RELAXA_IMM6 0x00000010 /* Imm8/16/24/32 at bit offset 6. */
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#define RL78_RELAXA_IMM12 0x00000020 /* Imm8/16/24/32 at bit offset 12. */
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#define RL78_RELAXA_DSP4 0x00000040 /* Dsp0/8/16 at bit offset 4. */
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#define RL78_RELAXA_DSP6 0x00000080 /* Dsp0/8/16 at bit offset 6. */
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#define RL78_RELAXA_DSP14 0x00000100 /* Dsp0/8/16 at bit offset 14. */
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#define RL78_RELAXA_BRA 0x00000200 /* Any type of branch (must be decoded). */
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#define RL78_RELAXA_RNUM 0x0000000f /* Number of associated relocations. */
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/* These mark the place where alignment is requested, and the place where the filler bytes end. */
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#define RL78_RELAXA_ALIGN 0x10000000 /* Start alignment; the remaining bits are the alignment value. */
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#define RL78_RELAXA_ELIGN 0x20000000 /* End alignment; the remaining bits are the alignment value. */
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#define RL78_RELAXA_ANUM 0x00ffffff /* Alignment amount, in bytes (i.e. .balign). */
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#endif /* _ELF_RL78_H */
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