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1999-12-30 Andrew Haley <aph@cygnus.com>

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* mips.h (OPCODE_IS_MEMBER): Add gp32 arg.
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Andrew Haley
2000-02-22 14:39:20 +00:00
parent 9d68ec8b5c
commit 95d64ccd4e
2 changed files with 10 additions and 2 deletions
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4
include/opcode/ChangeLog
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@@ -1,3 +1,7 @@
1999-12-30 Andrew Haley <aph@cygnus.com>
* mips.h (OPCODE_IS_MEMBER): Add gp32 arg.
2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
* i386.h: Qualify intel mode far call and jmp with x_Suf.

8
include/opcode/mips.h
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@@ -320,14 +320,18 @@ struct mips_opcode
/* Toshiba R3900 instruction. */
#define INSN_3900 0x00000080
/* 32-bit code running on a ISA3+ CPU. */
#define INSN_GP32 0x00001000
/* Test for membership in an ISA including chip specific ISAs.
INSN is pointer to an element of the opcode table; ISA is the
specified ISA to test against; and CPU is the CPU specific ISA
to test, or zero if no CPU specific ISA test is desired. */
#define OPCODE_IS_MEMBER(insn,isa,cpu) \
#define OPCODE_IS_MEMBER(insn,isa,cpu,gp32) \
((((insn)->membership & INSN_ISA) != 0 \
&& ((insn)->membership & INSN_ISA) <= isa) \
&& ((insn)->membership & INSN_ISA) <= isa \
&& ((insn)->membership & INSN_GP32 ? gp32 : 1)) \
|| (cpu == 4650 \
&& ((insn)->membership & INSN_4650) != 0) \
|| (cpu == 4010 \