2008-08-14 Jie Zhang <jie.zhang@analog.com>
* bfin/Makefile.in: (top_srcdir): Define.
(mkinstalldirs): Define.
(BOARD_SCRIPTS): Define.
(BOARD_LDFLAGS): Define.
(BOARD_BSP): Define.
(BOARD_CRT0S): Define.
(BOARD_OBJS): Define.
(BOARD_TEST): Define.
(BOARD_INSTALL): Define.
(INCLUDES): Add -I$(srcdir)/include.
(all): Add ${BOARD_CRT0S} and ${BOARD_BSP}.
(.c.S): Remove target.
(crt0.o): New target.
(basiccrt.o): Likewise.
(basiccrtb.o): Likewise.
(basiccrts.o): Likewise.
(basiccrt561.o, basiccrt561s.o, basiccrt561b.o): Likewise
(clean mostlyclean): Remove ${BOARD_BSP}.
(install): Depend on ${BOARD_INSTALL}.
(install-sim): Reformat.
(install-board): New target.
* bfin/basiccrt.S: Remove useless __ADSPBF561_COREB__ in
workaround code for 05000229.
* bfin/syscalls.c (do_syscall): Use `EXCPT 0' instead of
`RAISE 0' for syscall.
* bfin/basiccrt.S: New file.
* bfin/bf5*ld: New file.
* bfin/bfin-common-mc.ld: New file.
* bfin/bfin-common-sc.ld: New file.
* bfin/include/blackfin.h: New file.
* bfin/include/cdefBF5*.h: New file.
* bfin/include/cdef_LPBlackfin.h: New file.
* bfin/include/cdefblackfin.h: New file.
* bfin/include/cplb.h: New file.
* bfin/include/cplbtab.h: New file.
* bfin/include/defBF5*.h: New files.
* bfin/include/def_LPBlackfin.h: New files.
* bfin/include/defblackfin.h: New file.
* bfin/include/sys/_adi_platform.h: New file.
* bfin/include/sys/anomaly_macros_rtl.h: New file.
* bfin/include/sys/excause.h: New file.
* bfin/include/sys/exception.h: New file.
* bfin/include/sys/mc_typedef.h: New file.
* bfin/include/sys/platform.h: New file.
* bfin/include/sys/pll.h: New file.
* bfin/include/sysreg.h: New file.
* libnosys/configure.in (MISSING_SYSCALL_NAMES): Don't define
for bfin.
* libnosys/configure: Regenerate.
This commit is contained in:
Jeff Johnston
142
libgloss/bfin/include/sys/_adi_platform.h
Normal file
142
libgloss/bfin/include/sys/_adi_platform.h
Normal file
@@ -0,0 +1,142 @@
|
||||
/*
|
||||
* The authors hereby grant permission to use, copy, modify, distribute,
|
||||
* and license this software and its documentation for any purpose, provided
|
||||
* that existing copyright notices are retained in all copies and that this
|
||||
* notice is included verbatim in any distributions. No written agreement,
|
||||
* license, or royalty fee is required for any of the authorized uses.
|
||||
* Modifications to this software may be copyrighted by their authors
|
||||
* and need not follow the licensing terms described here, provided that
|
||||
* the new terms are clearly indicated on the first page of each file where
|
||||
* they apply.
|
||||
*/
|
||||
|
||||
/*
|
||||
** Include appropriate header file for platform.
|
||||
** Copyright (C) 2008 Analog Devices, Inc.
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||||
*/
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||||
|
||||
#ifndef __ADI_PLATFORM_H
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||||
#define __ADI_PLATFORM_H
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||||
|
||||
#ifdef __ASSEMBLY__
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||||
|
||||
#if defined (__ADSPBF531__)
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#include <cdefBF531.h>
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||||
#elif defined (__ADSPBF532__)
|
||||
#include <cdefBF532.h>
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||||
#elif defined (__ADSPBF533__)
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#include <cdefBF533.h>
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||||
#elif defined (__ADSPBF534__)
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||||
#include <cdefBF534.h>
|
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#elif defined (__ADSPBF535__)
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||||
#include <cdefBF535.h>
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||||
#elif defined (__ADSPBF536__)
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#include <cdefBF536.h>
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||||
#elif defined (__ADSPBF537__)
|
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#include <cdefBF537.h>
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#elif defined (__ADSPBF538__)
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||||
#include <cdefBF538.h>
|
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#elif defined (__ADSPBF539__)
|
||||
#include <cdefBF539.h>
|
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#elif defined (__ADSPBF561__)
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#include <cdefBF561.h>
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#elif defined (__AD6531__)
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#include <cdefAD6531.h>
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||||
#elif defined (__AD6532__)
|
||||
#include <cdefAD6532.h>
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#elif defined (__AD6723__)
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||||
#include <cdefAD6723.h>
|
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#elif defined (__AD6900__)
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||||
#include <cdefAD6900.h>
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#elif defined (__AD6901__)
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#include <cdefAD6901.h>
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#elif defined (__AD6902__)
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#include <cdefAD6902.h>
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#elif defined (__AD6903__)
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#include <cdefAD6903.h>
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#elif defined (__AD6904__)
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#include <cdefAD6904.h>
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#elif defined (__ADSPBF522__)
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#include <cdefBF522.h>
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#elif defined (__ADSPBF525__)
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#include <cdefBF525.h>
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#elif defined (__ADSPBF527__)
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#include <cdefBF527.h>
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#elif defined (__ADSPBF542__) || defined (__ADSPBF541__)
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#include <cdefBF542.h>
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#elif defined (__ADSPBF544__)
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#include <cdefBF544.h>
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#elif defined (__ADSPBF547__)
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#include <cdefBF547.h>
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#elif defined (__ADSPBF548__)
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#include <cdefBF548.h>
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#elif defined (__ADSPBF549__)
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#include <cdefBF549.h>
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#else
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#error Processor Type Not Supported
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#endif
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|
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|
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#else
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#if defined (__ADSPBF531__)
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#include <defBF531.h>
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#elif defined (__ADSPBF532__)
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#include <defBF532.h>
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#elif defined (__ADSPBF533__)
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#include <defBF533.h>
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#elif defined (__ADSPBF534__)
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#include <defBF534.h>
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#elif defined (__ADSPBF535__)
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#include <defBF535.h>
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#elif defined (__ADSPBF536__)
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#include <defBF536.h>
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#elif defined (__ADSPBF537__)
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#include <defBF537.h>
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#elif defined (__ADSPBF538__)
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#include <defBF538.h>
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#elif defined (__ADSPBF539__)
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#include <defBF539.h>
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#elif defined (__ADSPBF561__)
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#include <defBF561.h>
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#elif defined (__AD6531__)
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#include <defAD6531.h>
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#elif defined (__AD6532__)
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#include <defAD6532.h>
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#elif defined (__AD6723__)
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#include <defAD6723.h>
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#elif defined (__AD6900__)
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#include <defAD6900.h>
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#elif defined (__AD6901__)
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#include <defAD6901.h>
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#elif defined (__AD6902__)
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#include <defAD6902.h>
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#elif defined (__AD6903__)
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#include <defAD6903.h>
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#elif defined (__AD6904__)
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#include <defAD6904.h>
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#elif defined (__ADSPBF522__)
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#include <defBF522.h>
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#elif defined (__ADSPBF525__)
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#include <defBF525.h>
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#elif defined (__ADSPBF527__)
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#include <defBF527.h>
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#elif defined (__ADSPBF542__) || defined (__ADSPBF541__)
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#include <defBF542.h>
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#elif defined (__ADSPBF544__)
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#include <defBF544.h>
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#elif defined (__ADSPBF547__)
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#include <defBF547.h>
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#elif defined (__ADSPBF548__)
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#include <defBF548.h>
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#elif defined (__ADSPBF549__)
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#include <defBF549.h>
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#else
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#error Processor Type Not Supported
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __INC_BLACKFIN__ */
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322
libgloss/bfin/include/sys/anomaly_macros_rtl.h
Normal file
322
libgloss/bfin/include/sys/anomaly_macros_rtl.h
Normal file
@@ -0,0 +1,322 @@
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||||
/*
|
||||
* The authors hereby grant permission to use, copy, modify, distribute,
|
||||
* and license this software and its documentation for any purpose, provided
|
||||
* that existing copyright notices are retained in all copies and that this
|
||||
* notice is included verbatim in any distributions. No written agreement,
|
||||
* license, or royalty fee is required for any of the authorized uses.
|
||||
* Modifications to this software may be copyrighted by their authors
|
||||
* and need not follow the licensing terms described here, provided that
|
||||
* the new terms are clearly indicated on the first page of each file where
|
||||
* they apply.
|
||||
*/
|
||||
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/************************************************************************
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*
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* anomaly_macros_rtl.h : $Revision$
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*
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* Copyright (C) 2008 Analog Devices, Inc.
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*
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* This file defines macros used within the run-time libraries to enable
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* certain anomaly workarounds for the appropriate chips and silicon
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* revisions. Certain macros are defined for silicon-revision none - this
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* is to ensure behaviour is unchanged from libraries supplied with
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* earlier tools versions, where a small number of anomaly workarounds
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* were applied in all library flavours. __FORCE_LEGACY_WORKAROUNDS__
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* is defined in this case.
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*
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* This file defines macros for a subset of all anomalies that may impact
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||||
* the run-time libraries.
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*
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||||
************************************************************************/
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#if !defined(__SILICON_REVISION__)
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#define __FORCE_LEGACY_WORKAROUNDS__
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#endif
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/* 05-00-0096 - PREFETCH, FLUSH, and FLUSHINV must be followed by a CSYNC
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||||
**
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||||
** ADSP-BF531/2/3 - revs 0.0-0.1,
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||||
** ADSP-BF561 - revs 0.0-0.1 (not supported in VDSP++ 4.0)
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||||
**
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||||
*/
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#define WA_05000096 \
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((defined(__ADSPBF531__) || \
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||||
defined(__ADSPBF532__) || \
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||||
defined(__ADSPBF533__) || \
|
||||
defined(__ADSPBF561__)) && \
|
||||
((defined(__SILICON_REVISION__) && \
|
||||
(__SILICON_REVISION__ == 0xffff || __SILICON_REVISION__ <= 0x1)) || \
|
||||
defined(__FORCE_LEGACY_WORKAROUNDS__)))
|
||||
|
||||
|
||||
/* 05-00-0109 - Reserved bits in SYSCFG register not set at power on
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||||
**
|
||||
** ADSP-BF531/2/3 - revs 0.0-0.2 (fixed 0.3)
|
||||
** ADSP-BF561 - revs 0.0-0.2 (fixed 0.3. 0.0, 0.1 not supported in VDSP++ 4.0)
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||||
**
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||||
** Changes to start code.
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||||
*/
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#define WA_05000109 \
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((defined(__ADSPBF531__) || \
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||||
defined(__ADSPBF532__) || \
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||||
defined(__ADSPBF533__) || \
|
||||
defined(__ADSPBF561__)) && \
|
||||
((defined(__SILICON_REVISION__) && \
|
||||
(__SILICON_REVISION__ == 0xffff || __SILICON_REVISION__ <= 0x2)) || \
|
||||
defined(__FORCE_LEGACY_WORKAROUNDS__)))
|
||||
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||||
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||||
/* 05-00-0123 - DTEST_COMMAND initiated memory access may be incorrect if
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** data cache or DMA is active.
|
||||
**
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** ADSP-BF531/2/3 - revs 0.1-0.2 (fixed 0.3)
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||||
** ADSP-BF561 - revs 0.0-0.2 (0.0 and 0.1 not supported in VDSP++ 4.0)
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||||
*/
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#define WA_05000123 \
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((defined(__ADSPBF531__) || \
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||||
defined(__ADSPBF532__) || \
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||||
defined(__ADSPBF533__) || \
|
||||
defined(__ADSPBF561__)) && \
|
||||
((defined(__SILICON_REVISION__) && \
|
||||
(__SILICON_REVISION__ == 0xffff || __SILICON_REVISION__ <= 0x2)) || \
|
||||
defined(__FORCE_LEGACY_WORKAROUNDS__)))
|
||||
|
||||
|
||||
/* 05-00-0125 - Erroneous exception when enabling cache
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||||
**
|
||||
** ADSP-BF531/2/3 - revs 0.1-0.2 (fixed 0.3)
|
||||
** ADSP-BF561 - revs 0.0-0.2 (0.0 and 0.1 not supported in VDSP++ 4.0)
|
||||
**
|
||||
*/
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||||
#define WA_05000125 \
|
||||
((defined(__ADSPBF531__) || \
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||||
defined(__ADSPBF532__) || \
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||||
defined(__ADSPBF533__) || \
|
||||
defined(__ADSPBF561__)) && \
|
||||
((defined(__SILICON_REVISION__) && \
|
||||
(__SILICON_REVISION__ == 0xffff || __SILICON_REVISION__ <= 0x2)) || \
|
||||
defined(__FORCE_LEGACY_WORKAROUNDS__)))
|
||||
|
||||
|
||||
/* 05-00-0137 - DMEM_CONTROL<12> is not set on Reset
|
||||
**
|
||||
** ADSP-BF531/2/3 - revs 0.0-0.2 (fixed 0.3)
|
||||
**
|
||||
** Changes to start code.
|
||||
**
|
||||
*/
|
||||
#define WA_05000137 \
|
||||
((defined(__ADSPBF531__) || \
|
||||
defined(__ADSPBF532__) || \
|
||||
defined(__ADSPBF533__)) && \
|
||||
((defined(__SILICON_REVISION__) && \
|
||||
(__SILICON_REVISION__ == 0xffff || __SILICON_REVISION__ <= 0x2)) || \
|
||||
defined(__FORCE_LEGACY_WORKAROUNDS__)))
|
||||
|
||||
|
||||
/* 05-00-0158 - "Boot fails when data cache enabled: Data from a Data Cache
|
||||
** fill can be corrupted after or during instruction DMA if certain core
|
||||
** stalls exist"
|
||||
**
|
||||
** Impacted:
|
||||
** BF533/3/1 : 0.0-0.4 (fixed 0.5)
|
||||
**
|
||||
** The workaround we have only works for si-revisions >= 0.3. No workaround for
|
||||
** ealier revisions.
|
||||
*/
|
||||
#define WA_05000158 \
|
||||
((defined(__ADSPBF531__) || \
|
||||
defined(__ADSPBF532__) || \
|
||||
defined(__ADSPBF533__)) && \
|
||||
((defined(__SILICON_REVISION__) && \
|
||||
(__SILICON_REVISION__ == 0xffff || \
|
||||
(__SILICON_REVISION__ >= 0x3 && \
|
||||
__SILICON_REVISION__ < 0x5))) || \
|
||||
defined(__FORCE_LEGACY_WORKAROUNDS__)))
|
||||
|
||||
|
||||
/* 05-00-0204 - "Incorrect data read with write-through cache and
|
||||
** allocate cache lines on reads only mode.
|
||||
**
|
||||
** This problem is cache related with high speed clocks. It apparently does
|
||||
** not impact BF531 and BF532 because they cannot run at high enough clock
|
||||
** to cause the anomaly. We build libs for BF532 though so that means we will
|
||||
** need to do the workaround for BF532 and BF531 also.
|
||||
**
|
||||
** Also the 0.3 to 0.4 revision is not an inflexion for libs BF532 and BF561.
|
||||
** This means a RT check may be required to avoid doing the WA for 0.4.
|
||||
**
|
||||
** Impacted:
|
||||
** BF533 - 0.0-0.3 (fixed 0.4)
|
||||
** BF534 - 0.0 (fixed 0.1)
|
||||
** BF536 - 0.0 (fixed 0.1)
|
||||
** BF537 - 0.0 (fixed 0.1)
|
||||
** BF538 - 0.0 (fixed 0.1)
|
||||
** BF539 - 0.0 (fixed 0.1)
|
||||
** BF561 - 0.0-0.3 (fixed 0.4)
|
||||
*/
|
||||
#if defined(__ADI_LIB_BUILD__)
|
||||
# define __BUILDBF53123 1 /* building one single library for BF531/2/3 */
|
||||
#else
|
||||
# define __BUILDBF53123 0
|
||||
#endif
|
||||
|
||||
#define WA_05000204 \
|
||||
((((__BUILDBF53123==1 && \
|
||||
(defined(__ADSPBF531__) || defined(__ADSPBF532__))) || \
|
||||
(defined(__ADSPBF533__) || defined(__ADSPBF561__))) && \
|
||||
(defined(__SILICON_REVISION__) && \
|
||||
(__SILICON_REVISION__ == 0xffff || __SILICON_REVISION__ <= 0x3))) || \
|
||||
((defined(__ADSPBF534__) || defined(__ADSPBF536__) || \
|
||||
defined(__ADSPBF537__) || defined(__ADSPBF538__) || \
|
||||
defined(__ADSPBF539__)) && \
|
||||
(defined(__SILICON_REVISION__) && \
|
||||
(__SILICON_REVISION__ == 0xffff || __SILICON_REVISION__ == 0x0))))
|
||||
|
||||
#if ((defined(__ADSPBF531__) || defined(__ADSPBF532__) || \
|
||||
defined(__ADSPBF533__) || defined(__ADSPBF561__)) && \
|
||||
(defined(__SILICON_REVISION__) && \
|
||||
(__SILICON_REVISION__ == 0xffff || __SILICON_REVISION__ == 0x3)))
|
||||
/* check at RT for 0.4 revs when doing 204 workaround */
|
||||
# define WA_05000204_CHECK_AVOID_FOR_REV <=3
|
||||
#elif ((defined(__ADSPBF534__) || defined(__ADSPBF536__) || \
|
||||
defined(__ADSPBF537__) || defined(__ADSPBF538__) || \
|
||||
defined(__ADSPBF539__)) && \
|
||||
(defined(__SILICON_REVISION__) && \
|
||||
(__SILICON_REVISION__ == 0xffff || __SILICON_REVISION__ == 0x0)))
|
||||
/* check at RT for 0.4 revs when doing 204 workaround */
|
||||
# define WA_05000204_CHECK_AVOID_FOR_REV <1
|
||||
#else
|
||||
/* do not check at RT for 0.4 revs when doing 204 workaround */
|
||||
#endif
|
||||
|
||||
/* 05-00-0258 - "Instruction Cache is corrupted when bit 9 and 12 of
|
||||
* the ICPLB Data registers differ"
|
||||
*
|
||||
* When bit 9 and bit 12 of the ICPLB Data MMR differ, the cache may
|
||||
* not update properly. For example, for a particular cache line,
|
||||
* the cache tag may be valid while the contents of that cache line
|
||||
* are not present in the cache.
|
||||
*
|
||||
* Impacted:
|
||||
*
|
||||
* BF531/2/3 - 0.0-0.4 (fixed 0.5)
|
||||
* BF534/6/7/8/9 - 0.0-0.2 (fixed 0.3)
|
||||
* BF561 - 0.0-0.4 (fixed 0.5)
|
||||
* BF535/AD6532/AD6900 - all revs
|
||||
*/
|
||||
|
||||
#define WA_05000258 \
|
||||
defined(__SILICON_REVISION__) && \
|
||||
(__SILICON_REVISION__ == 0xffff || \
|
||||
!defined(__ADSPLPBLACKFIN__) || \
|
||||
((defined(__ADSPBF531__) || \
|
||||
defined(__ADSPBF532__) || \
|
||||
defined(__ADSPBF533__)) && \
|
||||
(__SILICON_REVISION__ <= 0x4)) || \
|
||||
((defined(__ADSPBF534__) || \
|
||||
defined(__ADSPBF536__) || \
|
||||
defined(__ADSPBF537__) || \
|
||||
defined(__ADSPBF538__) || \
|
||||
defined(__ADSPBF539__)) && \
|
||||
(__SILICON_REVISION__ <= 0x2)) || \
|
||||
((defined(__ADSPBF561__)) && \
|
||||
(__SILICON_REVISION__ <= 0x4)) || \
|
||||
((defined(__ADSPBF561__)) && \
|
||||
(__SILICON_REVISION__ < 0x1)))
|
||||
|
||||
/* 05-00-0259 - "Non-deterministic ICPLB descriptors delivered to
|
||||
* hardware". Whenever ICPLBs are disabled via an MMR write, immediately
|
||||
* follow this write with a CSYNC, and locate the MMR write and CSYNC
|
||||
* within the same aligned 64 bit word.
|
||||
*
|
||||
* This problem impacts all revisions of Blackfins.
|
||||
*/
|
||||
|
||||
#define WA_05000259 \
|
||||
(defined(__ADSPBLACKFIN__) && defined(__SILICON_REVISION__))
|
||||
|
||||
|
||||
/* 05-00-0261 - "DCPLB_FAULT_ADDR MMR may be corrupted".
|
||||
* The DCPLB_FAULT_ADDR MMR may contain the fault address of a
|
||||
* aborted memory access which generated both a protection exception
|
||||
* and a stall.
|
||||
*
|
||||
* We work around this by initially ignoring a DCPLB miss exception
|
||||
* on the assumption that the faulting address might be invalid.
|
||||
* We return without servicing. The exception will be raised
|
||||
* again when the faulting instruction is re-executed. The fault
|
||||
* address is correct this time round so the miss exception can
|
||||
* be serviced as normal. The only complication is we have to
|
||||
* ensure that we are about to service the same miss rather than
|
||||
* a miss raised within a higher-priority interrupt handler, where
|
||||
* the fault address could again be invalid. We therefore record
|
||||
* the last seen RETX and only service an exception when RETX and
|
||||
* the last seen RETX are equal.
|
||||
*
|
||||
* This problem impacts:
|
||||
* BF531/2/3 - rev 0.0-0.4 (fixed 0.5)
|
||||
* BF534/6/7/8/9 - rev 0.0-0.2 (fixed 0.3)
|
||||
* BF561 - rev 0.0-0.4 (fixed 0.5)
|
||||
*
|
||||
*/
|
||||
|
||||
#define WA_05000261 \
|
||||
defined(__SILICON_REVISION__) && \
|
||||
(__SILICON_REVISION__ == 0xffff || \
|
||||
((defined(__ADSPBF531__) || \
|
||||
defined(__ADSPBF532__) || \
|
||||
defined(__ADSPBF533__)) && \
|
||||
(__SILICON_REVISION__ <= 0x4)) || \
|
||||
((defined(__ADSPBF534__) || \
|
||||
defined(__ADSPBF536__) || \
|
||||
defined(__ADSPBF537__) || \
|
||||
defined(__ADSPBF538__) || \
|
||||
defined(__ADSPBF539__)) && \
|
||||
(__SILICON_REVISION__ <= 0x2)) || \
|
||||
((defined(__ADSPBF561__)) && \
|
||||
(__SILICON_REVISION__ <= 0x4)) || \
|
||||
((defined(__ADSPBF561__)) && \
|
||||
(__SILICON_REVISION__ < 0x1)))
|
||||
|
||||
/* 05-00-0229 - "SPI Slave Boot Mode Modifies Registers".
|
||||
* When the SPI slave boot completes, the final DMA IRQ is cleared
|
||||
* but the DMA5_CONFIG and SPI_CTL registers are not reset to their
|
||||
* default states.
|
||||
*
|
||||
* We work around this by resetting the registers to their default
|
||||
* values at the beginning of the CRT. The only issue would be when
|
||||
* users boot from flash and make use of the DMA or serial port.
|
||||
* In this case, users would need to modify the CRT.
|
||||
*
|
||||
* This problem impacts all revisions of ADSP-BF531/2/3/8/9
|
||||
*/
|
||||
|
||||
#define WA_05000229 \
|
||||
(defined(__ADSPBLACKFIN__) && defined (__SILICON_REVISION__) && \
|
||||
(defined(__ADSPBF531__) || defined(__ADSPBF532__) || \
|
||||
defined(__ADSPBF533__) || defined(__ADSPBF538__) || \
|
||||
defined(__ADSPBF539__)))
|
||||
|
||||
/* 05-00-0283 - "A system MMR write is stalled indefinitely when killed in a
|
||||
* particular stage".
|
||||
*
|
||||
* Where an interrupt occurs killing a stalled system MMR write, and the ISR
|
||||
* executes an SSYNC, execution execution may stall indefinitely".
|
||||
*
|
||||
* The workaround is to execute a mispredicted jump over a dummy MMR read,
|
||||
* thus killing the read. Also to avoid a system MMR write in two slots
|
||||
* after a not predicted conditional jump.
|
||||
*
|
||||
* This problem impacts:
|
||||
* BF531/2/3 - all revs
|
||||
* BF534/6/7/8/9 - all revs
|
||||
* BF561/6 - all revs
|
||||
*/
|
||||
|
||||
#define WA_05000283 \
|
||||
defined(__ADSPLPBLACKFIN__) && defined(__SILICON_REVISION__)
|
||||
|
||||
|
||||
93
libgloss/bfin/include/sys/excause.h
Normal file
93
libgloss/bfin/include/sys/excause.h
Normal file
@@ -0,0 +1,93 @@
|
||||
/*
|
||||
* The authors hereby grant permission to use, copy, modify, distribute,
|
||||
* and license this software and its documentation for any purpose, provided
|
||||
* that existing copyright notices are retained in all copies and that this
|
||||
* notice is included verbatim in any distributions. No written agreement,
|
||||
* license, or royalty fee is required for any of the authorized uses.
|
||||
* Modifications to this software may be copyrighted by their authors
|
||||
* and need not follow the licensing terms described here, provided that
|
||||
* the new terms are clearly indicated on the first page of each file where
|
||||
* they apply.
|
||||
*/
|
||||
|
||||
/************************************************************************
|
||||
*
|
||||
* excause.h
|
||||
*
|
||||
* Copyright (C) 2008 Analog Devices, Inc.
|
||||
*
|
||||
************************************************************************/
|
||||
|
||||
/*
|
||||
** Definitions of constants for the four user-level bits in EXCAUSE,
|
||||
** the field from SYSSTAT that is set when the EXCPT instruction is
|
||||
** invoked.
|
||||
*/
|
||||
|
||||
#ifndef _EXCAUSE_H
|
||||
#define _EXCAUSE_H
|
||||
|
||||
/*
|
||||
** Value 0x0 - exit program. (halt)
|
||||
** R0 => exit status.
|
||||
*/
|
||||
|
||||
#define EX_EXIT_PROG 0x0
|
||||
|
||||
/*
|
||||
** Value 0x1 - abnormal exit (abort)
|
||||
*/
|
||||
|
||||
#define EX_ABORT_PROG 0x1
|
||||
|
||||
/*
|
||||
** Value 0x2 - invoke system service.
|
||||
** R0 => command.
|
||||
** R1 => first arg
|
||||
** R2 => second arg
|
||||
*/
|
||||
|
||||
#define EX_SYS_REQ 0x2
|
||||
|
||||
/*
|
||||
** Available commands:
|
||||
*/
|
||||
|
||||
#define EX_SYSREQ_NONE 0x00 /* Do nothing */
|
||||
#define EX_SYSREQ_REG_ISR 0x01 /* Register an interrupt handler.
|
||||
R1==EVT entry, R2==func ptr
|
||||
Returns previous entry in R0. */
|
||||
#define EX_SYSREQ_RAISE_INT 0x02 /* Cause an interrupt
|
||||
R1 = int number */
|
||||
/*
|
||||
** Values 0x3 to 0x4 currently undefined.
|
||||
*/
|
||||
|
||||
/*
|
||||
** Value 0x5 - File I/O
|
||||
** R0 => first arg
|
||||
** R1 => second arg
|
||||
** R2 => third arg
|
||||
** R4 => command
|
||||
** result => R0
|
||||
*/
|
||||
|
||||
#define EX_FILE_IO 0x5
|
||||
|
||||
/*
|
||||
** Available commands:
|
||||
** XXX stdout/stderr are handled separately for writing.
|
||||
*/
|
||||
|
||||
#define EX_FILEIO_OPEN 0x00 /* R0 => dev, R1=> path, R2=>mode */
|
||||
#define EX_FILEIO_CLOSE 0x01 /* R0=> fid */
|
||||
#define EX_FILEIO_WRITE 0x02 /* R0=>fid, R1=>data, R2=>length */
|
||||
#define EX_FILEIO_READ 0x03 /* R0=>fid, R1=>data, R2=>length */
|
||||
#define EX_FILEIO_SEEK 0x04 /* R0=>fid, R1=>offset, R2=>mode */
|
||||
#define EX_FILEIO_DUP 0x05 /* R0=>fid */
|
||||
|
||||
/*
|
||||
** Values 0x6 to 0xF currently undefined.
|
||||
*/
|
||||
|
||||
#endif /* _EXCAUSE_H */
|
||||
260
libgloss/bfin/include/sys/exception.h
Normal file
260
libgloss/bfin/include/sys/exception.h
Normal file
@@ -0,0 +1,260 @@
|
||||
/*
|
||||
* The authors hereby grant permission to use, copy, modify, distribute,
|
||||
* and license this software and its documentation for any purpose, provided
|
||||
* that existing copyright notices are retained in all copies and that this
|
||||
* notice is included verbatim in any distributions. No written agreement,
|
||||
* license, or royalty fee is required for any of the authorized uses.
|
||||
* Modifications to this software may be copyrighted by their authors
|
||||
* and need not follow the licensing terms described here, provided that
|
||||
* the new terms are clearly indicated on the first page of each file where
|
||||
* they apply.
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
#ifndef __NO_BUILTIN
|
||||
#pragma system_header /* exception.h */
|
||||
#endif
|
||||
/************************************************************************
|
||||
*
|
||||
* exception.h
|
||||
*
|
||||
* Copyright (C) 2008 Analog Devices, Inc.
|
||||
*
|
||||
************************************************************************/
|
||||
|
||||
#ifndef _EXCEPTION_H
|
||||
#define _EXCEPTION_H
|
||||
|
||||
#ifdef _MISRA_RULES
|
||||
#pragma diag(push)
|
||||
#pragma diag(suppress:misra_rule_5_7)
|
||||
#pragma diag(suppress:misra_rule_6_3)
|
||||
#pragma diag(suppress:misra_rule_19_4)
|
||||
#pragma diag(suppress:misra_rule_19_7)
|
||||
#pragma diag(suppress:misra_rule_19_10)
|
||||
#pragma diag(suppress:misra_rule_19_13)
|
||||
#endif /* _MISRA_RULES */
|
||||
|
||||
|
||||
|
||||
/*
|
||||
** Definitions for user-friendly interrupt handling.
|
||||
*/
|
||||
|
||||
/*
|
||||
** Memory-Mapped Registers (MMRs) - these record what causes address
|
||||
** exceptions.
|
||||
*/
|
||||
|
||||
#define EX_DATA_FAULT_STATUS 0xFFE00008
|
||||
#define EX_DATA_FAULT_ADDR 0xFFE0000C
|
||||
#define EX_CODE_FAULT_STATUS 0xFFE01008
|
||||
#define EX_CODE_FAULT_ADDR 0xFFE0100C
|
||||
|
||||
/*
|
||||
** Event Vector Table
|
||||
*/
|
||||
|
||||
#define EX_EVENT_VECTOR_TABLE 0xFFE02000
|
||||
|
||||
/*
|
||||
** Meaning of the various bits in EXCAUSE field in SEQSTAT register.
|
||||
*/
|
||||
|
||||
#define EX_BITS 0x3F /* All EXCAUSE bits */
|
||||
#define EX_TYPE 0x30 /* The bits which define the type */
|
||||
#define EX_DEBUG 0x10 /* If set, is a debug exception type */
|
||||
#define EX_SYS 0x20 /* If set, is a system exception type */
|
||||
/* If neither set, is from EXCPT instr */
|
||||
|
||||
#define EX_IS_DEBUG_EXCEPTION(E) (((E)&EX_TYPE)==EX_DEBUG)
|
||||
#define EX_IS_SYSTEM_EXCEPTION(E) (((E)&EX_TYPE)==EX_SYS)
|
||||
#define EX_IS_USER_EXCEPTION(E) (((E)&EX_TYPE)==0)
|
||||
|
||||
/*
|
||||
** Service exceptions continue from the instruction after the one
|
||||
** that raised the exception.
|
||||
** Error exceptions restart the instruction that raised the exception.
|
||||
*/
|
||||
|
||||
#define EX_IS_SERVICE_EXCEPTION(E) (!EX_IS_SYSTEM_EXCEPTION(E))
|
||||
#define EX_IS_ERROR_EXCEPTION(E) (EX_IS_SYSTEM_EXCEPTION(E))
|
||||
|
||||
#define EX_DB_SINGLE_STEP 0x10 /* Processor is single-stepping */
|
||||
#define EX_DB_EMTRCOVRFLW 0x11 /* Emulation Trace buffer overflowed */
|
||||
|
||||
#define EX_SYS_UNDEFINSTR 0x21 /* Undefined instruction */
|
||||
#define EX_SYS_ILLINSTRC 0x22 /* Illegal instruction combination */
|
||||
#define EX_SYS_DCPLBPROT 0x23 /* Data CPLB Protection violation */
|
||||
#define EX_SYS_DALIGN 0x24 /* Data access misaligned address violation */
|
||||
#define EX_SYS_UNRECEVT 0x25 /* Unrecoverable event */
|
||||
#define EX_SYS_DCPLBMISS 0x26 /* Data access CPLB Miss */
|
||||
#define EX_SYS_DCPLBMHIT 0x27 /* Data access CPLB Multiple Hits */
|
||||
#define EX_SYS_EMWATCHPT 0x28 /* Emulation watch point match */
|
||||
#define EX_SYS_CACCESSEX 0x29 /* Code fetch access exception */
|
||||
#define EX_SYS_CALIGN 0x2A /* Attempted misaligned instr cache fetch */
|
||||
#define EX_SYS_CCPLBPROT 0x2B /* Code fetch CPLB Protection */
|
||||
#define EX_SYS_CCPLBMISS 0x2C /* CPLB miss on an instruction fetch */
|
||||
#define EX_SYS_CCPLBMHIT 0x2D /* Code fetch CPLB Multiple Hits */
|
||||
#define EX_SYS_ILLUSESUP 0x2E /* Illegal use of Supervisor Resource */
|
||||
|
||||
/*
|
||||
** Meaning of the various bits in HWERRCAUSE in SEQSTAT
|
||||
*/
|
||||
|
||||
#define EX_HWBITS (0x1F<<14) /* bits 18:14 */
|
||||
|
||||
#if !defined(__ADSPLPBLACKFIN__)
|
||||
#define EX_HW_NOMEM1 (0x16<<14)
|
||||
#define EX_HW_NOMEM2 (0x17<<14)
|
||||
#else
|
||||
#define EX_HW_SYSMMR (0x02<<14)
|
||||
#define EX_HW_EXTMEM (0x03<<14)
|
||||
#endif
|
||||
#define EX_HW_DMAHIT (0x01<<14)
|
||||
#define EX_HW_PERFMON (0x12<<14)
|
||||
#define EX_HW_RAISE (0x18<<14)
|
||||
|
||||
/*
|
||||
** Meaning of the bits in DATA_FAULT_STATUS and CODE_FAULT_STATUS
|
||||
*/
|
||||
|
||||
#define EX_DATA_FAULT_ILLADDR (1<<19) /* non-existent memory */
|
||||
#define EX_DATA_FAULT_DAG (1<<18) /* 0=>DAG0, 1=>DAG1 */
|
||||
#define EX_DATA_FAULT_USERSUPV (1<<17) /* 0=>user mode, 1=> supervisor */
|
||||
#define EX_DATA_FAULT_READWRITE (1<<16) /* 0=>read, 1=>write */
|
||||
#define EX_DATA_FAULT_CPLB 0xFFFF /* 0=>CPLB0, 1=>CPLB1, etc */
|
||||
|
||||
#define EX_CODE_FAULT_ILLADDR (1<<19) /* non-existent memory */
|
||||
#define EX_CODE_FAULT_USERSUPV (1<<17) /* 0=>user mode, 1=> supervisor */
|
||||
#define EX_CODE_FAULT_CPLB 0xFFFF /* 0=>CPLB0, 1=>CPLB1, etc */
|
||||
|
||||
/*
|
||||
** The kinds of interrupt that can occur. These are also the
|
||||
** indices into the Event Vector Table.
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
typedef enum {
|
||||
ik_err=-1,
|
||||
ik_emulation,
|
||||
ik_reset,
|
||||
ik_nmi,
|
||||
ik_exception,
|
||||
ik_global_int_enable,
|
||||
ik_hardware_err,
|
||||
ik_timer,
|
||||
ik_ivg7,
|
||||
ik_ivg8,
|
||||
ik_ivg9,
|
||||
ik_ivg10,
|
||||
ik_ivg11,
|
||||
ik_ivg12,
|
||||
ik_ivg13,
|
||||
ik_ivg14,
|
||||
ik_ivg15,
|
||||
num_interrupt_kind
|
||||
} interrupt_kind;
|
||||
|
||||
/*
|
||||
** Structure for recording details of an exception or interrupt
|
||||
** that has occurred.
|
||||
*/
|
||||
|
||||
typedef struct {
|
||||
interrupt_kind kind; /* whether interrupt, exception, etc. */
|
||||
int value; /* interrupt number, exception type, etc. */
|
||||
void *pc; /* PC at point where exception occurred */
|
||||
void *addr; /* if an address faulted, which one. */
|
||||
unsigned status; /* if an address faulted, why. */
|
||||
} interrupt_info;
|
||||
|
||||
/*
|
||||
** Macro for defining an interrupt routine
|
||||
*/
|
||||
|
||||
typedef void (*ex_handler_fn)();
|
||||
|
||||
#define EX_HANDLER(KIND,NAME) \
|
||||
_Pragma(#KIND) \
|
||||
void NAME ()
|
||||
|
||||
#define EX_HANDLER_PROTO(KIND, NAME) EX_HANDLER(KIND, NAME)
|
||||
|
||||
#define EX_INTERRUPT_HANDLER(NAME) EX_HANDLER(interrupt,NAME)
|
||||
#define EX_EXCEPTION_HANDLER(NAME) EX_HANDLER(exception,NAME)
|
||||
#define EX_NMI_HANDLER(NAME) EX_HANDLER(nmi,NAME)
|
||||
#define EX_REENTRANT_HANDLER(NAME) \
|
||||
_Pragma("interrupt_reentrant") \
|
||||
EX_HANDLER(interrupt,NAME)
|
||||
|
||||
/*
|
||||
** A convenience function for setting up the interrupt_info contents.
|
||||
** Must be called from immediately with the interrupt handler.
|
||||
*/
|
||||
|
||||
void get_interrupt_info(interrupt_kind int_kind, interrupt_info *int_info);
|
||||
|
||||
/*
|
||||
** Diagnostics function for reporting unexpected events.
|
||||
*/
|
||||
|
||||
void _ex_report_event(interrupt_info *int_info);
|
||||
|
||||
/*
|
||||
** Register an interrupt handler within the EVT.
|
||||
** Return previous value if there was one.
|
||||
*/
|
||||
ex_handler_fn register_handler(interrupt_kind int_kind, ex_handler_fn handler);
|
||||
|
||||
/*
|
||||
** Some magic values for registering default and null handlers.
|
||||
*/
|
||||
|
||||
#define EX_INT_DEFAULT ((ex_handler_fn)-1)
|
||||
#define EX_INT_IGNORE ((ex_handler_fn)0)
|
||||
|
||||
/*
|
||||
** Extended function to register an interrupt handler within the EVT.
|
||||
** Returns the old handler.
|
||||
**
|
||||
** If enabled == EX_INT_ALWAYS_ENABLE, install fn (if fn != EX_INT_IGNORE
|
||||
** and fn != EX_INT_DISABLE), and then enable the interrupt in IMASK then
|
||||
** return
|
||||
**
|
||||
** If fn == EX_INT_IGNORE, disable the interrupt
|
||||
** If fn == EX_INT_DEFAULT, delete the handler entry in the EVT and disable
|
||||
** the interrupt in IMASK
|
||||
** Otherwise, install the new interrupt handler. Then,
|
||||
** If enabled == EX_INT_DISABLE, disable the interrupt in IMASK
|
||||
** If enabled == EX_INT_ENABLE, enable the interrupt in IMASK
|
||||
** otherwise leave the interrupt status alone.
|
||||
*/
|
||||
ex_handler_fn register_handler_ex(interrupt_kind kind, ex_handler_fn fn,
|
||||
int enable);
|
||||
|
||||
/* Constants for the enabled parameter of register_handler_ex */
|
||||
#define EX_INT_DISABLE 0
|
||||
#define EX_INT_ENABLE 1
|
||||
#define EX_INT_KEEP_IMASK -1
|
||||
#define EX_INT_ALWAYS_ENABLE 2
|
||||
|
||||
/*
|
||||
** Allow the user to raise exceptions from C.
|
||||
*/
|
||||
|
||||
int raise_interrupt(interrupt_kind kind, int which,
|
||||
int cmd, int arg1, int arg2);
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* extern "C" */
|
||||
#endif
|
||||
|
||||
#ifdef _MISRA_RULES
|
||||
#pragma diag(pop)
|
||||
#endif /* _MISRA_RULES */
|
||||
|
||||
#endif /* _EXCEPTION_H */
|
||||
38
libgloss/bfin/include/sys/mc_typedef.h
Normal file
38
libgloss/bfin/include/sys/mc_typedef.h
Normal file
@@ -0,0 +1,38 @@
|
||||
/*
|
||||
* The authors hereby grant permission to use, copy, modify, distribute,
|
||||
* and license this software and its documentation for any purpose, provided
|
||||
* that existing copyright notices are retained in all copies and that this
|
||||
* notice is included verbatim in any distributions. No written agreement,
|
||||
* license, or royalty fee is required for any of the authorized uses.
|
||||
* Modifications to this software may be copyrighted by their authors
|
||||
* and need not follow the licensing terms described here, provided that
|
||||
* the new terms are clearly indicated on the first page of each file where
|
||||
* they apply.
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
#ifndef __NO_BUILTIN
|
||||
#pragma system_header /* sys/mc_typedef.h */
|
||||
#endif
|
||||
/************************************************************************
|
||||
*
|
||||
* sys/mc_typedef.h
|
||||
*
|
||||
* Copyright (C) 2008 Analog Devices, Inc.
|
||||
*
|
||||
************************************************************************/
|
||||
|
||||
/* Define testset_t. */
|
||||
|
||||
#ifndef _SYS_MC_TYPEDEF_H
|
||||
#define _SYS_MC_TYPEDEF_H
|
||||
|
||||
#if !defined(__ADSPLPBLACKFIN__)
|
||||
typedef volatile unsigned char testset_t;
|
||||
#elif defined(__WORKAROUND_TESTSET_ALIGN) /* require 32-bit aligned address */
|
||||
typedef volatile unsigned int testset_t;
|
||||
#else
|
||||
typedef volatile unsigned short testset_t;
|
||||
#endif
|
||||
|
||||
#endif /* _SYS_MC_TYPEDEF_H */
|
||||
19
libgloss/bfin/include/sys/platform.h
Normal file
19
libgloss/bfin/include/sys/platform.h
Normal file
@@ -0,0 +1,19 @@
|
||||
/*
|
||||
* The authors hereby grant permission to use, copy, modify, distribute,
|
||||
* and license this software and its documentation for any purpose, provided
|
||||
* that existing copyright notices are retained in all copies and that this
|
||||
* notice is included verbatim in any distributions. No written agreement,
|
||||
* license, or royalty fee is required for any of the authorized uses.
|
||||
* Modifications to this software may be copyrighted by their authors
|
||||
* and need not follow the licensing terms described here, provided that
|
||||
* the new terms are clearly indicated on the first page of each file where
|
||||
* they apply.
|
||||
*/
|
||||
|
||||
#ifndef _PLATFORM_H
|
||||
#define _PLATFORM_H
|
||||
/* Generic Wrapper for platform specific header file.
|
||||
Copyright (C) 2008 Analog Devices, Inc.
|
||||
*/
|
||||
#include <sys/_adi_platform.h>
|
||||
#endif
|
||||
84
libgloss/bfin/include/sys/pll.h
Normal file
84
libgloss/bfin/include/sys/pll.h
Normal file
@@ -0,0 +1,84 @@
|
||||
/*
|
||||
* The authors hereby grant permission to use, copy, modify, distribute,
|
||||
* and license this software and its documentation for any purpose, provided
|
||||
* that existing copyright notices are retained in all copies and that this
|
||||
* notice is included verbatim in any distributions. No written agreement,
|
||||
* license, or royalty fee is required for any of the authorized uses.
|
||||
* Modifications to this software may be copyrighted by their authors
|
||||
* and need not follow the licensing terms described here, provided that
|
||||
* the new terms are clearly indicated on the first page of each file where
|
||||
* they apply.
|
||||
*/
|
||||
|
||||
/************************************************************************
|
||||
*
|
||||
* pll.h
|
||||
*
|
||||
* Copyright (C) 2008 Analog Devices, Inc.
|
||||
*
|
||||
************************************************************************/
|
||||
|
||||
#ifdef __ASSEMBLY__
|
||||
#pragma once
|
||||
#pragma system_header
|
||||
#endif
|
||||
|
||||
#ifndef _PLL_H
|
||||
#define _PLL_H
|
||||
|
||||
#ifdef _MISRA_RULES
|
||||
#pragma diag(push)
|
||||
#pragma diag(suppress:misra_rule_6_3)
|
||||
#endif /* _MISRA_RULES */
|
||||
|
||||
#define NO_STARTUP_SET 0
|
||||
#define MAX_IN_STARTUP 1
|
||||
|
||||
#ifdef __ASSEMBLY__
|
||||
|
||||
enum clkctrl_t {
|
||||
/* no modification of PLL rates in CRT startup - default */
|
||||
no_startup_set=NO_STARTUP_SET,
|
||||
|
||||
/* CRT startup sets PLL rates to suitable maximum values */
|
||||
max_in_startup=MAX_IN_STARTUP
|
||||
};
|
||||
|
||||
/*
|
||||
** Define __clk_ctrl to 1 to cause startup to set PLL rates for maximum
|
||||
** speed performance rates. The default version defined in the runtime-
|
||||
** libraries defines __clk_ctrl to 0 which disables the feature.
|
||||
*/
|
||||
extern enum clkctrl_t __clk_ctrl;
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if defined(__ADSPLPBLACKFIN__)
|
||||
|
||||
/* Sets SSEL and CSEL bits in PLL_DIV to passed values.
|
||||
** Returns -1 on failure.
|
||||
*/
|
||||
int pll_set_system_clocks(int _csel, int _ssel);
|
||||
|
||||
/*
|
||||
** Sets MSEL and DF bits in PLL_CTL and LOCKCNT in PLL_LOCKCNT.
|
||||
** Returns -1 on failure.
|
||||
*/
|
||||
int pll_set_system_vco(int _msel, int _df, int _lockcnt);
|
||||
|
||||
#endif /* __ADSPLPBLACKFIN__ */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#ifdef _MISRA_RULES
|
||||
#pragma diag(pop)
|
||||
#endif /* _MISRA_RULES */
|
||||
|
||||
#endif /* _PLL_H */
|
||||
|
||||
Reference in New Issue
Block a user