diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 9a97ab600..33719b5e4 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,7 @@
+2008-11-06  Chao-ying Fu  <fu@mips.com>
+
+	* mips.h: Doucument '1' for 5-bit sync type.
+
 2008-08-28  H.J. Lu  <hongjiu.lu@intel.com>
 
 	* ia64.h (ia64_resource_specifier): Add IA64_RS_CR_IIB.  Update
diff --git a/include/opcode/mips.h b/include/opcode/mips.h
index 8d201f62e..9af9ea15b 100644
--- a/include/opcode/mips.h
+++ b/include/opcode/mips.h
@@ -262,6 +262,7 @@ struct mips_opcode
 
    Each of these characters corresponds to a mask field defined above.
 
+   "1" 5 bit sync type (OP_*_SHAMT)
    "<" 5 bit shift amount (OP_*_SHAMT)
    ">" shift amount between 32 and 63, stored after subtracting 32 (OP_*_SHAMT)
    "a" 26 bit target address (OP_*_TARGET)
@@ -401,7 +402,7 @@ struct mips_opcode
    "+"  Start of extension sequence.
 
    Characters used so far, for quick reference when adding more:
-   "234567890"
+   "1234567890"
    "%[]<>(),+:'@!$*&"
    "ABCDEFGHIJKLMNOPQRSTUVWXYZ"
    "abcdefghijklopqrstuvwxz"