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binutils/ChangeLog: 

* doc/binutils.texi: Document -Mvirt disassembler option.

gas/ChangeLog:
* config/tc-mips.c (struct mips_set_options): New ase_virt field.
(mips_opts): Update for the new field.
(file_ase_virt): New variable.
(ISA_SUPPORTS_VIRT_ASE): New macro.
(ISA_SUPPORTS_VIRT64_ASE): New macro.
(MIPS_CPU_ASE_VIRT): New define.
(is_opcode_valid): Handle ase_virt.
(macro_build): Handle "+J".
(validate_mips_insn): Likewise.
(mips_ip): Likewise.
(enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
(md_longopts): Add mvirt and mnovirt
(md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
(mips_after_parse_args): Handle ase_virt field.
(s_mipsset): Handle "virt" and "novirt".
(mips_elf_final_processing): Add a comment about virt ASE might need a new flag.
(md_show_usage): Print out the usage of -mvirt and mno-virt options.
* doc/c-mips.texi: Document -mvirt and -mno-virt.
Document ".set virt" and ".set novirt".

gas/testsuite/ChangeLog:
* gas/mips/mips.exp: Run virt and virt64 testcases.
* gas/mips/virt.d: New file.
* gas/mips/virt.s: New file.
* gas/mips/virt64.d: New file.
* gas/mips/virt64.s: New file.

include/opcode/ChangeLog:
* mips.h (OP_MASK_CODE10): Correct definition.
(OP_SH_CODE10): Likewise.
Add a comment that "+J" is used now for OP_*CODE10.
(INSN_ASE_MASK): Update.
(INSN_VIRT): New macro.
(INSN_VIRT64): New macro

opcodes/ChangeLog:
* mips-dis.c (mips_arch_choices): Add INSN_VIRT to mips32r2 .
Add INSN_VIRT and INSN_VIRT64 to mips64r2.
(parse_mips_dis_option): Handle the virt option.
(print_insn_args): Handle "+J".
(print_mips_disassembler_options): Print out message about virt64.
* mips-opc.c (IVIRT): New define.
(IVIRT64): New define.
(mips_builtin_opcodes): Add dmfgc0, dmtgc0, hypcall, mfgc0, mtgc0,
tlbgr, tlbgwi, tlbginv, tlbginvf, tlbgwr, tlbgp VIRT instructions.
Move rfe to the bottom as it conflicts with tlbgp.
This commit is contained in:
Andrew Pinski 2013-05-10 01:08:48 +00:00
parent 1b7ad41e50
commit 4367acc471
2 changed files with 22 additions and 4 deletions
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9
include/opcode/ChangeLog
View File

@ -1,3 +1,12 @@
2013-05-09 Andrew Pinski <apinski@cavium.com>
* mips.h (OP_MASK_CODE10): Correct definition.
(OP_SH_CODE10): Likewise.
Add a comment that "+J" is used now for OP_*CODE10.
(INSN_ASE_MASK): Update.
(INSN_VIRT): New macro.
(INSN_VIRT64): New macro
2013-05-02 Nick Clifton <nickc@redhat.com>
* msp430.h: Add patterns for MSP430X instructions.

17
include/opcode/mips.h
View File

@ -212,6 +212,10 @@
#define OP_OP_SDC2 0x3e
#define OP_OP_SDC3 0x3f /* a.k.a. sd */
/* MIPS VIRT ASE */
#define OP_MASK_CODE10 0x3ff
#define OP_SH_CODE10 11
/* Values in the 'VSEL' field. */
#define MDMX_FMTSEL_IMM_QH 0x1d
#define MDMX_FMTSEL_IMM_OB 0x1e
@ -255,8 +259,6 @@
of the operand handling in GAS. The fields below only exist
in the microMIPS encoding, so define each one to have an empty
range. */
#define OP_MASK_CODE10 0
#define OP_SH_CODE10 0
#define OP_MASK_TRAP 0
#define OP_SH_TRAP 0
#define OP_MASK_OFFSET10 0
@ -486,6 +488,9 @@ struct mips_opcode
"~" 12 bit offset (OP_*_OFFSET12)
"\" 3 bit position for aset and aclr (OP_*_3BITPOS)
VIRT ASE usage:
"+J" 10-bit hypcall code (OP_*CODE10)
UDI immediates:
"+1" UDI immediate bits 6-10
"+2" UDI immediate bits 6-15
@ -528,7 +533,7 @@ struct mips_opcode
Extension character sequences used so far ("+" followed by the
following), for quick reference when adding more:
"1234"
"ABCDEFGHIPQSTXZ"
"ABCDEFGHIJPQSTXZ"
"abcpstxz"
*/
@ -726,7 +731,7 @@ static const unsigned int mips_isa_table[] =
#define INSN_OCTEON2 0x00000100
/* Masks used for MIPS-defined ASEs. */
#define INSN_ASE_MASK 0x3c00f010
#define INSN_ASE_MASK 0x3c00f0d0
/* DSP ASE */
#define INSN_DSP 0x00001000
@ -735,6 +740,10 @@ static const unsigned int mips_isa_table[] =
/* MIPS R5900 instruction */
#define INSN_5900 0x00004000
/* Virtualization ASE */
#define INSN_VIRT 0x00000080
#define INSN_VIRT64 0x00000040
/* MIPS-3D ASE */
#define INSN_MIPS3D 0x00008000