Store entire context for or1k
- Store the exception program counter (from EPCR) and exception status register (from ESR) also during the exception. A runtime system may replace them thereby to implement a thread switch. * or1k/exception-asm.S: Store missing state
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@ -1,3 +1,7 @@
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2015-05-26 Stefan Wallentowitz <stefan.wallentowitz@tum.de>
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* or1k/exception-asm.S: Store missing state
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2015-05-26 Stefan Wallentowitz <stefan.wallentowitz@tum.de>
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2015-05-26 Stefan Wallentowitz <stefan.wallentowitz@tum.de>
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* or1k/crt0.S: Fix exception stack frame
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* or1k/crt0.S: Fix exception stack frame
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@ -73,6 +73,10 @@ _or1k_exception_handler:
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l.sw GPR_BUF_OFFSET(29)(r1),r29
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l.sw GPR_BUF_OFFSET(29)(r1),r29
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l.sw GPR_BUF_OFFSET(30)(r1),r30
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l.sw GPR_BUF_OFFSET(30)(r1),r30
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l.sw GPR_BUF_OFFSET(31)(r1),r31
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l.sw GPR_BUF_OFFSET(31)(r1),r31
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l.mfspr r14,r0,OR1K_SPR_SYS_EPCR_BASE
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l.sw 0x80(r1),r14
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l.mfspr r14,r0,OR1K_SPR_SYS_ESR_BASE
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l.sw 0x84(r1),r14
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/* Replace impure pointer for exception */
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/* Replace impure pointer for exception */
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l.movhi r20,hi(_or1k_exception_impure_ptr)
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l.movhi r20,hi(_or1k_exception_impure_ptr)
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@ -156,6 +160,12 @@ _or1k_exception_handler:
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l.sw 0(r21),r20
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l.sw 0(r21),r20
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/* Restore state */
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/* Restore state */
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l.lwz r2,0x80(r1)
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l.mtspr r0,r2,OR1K_SPR_SYS_EPCR_BASE
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l.lwz r2,0x84(r1)
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l.mtspr r0,r2,OR1K_SPR_SYS_ESR_BASE
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l.lwz r2,GPR_BUF_OFFSET(2)(r1)
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l.lwz r2,GPR_BUF_OFFSET(2)(r1)
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l.lwz r3,GPR_BUF_OFFSET(3)(r1)
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l.lwz r3,GPR_BUF_OFFSET(3)(r1)
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l.lwz r4,GPR_BUF_OFFSET(4)(r1)
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l.lwz r4,GPR_BUF_OFFSET(4)(r1)
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