2006-11-24 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com> * mips/crt0.S (_start): Use all available float registers. Don't touch SR_PE on post-mips2 CPUs, it means soft reset there.
This commit is contained in:
parent
124b187f16
commit
406a0e047c
|
@ -1,3 +1,9 @@
|
||||||
|
2006-11-24 Thiemo Seufer <ths@mips.com>
|
||||||
|
Nigel Stephens <nigel@mips.com>
|
||||||
|
|
||||||
|
* mips/crt0.S (_start): Use all available float registers. Don't touch
|
||||||
|
SR_PE on post-mips2 CPUs, it means soft reset there.
|
||||||
|
|
||||||
2006-11-22 Luca Barbato <lu_zero@gentoo.org>
|
2006-11-22 Luca Barbato <lu_zero@gentoo.org>
|
||||||
|
|
||||||
* spu/syscalls.c: Include spu_intrinsics.h to provide vector keyword.
|
* spu/syscalls.c: Include spu_intrinsics.h to provide vector keyword.
|
||||||
|
|
|
@ -65,11 +65,21 @@ _start:
|
||||||
nop
|
nop
|
||||||
move s0,$31
|
move s0,$31
|
||||||
#endif
|
#endif
|
||||||
#if !defined(__mips64) || (__mips_fpr==32)
|
#if __mips<3
|
||||||
#define STATUS_MASK (SR_CU1|SR_PE)
|
# define STATUS_MASK (SR_CU1|SR_PE)
|
||||||
#else
|
#else
|
||||||
# For mips3 or mips4, turn on 64-bit addressing and additional float regs
|
/* Post-mips2 has no SR_PE bit. */
|
||||||
#define STATUS_MASK (SR_CU1|SR_PE|SR_FR|SR_KX|SR_SX|SR_UX)
|
# ifdef __mips64
|
||||||
|
/* Turn on 64-bit addressing and additional float regs. */
|
||||||
|
# define STATUS_MASK (SR_CU1|SR_FR|SR_KX|SR_SX|SR_UX)
|
||||||
|
# else
|
||||||
|
# ifdef __mips_fpr=32
|
||||||
|
# define STATUS_MASK (SR_CU1)
|
||||||
|
# else
|
||||||
|
/* Turn on additional float regs. */
|
||||||
|
# define STATUS_MASK (SR_CU1|SR_FR)
|
||||||
|
# endif
|
||||||
|
# endif
|
||||||
#endif
|
#endif
|
||||||
li v0, STATUS_MASK
|
li v0, STATUS_MASK
|
||||||
mtc0 v0, C0_SR
|
mtc0 v0, C0_SR
|
||||||
|
|
Loading…
Reference in New Issue