2006-11-24 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com> * mips/crt0.S (_start): Use all available float registers. Don't touch SR_PE on post-mips2 CPUs, it means soft reset there.
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@ -1,3 +1,9 @@
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2006-11-24 Thiemo Seufer <ths@mips.com>
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Nigel Stephens <nigel@mips.com>
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* mips/crt0.S (_start): Use all available float registers. Don't touch
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SR_PE on post-mips2 CPUs, it means soft reset there.
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2006-11-22 Luca Barbato <lu_zero@gentoo.org>
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2006-11-22 Luca Barbato <lu_zero@gentoo.org>
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* spu/syscalls.c: Include spu_intrinsics.h to provide vector keyword.
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* spu/syscalls.c: Include spu_intrinsics.h to provide vector keyword.
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@ -65,11 +65,21 @@ _start:
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nop
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nop
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move s0,$31
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move s0,$31
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#endif
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#endif
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#if !defined(__mips64) || (__mips_fpr==32)
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#if __mips<3
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# define STATUS_MASK (SR_CU1|SR_PE)
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# define STATUS_MASK (SR_CU1|SR_PE)
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#else
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#else
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# For mips3 or mips4, turn on 64-bit addressing and additional float regs
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/* Post-mips2 has no SR_PE bit. */
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#define STATUS_MASK (SR_CU1|SR_PE|SR_FR|SR_KX|SR_SX|SR_UX)
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# ifdef __mips64
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/* Turn on 64-bit addressing and additional float regs. */
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# define STATUS_MASK (SR_CU1|SR_FR|SR_KX|SR_SX|SR_UX)
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# else
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# ifdef __mips_fpr=32
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# define STATUS_MASK (SR_CU1)
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# else
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/* Turn on additional float regs. */
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# define STATUS_MASK (SR_CU1|SR_FR)
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# endif
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# endif
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#endif
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#endif
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li v0, STATUS_MASK
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li v0, STATUS_MASK
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mtc0 v0, C0_SR
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mtc0 v0, C0_SR
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