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libgloss: bfin: sync headers to VDSP 5.0 Update 8

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A new release of VDSP means syncing random updates to the libgloss headers.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Michael Frysinger
2010-10-17 23:52:49 +00:00
parent 0e66e62668
commit 1cfc2fea73
83 changed files with 952 additions and 405 deletions
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31
libgloss/bfin/include/defBF539.h
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@@ -11,7 +11,7 @@
*/
/*
** Copyright (C) 2008, 2009 Analog Devices, Inc.
** Copyright (C) 2006-2009 Analog Devices Inc., All Rights Reserved.
**
************************************************************************************
**
@@ -29,6 +29,7 @@
#pragma diag(push)
#pragma diag(suppress:misra_rule_19_4:"some macros violate rule 19.4")
#pragma diag(suppress:misra_rule_19_7:"Allow function-like macros ")
#include <stdint.h>
#endif /* _MISRA_RULES */
/*********************************************************************************** */
@@ -1643,26 +1644,26 @@
/* Usage: *pSIC_IAR1 |= PX_IVG(11, 8); // Sets Peripheral #11 to IVG8 */
#endif /* _MISRA_RULES */
/* SIC_IMASKx Masks */
#define SIC_UNMASK_ALL 0x00000000 /* Unmask all peripheral interrupts */
#define SIC_MASK_ALL 0xFFFFFFFF /* Mask all peripheral interrupts */
/* SIC_IMASKx Masks*/
#define SIC_UNMASK_ALL 0x00000000 /* Unmask all peripheral interrupts */
#define SIC_MASK_ALL 0xFFFFFFFF /* Mask all peripheral interrupts */
#ifdef _MISRA_RULES
#define SIC_MASK(x) (1 << ((x)&0x1Fu)) /* Mask Peripheral #x interrupt */
#define SIC_UNMASK(x) (0xFFFFFFFFu ^ (1 << ((x)&0x1Fu))) /* Unmask Peripheral #x interrupt */
#define SIC_MASK(x) ((int32_t)1 << ((x)&0x1Fu)) /* Mask Peripheral #x interrupt */
#define SIC_UNMASK(x) (0xFFFFFFFFu ^ ((uint32_t)1 << ((x)&0x1Fu))) /*Unmask Peripheral #x interrupt*/
#else
#define SIC_MASK(x) (1 << ((x)&0x1F)) /* Mask Peripheral #x interrupt */
#define SIC_UNMASK(x) (0xFFFFFFFF ^ (1 << ((x)&0x1F))) /* Unmask Peripheral #x interrupt */
#define SIC_MASK(x) (1 << ((x)&0x1F)) /* Mask Peripheral #x interrupt */
#define SIC_UNMASK(x) (0xFFFFFFFF ^ (1 << ((x)&0x1F))) /* Unmask Peripheral #x interrupt */
#endif /* _MISRA_RULES */
/* SIC_IWRx Masks */
#define IWR_DISABLE_ALL 0x00000000 /* Wakeup Disable all peripherals */
#define IWR_ENABLE_ALL 0xFFFFFFFF /* Wakeup Enable all peripherals */
/* SIC_IWRx Masks*/
#define IWR_DISABLE_ALL 0x00000000 /* Wakeup Disable all peripherals */
#define IWR_ENABLE_ALL 0xFFFFFFFF /* Wakeup Enable all peripherals */
#ifdef _MISRA_RULES
#define IWR_ENABLE(x) (1 << ((x)&0x1Fu)) /* Wakeup Enable Peripheral #x */
#define IWR_DISABLE(x) (0xFFFFFFFFu ^ (1 << ((x)&0x1Fu))) /* Wakeup Disable Peripheral #x */
#define IWR_ENABLE(x) ((int32_t)1 << ((x)&0x1Fu)) /* Wakeup Enable Peripheral #x */
#define IWR_DISABLE(x) (0xFFFFFFFFu ^ ((uint32_t)1 << ((x)&0x1Fu))) /*Wakeup Disable Peripheral #x */
#else
#define IWR_ENABLE(x) (1 << ((x)&0x1F)) /* Wakeup Enable Peripheral #x */
#define IWR_DISABLE(x) (0xFFFFFFFF ^ (1 << ((x)&0x1F))) /* Wakeup Disable Peripheral #x */
#define IWR_ENABLE(x) (1 << ((x)&0x1F)) /* Wakeup Enable Peripheral #x */
#define IWR_DISABLE(x) (0xFFFFFFFF ^ (1 << ((x)&0x1F))) /* Wakeup Disable Peripheral #x */
#endif /* _MISRA_RULES */