diff --git a/include/coff/ChangeLog b/include/coff/ChangeLog
index bc1c92210..936cefa88 100644
--- a/include/coff/ChangeLog
+++ b/include/coff/ChangeLog
@@ -1,3 +1,25 @@
+2007-08-02  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* pe.h (IMAGE_SCN_ALIGN_POWER_BIT_POS): New.
+	(IMAGE_SCN_ALIGN_POWER_BIT_MASK): Likewise.
+	(IMAGE_SCN_ALIGN_POWER_NUM): Likewise.
+	(IMAGE_SCN_ALIGN_POWER_CONST): Likewise.
+	(IMAGE_SCN_ALIGN_128BYTES): Likewise.
+	(IMAGE_SCN_ALIGN_256BYTES): Likewise.
+	(IMAGE_SCN_ALIGN_512BYTES): Likewise.
+	(IMAGE_SCN_ALIGN_1024BYTES): Likewise.
+	(IMAGE_SCN_ALIGN_2048BYTES): Likewise.
+	(IMAGE_SCN_ALIGN_4096BYTES): Likewise.
+	(IMAGE_SCN_ALIGN_8192BYTES): Likewise.
+	(IMAGE_SCN_ALIGN_1BYTES): Redefined with
+	IMAGE_SCN_ALIGN_POWER_CONST.
+	(IMAGE_SCN_ALIGN_2BYTES): Likewise.
+	(IMAGE_SCN_ALIGN_4BYTES): Likewise.
+	(IMAGE_SCN_ALIGN_8BYTES): Likewise.
+	(IMAGE_SCN_ALIGN_16BYTES): Likewise.
+	(IMAGE_SCN_ALIGN_32BYTES): Likewise.
+	(IMAGE_SCN_ALIGN_64BYTES): Likewise.
+
 2007-07-12  Kai Tietz   <kai.tietz@onevision.com>
 
 	* internal.h (struct internal_syment): Use bfd_hostptr_t for
diff --git a/include/coff/pe.h b/include/coff/pe.h
index 277621cd4..5a4d96027 100644
--- a/include/coff/pe.h
+++ b/include/coff/pe.h
@@ -66,13 +66,29 @@
 #define IMAGE_SCN_MEM_LOCKED                 0x00040000
 #define IMAGE_SCN_MEM_PRELOAD                0x00080000
 
-#define IMAGE_SCN_ALIGN_1BYTES               0x00100000
-#define IMAGE_SCN_ALIGN_2BYTES               0x00200000
-#define IMAGE_SCN_ALIGN_4BYTES               0x00300000
-#define IMAGE_SCN_ALIGN_8BYTES               0x00400000
-#define IMAGE_SCN_ALIGN_16BYTES              0x00500000  /* Default alignment if no others are specified. */
-#define IMAGE_SCN_ALIGN_32BYTES              0x00600000
-#define IMAGE_SCN_ALIGN_64BYTES              0x00700000
+/* Bit position in the s_flags field where the alignment values start. */
+#define IMAGE_SCN_ALIGN_POWER_BIT_POS	     20
+#define IMAGE_SCN_ALIGN_POWER_BIT_MASK	     0x00f00000
+#define IMAGE_SCN_ALIGN_POWER_NUM(val)	     \
+  (((val) >> IMAGE_SCN_ALIGN_POWER_BIT_POS) - 1)
+#define IMAGE_SCN_ALIGN_POWER_CONST(val)     \
+  (((val) + 1) << IMAGE_SCN_ALIGN_POWER_BIT_POS)
+
+#define IMAGE_SCN_ALIGN_1BYTES		     IMAGE_SCN_ALIGN_POWER_CONST (0)
+#define IMAGE_SCN_ALIGN_2BYTES		     IMAGE_SCN_ALIGN_POWER_CONST (1)
+#define IMAGE_SCN_ALIGN_4BYTES		     IMAGE_SCN_ALIGN_POWER_CONST (2)
+#define IMAGE_SCN_ALIGN_8BYTES		     IMAGE_SCN_ALIGN_POWER_CONST (3)
+/* Default alignment if no others are specified. */
+#define IMAGE_SCN_ALIGN_16BYTES		     IMAGE_SCN_ALIGN_POWER_CONST (4)
+#define IMAGE_SCN_ALIGN_32BYTES		     IMAGE_SCN_ALIGN_POWER_CONST (5)
+#define IMAGE_SCN_ALIGN_64BYTES		     IMAGE_SCN_ALIGN_POWER_CONST (6)
+#define IMAGE_SCN_ALIGN_128BYTES	     IMAGE_SCN_ALIGN_POWER_CONST (7)
+#define IMAGE_SCN_ALIGN_256BYTES	     IMAGE_SCN_ALIGN_POWER_CONST (8)
+#define IMAGE_SCN_ALIGN_512BYTES	     IMAGE_SCN_ALIGN_POWER_CONST (9)
+#define IMAGE_SCN_ALIGN_1024BYTES	     IMAGE_SCN_ALIGN_POWER_CONST (10)
+#define IMAGE_SCN_ALIGN_2048BYTES	     IMAGE_SCN_ALIGN_POWER_CONST (11)
+#define IMAGE_SCN_ALIGN_4096BYTES	     IMAGE_SCN_ALIGN_POWER_CONST (12)
+#define IMAGE_SCN_ALIGN_8192BYTES	     IMAGE_SCN_ALIGN_POWER_CONST (13)
 
 #define IMAGE_SCN_LNK_NRELOC_OVFL            0x01000000  /* Section contains extended relocations. */
 #define IMAGE_SCN_MEM_NOT_CACHED             0x04000000  /* Section is not cachable.               */