2003-04-01 17:50:31 +02:00
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/* Xtensa configuration settings.
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2003-06-30 23:56:32 +02:00
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Copyright (C) 2001,2002,2003 Free Software Foundation, Inc.
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2003-04-01 17:50:31 +02:00
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Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica.
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2003-04-02 18:55:26 +02:00
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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2003-04-01 17:50:31 +02:00
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2003-04-02 18:55:26 +02:00
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This program is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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2003-04-01 17:50:31 +02:00
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2003-04-02 18:55:26 +02:00
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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2003-04-01 17:50:31 +02:00
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#ifndef XTENSA_CONFIG_H
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#define XTENSA_CONFIG_H
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/* The macros defined here match those with the same names in the Xtensa
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compile-time HAL (Hardware Abstraction Layer). Please refer to the
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Xtensa System Software Reference Manual for documentation of these
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macros. */
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2003-07-10 07:11:16 +02:00
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#undef XCHAL_HAVE_BE
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2003-04-01 17:50:31 +02:00
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#define XCHAL_HAVE_BE 1
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#undef XCHAL_HAVE_DENSITY
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2003-04-01 17:50:31 +02:00
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#define XCHAL_HAVE_DENSITY 1
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2003-07-10 07:11:16 +02:00
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#undef XCHAL_HAVE_CONST16
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2003-06-30 23:56:32 +02:00
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#define XCHAL_HAVE_CONST16 0
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2003-07-10 07:11:16 +02:00
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#undef XCHAL_HAVE_ABS
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2003-06-30 23:56:32 +02:00
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#define XCHAL_HAVE_ABS 1
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#undef XCHAL_HAVE_ADDX
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2003-06-30 23:56:32 +02:00
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#define XCHAL_HAVE_ADDX 1
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2003-07-10 07:11:16 +02:00
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#undef XCHAL_HAVE_L32R
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2003-06-30 23:56:32 +02:00
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#define XCHAL_HAVE_L32R 1
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#undef XCHAL_HAVE_MAC16
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#define XCHAL_HAVE_MAC16 0
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#undef XCHAL_HAVE_MUL16
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2003-04-01 17:50:31 +02:00
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#define XCHAL_HAVE_MUL16 0
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#undef XCHAL_HAVE_MUL32
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2003-04-01 17:50:31 +02:00
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#define XCHAL_HAVE_MUL32 0
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#undef XCHAL_HAVE_DIV32
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#define XCHAL_HAVE_DIV32 0
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#undef XCHAL_HAVE_NSA
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2003-04-01 17:50:31 +02:00
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#define XCHAL_HAVE_NSA 1
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#undef XCHAL_HAVE_MINMAX
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#define XCHAL_HAVE_MINMAX 0
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#undef XCHAL_HAVE_SEXT
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#define XCHAL_HAVE_SEXT 0
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#undef XCHAL_HAVE_LOOPS
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#define XCHAL_HAVE_LOOPS 1
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#undef XCHAL_HAVE_BOOLEANS
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#define XCHAL_HAVE_BOOLEANS 0
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#undef XCHAL_HAVE_FP
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#define XCHAL_HAVE_FP 0
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#undef XCHAL_HAVE_FP_DIV
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#define XCHAL_HAVE_FP_DIV 0
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#undef XCHAL_HAVE_FP_RECIP
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#define XCHAL_HAVE_FP_RECIP 0
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#undef XCHAL_HAVE_FP_SQRT
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#define XCHAL_HAVE_FP_SQRT 0
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#undef XCHAL_HAVE_FP_RSQRT
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#define XCHAL_HAVE_FP_RSQRT 0
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#undef XCHAL_HAVE_WINDOWED
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#define XCHAL_HAVE_WINDOWED 1
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2003-07-10 07:11:16 +02:00
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#undef XCHAL_ICACHE_SIZE
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2003-04-01 17:50:31 +02:00
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#define XCHAL_ICACHE_SIZE 8192
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2003-07-10 07:11:16 +02:00
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#undef XCHAL_DCACHE_SIZE
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#define XCHAL_DCACHE_SIZE 8192
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#undef XCHAL_ICACHE_LINESIZE
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#define XCHAL_ICACHE_LINESIZE 16
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#undef XCHAL_DCACHE_LINESIZE
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#define XCHAL_DCACHE_LINESIZE 16
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#undef XCHAL_ICACHE_LINEWIDTH
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#define XCHAL_ICACHE_LINEWIDTH 4
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#undef XCHAL_DCACHE_LINEWIDTH
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#define XCHAL_DCACHE_LINEWIDTH 4
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#undef XCHAL_DCACHE_IS_WRITEBACK
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#define XCHAL_DCACHE_IS_WRITEBACK 0
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2003-07-10 07:11:16 +02:00
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#undef XCHAL_HAVE_MMU
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#define XCHAL_HAVE_MMU 1
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#undef XCHAL_MMU_MIN_PTE_PAGE_SIZE
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#define XCHAL_MMU_MIN_PTE_PAGE_SIZE 12
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2003-07-10 07:11:16 +02:00
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#undef XCHAL_HAVE_DEBUG
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#define XCHAL_HAVE_DEBUG 1
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#undef XCHAL_NUM_IBREAK
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#define XCHAL_NUM_IBREAK 2
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#undef XCHAL_NUM_DBREAK
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#define XCHAL_NUM_DBREAK 2
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#undef XCHAL_DEBUGLEVEL
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#define XCHAL_DEBUGLEVEL 4
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2003-07-10 07:11:16 +02:00
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#undef XCHAL_EXTRA_SA_SIZE
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#define XCHAL_EXTRA_SA_SIZE 0
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#undef XCHAL_EXTRA_SA_ALIGN
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#define XCHAL_EXTRA_SA_ALIGN 1
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2003-04-01 17:50:31 +02:00
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#endif /* !XTENSA_CONFIG_H */
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