377 lines
8.2 KiB
C
377 lines
8.2 KiB
C
/*
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* This file is part of Jehanne.
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*
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* Copyright (C) 2015-2016 Giacomo Tesio <giacomo@tesio.it>
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*
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* Jehanne is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, version 2 of the License.
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*
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* Jehanne is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with Jehanne. If not, see <http://www.gnu.org/licenses/>.
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*/
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typedef struct BIOS32si BIOS32si;
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typedef struct BIOS32ci BIOS32ci;
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typedef struct Fxsave Fxsave;
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typedef struct IOConf IOConf;
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typedef struct ISAConf ISAConf;
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typedef struct Label Label;
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typedef struct Lock Lock;
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typedef struct LockEntry LockEntry;
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typedef struct MCPU MCPU;
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typedef struct MFPU MFPU;
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typedef struct MMMU MMMU;
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typedef struct Mach Mach;
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typedef uint64_t Mpl;
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typedef Mpl Mreg; /* GAK */
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typedef struct Ptpage Ptpage;
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typedef struct Pcidev Pcidev;
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typedef struct PFPU PFPU;
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typedef struct PMMU PMMU;
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typedef struct PNOTIFY PNOTIFY;
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typedef struct PPAGE PPAGE;
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typedef uint64_t PTE;
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typedef struct Proc Proc;
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typedef struct Sys Sys;
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typedef uint64_t uintmem; /* horrible name */
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typedef struct Ureg Ureg;
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typedef struct Vctl Vctl;
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#pragma incomplete BIOS32si
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#pragma incomplete Ureg
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#define MAXSYSARG 5 /* for mount(fd, afd, mpt, flag, arg) */
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/*
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* parameters for sysproc.c
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*/
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#define AOUT_MAGIC (S_MAGIC)
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#define ELF_MAGIC (ELF_MAG)
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/*
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* machine dependent definitions used by ../port/portdat.h
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*/
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struct Lock
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{
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LockEntry* head;
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LockEntry* e;
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};
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struct Label
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{
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uintptr_t sp;
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uintptr_t pc;
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uintptr_t regs[14];
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};
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struct Fxsave {
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uint16_t fcw; /* x87 control word */
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uint16_t fsw; /* x87 status word */
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uint8_t ftw; /* x87 tag word */
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uint8_t zero; /* 0 */
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uint16_t fop; /* last x87 opcode */
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uint64_t rip; /* last x87 instruction pointer */
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uint64_t rdp; /* last x87 data pointer */
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uint32_t mxcsr; /* MMX control and status */
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uint32_t mxcsrmask; /* supported MMX feature bits */
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uint8_t st[128]; /* shared 64-bit media and x87 regs */
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uint8_t xmm[256]; /* 128-bit media regs */
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uint8_t ign[96]; /* reserved, ignored */
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};
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/*
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* FPU stuff in Proc
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*/
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struct PFPU {
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int fpustate;
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uint8_t fxsave[sizeof(Fxsave)+15];
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void* fpusave;
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};
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struct Ptpage
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{
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PTE* pte; /* kernel-addressible page table entries */
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uintmem pa; /* physical address (from physalloc) */
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Ptpage* next; /* next in level's set, or free list */
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Ptpage* parent; /* parent page table page or page directory */
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uint32_t ptoff; /* index of this table's entry in parent */
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};
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/*
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* MMU stuff in Proc
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*/
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struct PMMU
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{
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Ptpage* mmuptp[4]; /* page table pages for each level */
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Ptpage* ptpfree;
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int nptpbusy;
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};
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/*
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* MMU stuff in Page
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*/
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struct PPAGE
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{
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uint8_t* nothing;
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};
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/*
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* things saved in the Proc structure during a notify
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*/
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struct PNOTIFY
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{
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char emptiness;
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};
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struct IOConf
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{
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int nomsi;
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int nolegacyprobe; /* acpi tells us. all negated in case acpi unavailable */
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int noi8042kbd;
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int novga;
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int nocmos;
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};
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extern IOConf ioconf;
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#define MAXMDOM 8 /* maximum memory/cpu domains */
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#include "../port/portdat.h"
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/*
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* CPU stuff in Mach.
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*/
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struct MCPU {
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uint32_t cpuinfo[2][4]; /* CPUID instruction output E[ABCD]X */
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int ncpuinfos; /* number of standard entries */
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int ncpuinfoe; /* number of extended entries */
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int isintelcpu; /* */
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};
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/*
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* FPU stuff in Mach.
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*/
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struct MFPU {
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uint16_t fcw; /* x87 control word */
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uint32_t mxcsr; /* MMX control and status */
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uint32_t mxcsrmask; /* supported MMX feature bits */
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};
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/*
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* MMU stuff in Mach.
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*/
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enum
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{
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NPGSZ = 4
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};
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struct MMMU
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{
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Ptpage* pml4; /* pml4 for this processor */
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PTE* pmap; /* unused as of yet */
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Ptpage* ptpfree; /* per-mach free list */
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int nptpfree;
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uint32_t pgszlg2[NPGSZ]; /* per Mach or per Sys? */
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uintmem pgszmask[NPGSZ];
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uint32_t pgsz[NPGSZ];
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int npgsz;
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Ptpage pml4kludge;
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};
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/*
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* Per processor information.
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*
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* The offsets of the first few elements may be known
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* to low-level assembly code, so do not re-order:
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* machno - no dependency, convention
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* splpc - splhi, spllo, splx
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* proc - syscallentry
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*/
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struct Mach
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{
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uint64_t machno; /* physical id of processor */
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uint64_t splpc; /* pc of last caller to splhi */
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Proc* proc; /* current process on this processor */
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int apicno;
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int online;
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int mode; /* fold into online? GAK */
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void* dbgreg; /* registers for debugging this processor */
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void* dbgsp; /* sp for debugging this processor */
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MMMU;
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uintptr_t stack;
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uint8_t* vsvm;
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void* gdt;
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void* tss;
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uint64_t ticks; /* of the clock since boot time */
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Label sched; /* scheduler wakeup */
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Lock alarmlock; /* access to alarm list */
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void* alarm; /* alarms bound to this clock */
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int inclockintr;
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Proc* readied; /* for runproc */
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uint64_t schedticks; /* next forced context switch */
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int color;
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int tlbfault;
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int tlbpurge;
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int pfault;
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int cs;
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int syscall;
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int load;
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int intr;
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int mmuflush; /* make current proc flush it's mmu state */
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int ilockdepth;
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uintptr_t ilockpc;
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Perf perf; /* performance counters */
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void (*perfintr)(Ureg*, void*);
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int lastintr;
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Lock apictimerlock;
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uint64_t cyclefreq; /* Frequency of user readable cycle counter */
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int64_t cpuhz;
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int cpumhz;
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uint64_t rdtsc;
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LockEntry locks[8];
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MFPU FPU;
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MCPU;
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};
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/*
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* This is the low memory map, between 0x100000 and 0x110000.
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* It is located there to allow fundamental datastructures to be
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* created and used before knowing where free memory begins
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* (e.g. there may be modules located after the kernel BSS end).
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* The layout is known in the bootstrap code in l32p.s.
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* It is logically two parts: the per processor data structures
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* for the bootstrap processor (stack, Mach, vsvm, and page tables),
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* and the global information about the system (syspage, ptrpage).
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* Some of the elements must be aligned on page boundaries, hence
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* the unions.
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*/
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struct Sys {
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uint8_t machstk[MACHSTKSZ];
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PTE pml4[PTSZ/sizeof(PTE)]; /* */
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PTE pdp[PTSZ/sizeof(PTE)];
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PTE pd[PTSZ/sizeof(PTE)];
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PTE pt[PTSZ/sizeof(PTE)];
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uint8_t vsvmpage[4*KiB];
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union {
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Mach mach;
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uint8_t machpage[MACHSZ];
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};
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union {
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struct {
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uint64_t pmstart; /* physical memory */
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uint64_t pmoccupied; /* how much is occupied */
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uint64_t pmunassigned; /* how much to keep back from page pool */
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uint64_t pmpaged; /* how much assigned to page pool */
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uintptr_t vmstart; /* base address for malloc */
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uintptr_t vmunused; /* 1st unused va */
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uintptr_t vmunmapped; /* 1st unmapped va in KSEG0 */
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uint64_t epoch; /* crude time synchronisation */
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int nmach; /* how many machs */
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int nonline; /* how many machs are online */
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uint64_t ticks; /* since boot (type?) */
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uint32_t copymode; /* 0=copy on write; 1=copy on reference */
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};
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uint8_t syspage[4*KiB];
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};
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union {
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Mach* machptr[MACHMAX];
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uint8_t ptrpage[4*KiB];
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};
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uint8_t _57344_[2][4*KiB]; /* unused */
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};
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extern Sys* sys;
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/*
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* KMap
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*/
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typedef void KMap;
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#define kunmap(k)
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#define VA(k) (void*)(k)
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struct
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{
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Lock;
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int exiting; /* shutdown */
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int ispanic; /* shutdown in response to a panic */
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int thunderbirdsarego; /* F.A.B. */
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}active;
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/*
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* a parsed plan9.ini line
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*/
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#define NISAOPT 8
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struct ISAConf {
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char* type;
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uintptr_t port;
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int irq;
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uint32_t dma;
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uintptr_t mem;
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usize size;
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uint32_t freq;
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int tbdf; /* type+busno+devno+funcno */
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int nopt;
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char* opt[NISAOPT];
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};
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typedef struct BIOS32ci { /* BIOS32 Calling Interface */
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uint32_t eax;
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uint32_t ebx;
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uint32_t ecx;
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uint32_t edx;
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uint32_t esi;
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uint32_t edi;
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} BIOS32ci;
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/*
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* The Mach structures must be available via the per-processor
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* MMU information array machptr, mainly for disambiguation and access to
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* the clock which is only maintained by the bootstrap processor (0).
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*/
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register Mach* m asm("r15");
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register Proc* up asm("r14");
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/*
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* Horrid.
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*/
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#ifdef _DBGC_
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#define DBGFLG (dbgflg[_DBGC_])
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#else
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#define DBGFLG (0)
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#endif /* _DBGC_ */
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#define DBG(...) if(!DBGFLG){}else dbgprint(__VA_ARGS__)
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extern char dbgflg[256];
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#define dbgprint print /* for now */
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