106 lines
3.1 KiB
C
106 lines
3.1 KiB
C
/* Copyright (C) Charles Forsyth
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* See /doc/license/NOTICE.Plan9-9k.txt for details about the licensing.
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*/
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/* Portions of this file are Copyright (C) 2015-2018 Giacomo Tesio <giacomo@tesio.it>
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* See /doc/license/gpl-2.0.txt for details about the licensing.
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*/
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/* Portions of this file are Copyright (C) 9front's team.
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* See /doc/license/9front-mit for details about the licensing.
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* See http://code.9front.org/hg/plan9front/ for a list of authors.
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*/
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/* override default macros from ../port/usb.h */
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#undef dprint
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#undef ddprint
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#undef deprint
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#undef ddeprint
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#define dprint(...) do if(ehcidebug)jehanne_print(__VA_ARGS__); while(0)
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#define ddprint(...) do if(ehcidebug>1)jehanne_print(__VA_ARGS__); while(0)
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#define deprint(...) do if(ehcidebug || ep->debug)jehanne_print(__VA_ARGS__); while(0)
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#define ddeprint(...) do if(ehcidebug>1 || ep->debug>1)jehanne_print(__VA_ARGS__); while(0)
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typedef struct Ctlr Ctlr;
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typedef struct Eopio Eopio;
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typedef struct Isoio Isoio;
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typedef struct Poll Poll;
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typedef struct Qh Qh;
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typedef struct Qtree Qtree;
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#pragma incomplete Ctlr;
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#pragma incomplete Ecapio;
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#pragma incomplete Edbgio;
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#pragma incomplete Eopio;
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#pragma incomplete Isoio;
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#pragma incomplete Poll;
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#pragma incomplete Qh;
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#pragma incomplete Qtree;
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struct Poll
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{
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Lock l;
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Rendez r;
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int must;
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int does;
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};
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struct Ctlr
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{
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Rendez r; /* for waiting to async advance doorbell */
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Lock l; /* for ilock. qh lists and basic ctlr I/O */
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QLock portlck; /* for port resets/enable... (and doorbell) */
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int active; /* in use or not */
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Pcidev* pcidev;
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Ecapio* capio; /* Capability i/o regs */
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Eopio* opio; /* Operational i/o regs */
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void* (*tdalloc)(uint32_t,int,uint32_t);
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void* (*dmaalloc)(uint32_t);
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void (*dmafree)(void*);
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void (*dmaflush)(int,void*,uint32_t len);
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int nframes; /* 1024, 512, or 256 frames in the list */
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uint32_t* frames; /* periodic frame list (hw) */
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Qh* qhs; /* async Qh circular list for bulk/ctl */
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Qtree* tree; /* tree of Qhs for the periodic list */
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int ntree; /* number of dummy qhs in tree */
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Qh* intrqhs; /* list of (not dummy) qhs in tree */
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Isoio* iso; /* list of active Iso I/O */
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uint32_t load;
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uint32_t isoload;
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int nintr; /* number of interrupts attended */
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int ntdintr; /* number of intrs. with something to do */
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int nqhintr; /* number of async td intrs. */
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int nisointr; /* number of periodic td intrs. */
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int nreqs;
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Poll poll;
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};
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/*
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* PC-specific stuff
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*/
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/*
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* Operational registers (hw)
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*/
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struct Eopio
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{
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uint32_t cmd; /* 00 command */
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uint32_t sts; /* 04 status */
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uint32_t intr; /* 08 interrupt enable */
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uint32_t frno; /* 0c frame index */
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uint32_t seg; /* 10 bits 63:32 of EHCI datastructs (unused) */
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uint32_t frbase; /* 14 frame list base addr, 4096-byte boundary */
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uint32_t link; /* 18 link for async list */
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uint8_t d2c[0x40-0x1c]; /* 1c dummy */
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uint32_t config; /* 40 1: all ports default-routed to this HC */
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uint32_t portsc[1]; /* 44 Port status and control, one per port */
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};
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extern int ehcidebug;
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extern Ecapio *ehcidebugcapio;
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extern int ehcidebugport;
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void ehcilinkage(Hci *hp);
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void ehcimeminit(Ctlr *ctlr);
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void ehcirun(Ctlr *ctlr, int on);
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