330 lines
6.7 KiB
C
330 lines
6.7 KiB
C
/*
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* This file is part of the UCB release of Plan 9. It is subject to the license
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* terms in the LICENSE file found in the top-level directory of this
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* distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
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* part of the UCB release of Plan 9, including this file, may be copied,
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* modified, propagated, or distributed except according to the terms contained
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* in the LICENSE file.
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*/
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/* Portions of this file are Copyright (C) 9front's team.
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* See /doc/license/9front-mit for details about the licensing.
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* See http://code.9front.org/hg/plan9front/ for a list of authors.
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*/
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#include "u.h"
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#include "../port/lib.h"
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#include "mem.h"
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#include "dat.h"
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#include "fns.h"
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#include "io.h"
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/*
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* 8253 timer
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*/
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enum
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{
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T0cntr= 0x40, /* counter ports */
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T1cntr= 0x41, /* ... */
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T2cntr= 0x42, /* ... */
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Tmode= 0x43, /* mode port (control word register) */
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T2ctl= 0x61, /* counter 2 control port */
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/* commands */
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Latch0= 0x00, /* latch counter 0's value */
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Load0l= 0x10, /* load counter 0's lsb */
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Load0m= 0x20, /* load counter 0's msb */
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Load0= 0x30, /* load counter 0 with 2 bytes */
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Latch1= 0x40, /* latch counter 1's value */
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Load1l= 0x50, /* load counter 1's lsb */
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Load1m= 0x60, /* load counter 1's msb */
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Load1= 0x70, /* load counter 1 with 2 bytes */
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Latch2= 0x80, /* latch counter 2's value */
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Load2l= 0x90, /* load counter 2's lsb */
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Load2m= 0xa0, /* load counter 2's msb */
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Load2= 0xb0, /* load counter 2 with 2 bytes */
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/* 8254 read-back command: everything > pc-at has an 8254 */
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Rdback= 0xc0, /* readback counters & status */
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Rdnstat=0x10, /* don't read status */
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Rdncnt= 0x20, /* don't read counter value */
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Rd0cntr=0x02, /* read back for which counter */
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Rd1cntr=0x04,
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Rd2cntr=0x08,
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/* modes */
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ModeMsk=0xe,
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Square= 0x6, /* periodic square wave */
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Trigger=0x0, /* interrupt on terminal count */
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Sstrobe=0x8, /* software triggered strobe */
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/* T2ctl bits */
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T2gate= (1<<0), /* enable T2 counting */
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T2spkr= (1<<1), /* connect T2 out to speaker */
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T2out= (1<<5), /* output of T2 */
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Freq= 1193182, /* Real clock frequency */
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Tickshift=8, /* extra accuracy */
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MaxPeriod=Freq/HZ,
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MinPeriod=Freq/(100*HZ),
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};
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typedef struct I8253 I8253;
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struct I8253
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{
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Lock;
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uint32_t period; /* current clock period */
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uint16_t last; /* last value of clock 1 */
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uint64_t ticks; /* cumulative ticks of counter 1 */
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uint32_t periodset;
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};
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static I8253 i8253;
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void
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i8253reset(void)
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{
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int loops, x;
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ilock(&i8253);
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i8253.last = 0;
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i8253.period = Freq/HZ;
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/*
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* enable a 1/HZ interrupt for providing scheduling interrupts
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*/
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outb(Tmode, Load0|Square);
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outb(T0cntr, (Freq/HZ)); /* low byte */
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outb(T0cntr, (Freq/HZ)>>8); /* high byte */
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/*
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* enable a longer period counter to use as a clock
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*/
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outb(Tmode, Load2|Square);
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outb(T2cntr, 0); /* low byte */
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outb(T2cntr, 0); /* high byte */
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x = inb(T2ctl);
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x |= T2gate;
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outb(T2ctl, x);
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/*
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* Introduce a little delay to make sure the count is
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* latched and the timer is counting down; with a fast
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* enough processor this may not be the case.
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* The i8254 (which this probably is) has a read-back
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* command which can be used to make sure the counting
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* register has been written into the counting element.
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*/
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x = (Freq/HZ);
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for(loops = 0; loops < 100000 && x >= (Freq/HZ); loops++){
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outb(Tmode, Latch0);
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x = inb(T0cntr);
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x |= inb(T0cntr)<<8;
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}
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iunlock(&i8253);
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}
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void
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i8253init(void)
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{
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ioalloc(T0cntr, 4, 0, "i8253");
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ioalloc(T2ctl, 1, 0, "i8253.cntr2ctl");
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i8253reset();
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}
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void
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guesscpuhz(int aalcycles)
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{
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int loops, x, y;
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uint64_t a, b, cpufreq;
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if(m->machno != 0){
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m->cpuhz = MACHP(0)->cpuhz;
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m->cpumhz = MACHP(0)->cpumhz;
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m->loopconst = MACHP(0)->loopconst;
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return;
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}
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ilock(&i8253);
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for(loops = 1000;;loops += 1000) {
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/*
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* measure time for the loop
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*
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* MOVL loops,CX
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* aaml1: AAM
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* LOOP aaml1
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*
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* the time for the loop should be independent of external
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* cache and memory system since it fits in the execution
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* prefetch buffer.
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*
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*/
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outb(Tmode, Latch2);
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cycles(&a);
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x = inb(T2cntr);
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x |= inb(T2cntr)<<8;
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aamloop(loops);
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outb(Tmode, Latch2);
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cycles(&b);
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y = inb(T2cntr);
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y |= inb(T2cntr)<<8;
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x -= y;
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if(x < 0)
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x += 0x10000;
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if(x >= MaxPeriod || loops >= 1000000)
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break;
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}
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iunlock(&i8253);
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/* avoid division by zero on vmware 7 */
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if(x == 0)
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x = 1;
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/*
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* figure out clock frequency and a loop multiplier for delay().
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* n.b. counter goes up by 2*Freq
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*/
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cpufreq = (long)loops*((aalcycles*2*Freq)/x);
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m->loopconst = (cpufreq/1000)/aalcycles; /* AAM+LOOP's for 1 ms */
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/* a == b means virtualbox has confused us */
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if(m->havetsc && b > a){
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b -= a;
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b *= 2*Freq;
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b /= x;
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m->cyclefreq = b;
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cpufreq = b;
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}
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m->cpuhz = cpufreq;
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/*
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* round to the nearest megahz
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*/
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m->cpumhz = (cpufreq+500000)/1000000L;
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if(m->cpumhz == 0)
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m->cpumhz = 1;
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}
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void
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i8253timerset(uint64_t next)
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{
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int period;
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uint32_t want;
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uint32_t now;
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want = next>>Tickshift;
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now = i8253.ticks; /* assuming whomever called us just did fastticks() */
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period = want - now;
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if(period < MinPeriod)
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period = MinPeriod;
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else if(period > MaxPeriod)
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period = MaxPeriod;
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/* hysteresis */
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if(i8253.period != period){
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ilock(&i8253);
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/* load new value */
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outb(Tmode, Load0|Square);
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outb(T0cntr, period); /* low byte */
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outb(T0cntr, period >> 8); /* high byte */
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/* remember period */
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i8253.period = period;
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i8253.periodset++;
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iunlock(&i8253);
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}
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}
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static void
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i8253clock(Ureg* ureg, void* _)
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{
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timerintr(ureg, 0);
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}
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void
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i8253enable(void)
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{
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intrenable(IrqCLOCK, i8253clock, 0, BUSUNKNOWN, "clock");
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}
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/*
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* return the total ticks of counter 2. We shift by
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* 8 to give timesync more wriggle room for interpretation
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* of the frequency
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*/
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uint64_t
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i8253read(uint64_t *hz)
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{
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uint16_t y, x;
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uint64_t ticks;
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if(hz)
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*hz = Freq<<Tickshift;
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ilock(&i8253);
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outb(Tmode, Latch2);
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y = inb(T2cntr);
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y |= inb(T2cntr)<<8;
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if(y < i8253.last)
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x = i8253.last - y;
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else {
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x = i8253.last + (0x10000 - y);
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if (x > 3*MaxPeriod) {
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outb(Tmode, Load2|Square);
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outb(T2cntr, 0); /* low byte */
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outb(T2cntr, 0); /* high byte */
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y = 0xFFFF;
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x = i8253.period;
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}
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}
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i8253.last = y;
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i8253.ticks += x>>1;
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ticks = i8253.ticks;
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iunlock(&i8253);
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return ticks<<Tickshift;
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}
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void
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delay(int millisecs)
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{
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millisecs *= m->loopconst;
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if(millisecs <= 0)
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millisecs = 1;
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aamloop(millisecs);
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}
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void
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microdelay(int microsecs)
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{
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microsecs *= m->loopconst;
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microsecs /= 1000;
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if(microsecs <= 0)
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microsecs = 1;
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aamloop(microsecs);
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}
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/*
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* performance measurement ticks. must be low overhead.
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* doesn't have to count over a second.
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*/
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uint64_t
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perfticks(void)
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{
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uint64_t x;
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if(m->havetsc)
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cycles(&x);
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else
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x = 0;
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return x;
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}
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