1613 lines
28 KiB
C
1613 lines
28 KiB
C
/*
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* myricom 10 Gb ethernet driver
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* © 2007 erik quanstrom, coraid
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*
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* the card is big endian.
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* we use uint64_t rather than uintptr_t to hold addresses so that
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* we don't get "warning: stupid shift" on 32-bit architectures.
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*/
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/* Portions of this files are Copyright (C) Charles Forsyth
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* See /doc/license/NOTICE.Plan9-9k.txt for details about the licensing.
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*/
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/* Portions of this file are Copyright (C) 9front's team.
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* See /doc/license/9front-mit for details about the licensing.
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* See http://code.9front.org/hg/plan9front/ for a list of authors.
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*/
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#include "u.h"
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#include "../port/lib.h"
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#include "mem.h"
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#include "dat.h"
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#include "fns.h"
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#include "../port/error.h"
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#include "../port/netif.h"
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#include "etherif.h"
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#include "io.h"
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#ifndef KiB
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#define KiB 1024u /* Kibi 0x0000000000000400 */
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#define MiB 1048576u /* Mebi 0x0000000000100000 */
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#endif /* KiB */
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#define dprint(...) if(debug) jehanne_print(__VA_ARGS__)
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#define pcicapdbg(...)
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#define malign(n) jehanne_mallocalign((n), 4*KiB, 0, 0)
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#include "etherm10g2k.i"
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#include "etherm10g4k.i"
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static int debug = 0;
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static char Etimeout[] = "timeout";
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enum {
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Epromsz = 256,
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Maxslots= 1024,
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Align = 4096,
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Maxmtu = 9000,
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Noconf = 0xffffffff,
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Fwoffset= 1*MiB,
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Cmdoff = 0xf80000, /* command port offset */
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Fwsubmt = 0xfc0000, /* firmware submission command port offset */
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Rdmaoff = 0xfc01c0, /* rdma command port offset */
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};
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enum {
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CZero,
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Creset,
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Cversion,
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CSintrqdma, /* issue these before Cetherup */
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CSbigsz, /* in bytes bigsize = 2^n */
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CSsmallsz,
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CGsendoff,
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CGsmallrxoff,
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CGbigrxoff,
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CGirqackoff,
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CGirqdeassoff,
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CGsendrgsz,
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CGrxrgsz,
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CSintrqsz, /* 2^n */
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Cetherup, /* above parameters + mtu/mac addr must be set first. */
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Cetherdn,
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CSmtu, /* below may be issued live */
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CGcoaloff, /* in microseconds */
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CSstatsrate, /* in microseconds */
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CSstatsdma,
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Cpromisc,
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Cnopromisc,
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CSmac,
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Cenablefc,
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Cdisablefc,
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Cdmatest, /* address in d[0-1], d[2]=length */
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Cenableallmc,
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Cdisableallmc,
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CSjoinmc,
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CSleavemc,
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Cleaveallmc,
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CSstatsdma2, /* adds (unused) multicast stats */
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};
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typedef union {
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uint32_t i[2];
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uint8_t c[8];
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} Cmd;
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typedef uint32_t Slot;
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typedef struct {
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uint16_t cksum;
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uint16_t len;
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} Slotparts;
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enum {
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SFsmall = 1,
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SFfirst = 2,
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SFalign = 4,
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SFnotso = 16,
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};
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typedef struct {
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uint32_t high;
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uint32_t low;
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uint16_t hdroff;
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uint16_t len;
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uint8_t pad;
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uint8_t nrdma;
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uint8_t chkoff;
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uint8_t flags;
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} Send;
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typedef struct {
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QLock;
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Send *lanai; /* tx ring (cksum+len in lanai memory) */
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Send *host; /* tx ring (data in our memory) */
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Block **bring;
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// uint8_t *wcfifo; /* what the heck is a w/c fifo? */
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int size; /* of buffers in the z8's memory */
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uint32_t segsz;
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uint32_t n; /* rxslots */
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uint32_t m; /* mask; rxslots must be a power of two */
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uint32_t i; /* number of segments (not frames) queued */
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uint32_t cnt; /* number of segments sent by the card */
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uint32_t npkt;
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int64_t nbytes;
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} Tx;
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typedef struct Bpool Bpool;
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struct Bpool {
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Lock l;
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Block *head;
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uint32_t size; /* buffer size of each block */
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uint32_t n; /* n free buffers */
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uint32_t cnt;
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};
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static Bpool smpool = { .size = 128, };
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static Bpool bgpool = { .size = Maxmtu, };
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typedef struct {
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Bpool *pool; /* free buffers */
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uint32_t *lanai; /* rx ring; we have no permanent host shadow */
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Block **host; /* called "info" in myricom driver */
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// uint8_t *wcfifo; /* cmd submission fifo */
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uint32_t m;
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uint32_t n; /* rxslots */
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uint32_t i;
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uint32_t cnt; /* number of buffers allocated (lifetime) */
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uint32_t allocfail;
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} Rx;
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/* dma mapped. unix network byte order. */
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typedef struct {
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uint8_t txcnt[4];
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uint8_t linkstat[4];
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uint8_t dlink[4];
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uint8_t derror[4];
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uint8_t drunt[4];
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uint8_t doverrun[4];
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uint8_t dnosm[4];
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uint8_t dnobg[4];
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uint8_t nrdma[4];
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uint8_t txstopped;
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uint8_t down;
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uint8_t updated;
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uint8_t valid;
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} Stats;
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enum {
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Detached,
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Attached,
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Runed,
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};
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typedef struct {
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Slot *entry;
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uint64_t busaddr;
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uint32_t m;
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uint32_t n;
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uint32_t i;
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} Done;
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typedef struct Ctlr Ctlr;
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typedef struct Ctlr {
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QLock;
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int state;
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int kprocs;
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uint64_t port;
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Pcidev* pcidev;
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Ctlr* next;
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int active;
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int id; /* do we need this? */
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uint8_t ra[Eaddrlen];
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int ramsz;
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uint8_t *ram;
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uint32_t *irqack;
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uint32_t *irqdeass;
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uint32_t *coal;
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char eprom[Epromsz];
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uint32_t serial; /* unit serial number */
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QLock cmdl;
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Cmd *cmd; /* address of command return */
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uint64_t cprt; /* bus address of command */
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uint64_t boot; /* boot address */
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Done done;
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Tx tx;
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Rx sm;
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Rx bg;
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Stats *stats;
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uint64_t statsprt;
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Rendez rxrendez;
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Rendez txrendez;
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int msi;
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uint32_t linkstat;
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uint32_t nrdma;
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} Ctlr;
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static Ctlr *ctlrs;
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enum {
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PcieAERC = 1,
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PcieVC,
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PcieSNC,
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PciePBC,
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};
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enum {
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AercCCR = 0x18, /* control register */
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};
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enum {
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PcieCTL = 8,
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PcieLCR = 12,
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PcieMRD = 0x7000, /* maximum read size */
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};
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/*
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* this function doesn't work because pcicgr32 doesn't have access
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* to the pcie extended configuration space.
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*/
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static int
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pciecap(Pcidev *p, int cap)
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{
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uint32_t off, i;
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off = 0x100;
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while(((i = pcicfgr32(p, off))&0xffff) != cap){
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off = i >> 20;
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jehanne_print("pciecap offset = %ud\n", off);
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if(off < 0x100 || off >= 4*KiB - 1)
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return 0;
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}
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jehanne_print("pciecap found = %ud\n", off);
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return off;
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}
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static int
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setpcie(Pcidev *p)
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{
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int off;
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/* set 4k writes */
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off = pcicap(p, PciCapPCIe);
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if(off < 64)
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return -1;
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off += PcieCTL;
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pcicfgw16(p, off, (pcicfgr16(p, off) & ~PcieMRD) | 5<<12);
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return 0;
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}
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static int
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whichfw(Pcidev *p)
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{
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char *s;
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int i, off, lanes, ecrc;
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uint32_t cap;
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/* check the number of configured lanes. */
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off = pcicap(p, PciCapPCIe);
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if(off < 64)
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return -1;
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off += PcieLCR;
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cap = pcicfgr16(p, off);
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lanes = (cap>>4) & 0x3f;
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/* check AERC register. we need it on. */
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off = pciecap(p, PcieAERC);
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jehanne_print("%d offset\n", off);
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cap = 0;
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if(off != 0){
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off += AercCCR;
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cap = pcicfgr32(p, off);
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jehanne_print("%ud cap\n", cap);
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}
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ecrc = (cap>>4) & 0xf;
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/* if we don't like the aerc, kick it here. */
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jehanne_print("m10g %d lanes; ecrc=%d; ", lanes, ecrc);
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if(s = getconf("myriforce")){
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i = jehanne_atoi(s);
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if(i != 4*KiB || i != 2*KiB)
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i = 2*KiB;
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jehanne_print("fw=%d [forced]\n", i);
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return i;
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}
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if(lanes <= 4){
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jehanne_print("fw = 4096 [lanes]\n");
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return 4*KiB;
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}
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if(ecrc & 10){
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jehanne_print("fw = 4096 [ecrc set]\n");
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return 4*KiB;
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}
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jehanne_print("fw = 4096 [default]\n");
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return 4*KiB;
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}
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static int
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parseeprom(Ctlr *c)
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{
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int i, j, k, l, bits;
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char *s;
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dprint("m10g eprom:\n");
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s = c->eprom;
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bits = 3;
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for(i = 0; s[i] && i < Epromsz; i++){
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l = jehanne_strlen(s+i);
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dprint("\t%s\n", s+i);
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if(jehanne_strncmp(s+i, "MAC=", 4) == 0 && l == 4+12+5){
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bits ^= 1;
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j = i + 4;
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for(k = 0; k < 6; k++)
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c->ra[k] = jehanne_strtoul(s+j+3*k, 0, 16);
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}else if(jehanne_strncmp(s+i, "SN=", 3) == 0){
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bits ^= 2;
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c->serial = jehanne_atoi(s+i+3);
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}
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i += l;
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}
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if(bits)
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return -1;
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return 0;
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}
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static uint16_t
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pbit16(uint16_t i)
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{
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uint16_t j;
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uint8_t *p;
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p = (uint8_t*)&j;
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p[1] = i;
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p[0] = i>>8;
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return j;
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}
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static uint16_t
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gbit16(uint8_t i[2])
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{
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uint16_t j;
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j = i[1];
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j |= i[0]<<8;
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return j;
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}
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static uint32_t
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pbit32(uint32_t i)
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{
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uint32_t j;
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uint8_t *p;
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p = (uint8_t*)&j;
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p[3] = i;
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p[2] = i>>8;
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p[1] = i>>16;
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p[0] = i>>24;
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return j;
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}
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static uint32_t
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gbit32(uint8_t i[4])
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{
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uint32_t j;
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j = i[3];
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j |= i[2]<<8;
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j |= i[1]<<16;
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j |= i[0]<<24;
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return j;
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}
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static void
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prepcmd(uint32_t *cmd, int i)
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{
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while(i-- > 0)
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cmd[i] = pbit32(cmd[i]);
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}
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/*
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* the command looks like this (int 32bit integers)
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* cmd type
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* addr (low)
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* addr (high)
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* pad (used for dma testing)
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* response (high)
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* response (low)
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* 40 byte = 5 int pad.
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*/
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uint32_t
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cmd(Ctlr *c, int type, uint64_t data)
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{
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uint32_t buf[16], i;
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Cmd *cmd;
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qlock(&c->cmdl);
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cmd = c->cmd;
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cmd->i[1] = Noconf;
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jehanne_memset(buf, 0, sizeof buf);
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buf[0] = type;
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buf[1] = data;
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buf[2] = data >> 32;
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buf[4] = c->cprt >> 32;
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buf[5] = c->cprt;
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prepcmd(buf, 6);
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coherence();
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jehanne_memmove(c->ram + Cmdoff, buf, sizeof buf);
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if(waserror())
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nexterror();
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for(i = 0; i < 15; i++){
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if(cmd->i[1] != Noconf){
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poperror();
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i = gbit32(cmd->c);
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qunlock(&c->cmdl);
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if(cmd->i[1] != 0)
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dprint("[%ux]", i);
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return i;
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}
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tsleep(&up->sleep, return0, 0, 1);
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}
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qunlock(&c->cmdl);
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iprint("m10g: cmd timeout [%ux %ux] cmd=%d\n",
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cmd->i[0], cmd->i[1], type);
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error(Etimeout);
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return ~0; /* silence! */
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}
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uint32_t
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maccmd(Ctlr *c, int type, uint8_t *m)
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{
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uint32_t buf[16], i;
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Cmd *cmd;
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qlock(&c->cmdl);
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cmd = c->cmd;
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cmd->i[1] = Noconf;
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jehanne_memset(buf, 0, sizeof buf);
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buf[0] = type;
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buf[1] = m[0]<<24 | m[1]<<16 | m[2]<<8 | m[3];
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buf[2] = m[4]<< 8 | m[5];
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buf[4] = c->cprt >> 32;
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buf[5] = c->cprt;
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prepcmd(buf, 6);
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coherence();
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jehanne_memmove(c->ram + Cmdoff, buf, sizeof buf);
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if(waserror())
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nexterror();
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for(i = 0; i < 15; i++){
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if(cmd->i[1] != Noconf){
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poperror();
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i = gbit32(cmd->c);
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qunlock(&c->cmdl);
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if(cmd->i[1] != 0)
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dprint("[%ux]", i);
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return i;
|
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}
|
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tsleep(&up->sleep, return0, 0, 1);
|
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}
|
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qunlock(&c->cmdl);
|
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iprint("m10g: maccmd timeout [%ux %ux] cmd=%d\n",
|
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cmd->i[0], cmd->i[1], type);
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error(Etimeout);
|
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return ~0; /* silence! */
|
|
}
|
|
|
|
/* remove this garbage after testing */
|
|
enum {
|
|
DMAread = 0x10000,
|
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DMAwrite= 0x1,
|
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};
|
|
|
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uint32_t
|
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dmatestcmd(Ctlr *c, int type, uint64_t addr, int len)
|
|
{
|
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uint32_t buf[16], i;
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|
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jehanne_memset(buf, 0, sizeof buf);
|
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jehanne_memset(c->cmd, Noconf, sizeof *c->cmd);
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buf[0] = Cdmatest;
|
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buf[1] = addr;
|
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buf[2] = addr >> 32;
|
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buf[3] = len * type;
|
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buf[4] = c->cprt >> 32;
|
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buf[5] = c->cprt;
|
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prepcmd(buf, 6);
|
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coherence();
|
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jehanne_memmove(c->ram + Cmdoff, buf, sizeof buf);
|
|
|
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if(waserror())
|
|
nexterror();
|
|
for(i = 0; i < 15; i++){
|
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if(c->cmd->i[1] != Noconf){
|
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i = gbit32(c->cmd->c);
|
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if(i == 0)
|
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error(Eio);
|
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poperror();
|
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return i;
|
|
}
|
|
tsleep(&up->sleep, return0, 0, 5);
|
|
}
|
|
error(Etimeout);
|
|
return ~0; /* silence! */
|
|
}
|
|
|
|
uint32_t
|
|
rdmacmd(Ctlr *c, int on)
|
|
{
|
|
uint32_t buf[16], i;
|
|
|
|
jehanne_memset(buf, 0, sizeof buf);
|
|
c->cmd->i[0] = 0;
|
|
coherence();
|
|
buf[0] = c->cprt >> 32;
|
|
buf[1] = c->cprt;
|
|
buf[2] = Noconf;
|
|
buf[3] = c->cprt >> 32;
|
|
buf[4] = c->cprt;
|
|
buf[5] = on;
|
|
prepcmd(buf, 6);
|
|
jehanne_memmove(c->ram + Rdmaoff, buf, sizeof buf);
|
|
|
|
if(waserror())
|
|
nexterror();
|
|
for(i = 0; i < 20; i++){
|
|
if(c->cmd->i[0] == Noconf){
|
|
poperror();
|
|
return gbit32(c->cmd->c);
|
|
}
|
|
tsleep(&up->sleep, return0, 0, 1);
|
|
}
|
|
error(Etimeout);
|
|
iprint("m10g: rdmacmd timeout\n");
|
|
return ~0; /* silence! */
|
|
}
|
|
|
|
static int
|
|
loadfw(Ctlr *c, int *align)
|
|
{
|
|
uint32_t *f, *s, sz;
|
|
int i;
|
|
|
|
if((*align = whichfw(c->pcidev)) == 4*KiB){
|
|
f = (uint32_t*)fw4k;
|
|
sz = sizeof fw4k;
|
|
}else{
|
|
f = (uint32_t*)fw2k;
|
|
sz = sizeof fw2k;
|
|
}
|
|
|
|
s = (uint32_t*)(c->ram + Fwoffset);
|
|
for(i = 0; i < sz / 4; i++)
|
|
s[i] = f[i];
|
|
return sz & ~3;
|
|
}
|
|
|
|
static int
|
|
bootfw(Ctlr *c)
|
|
{
|
|
int i, sz, align;
|
|
uint32_t buf[16];
|
|
Cmd* cmd;
|
|
|
|
if((sz = loadfw(c, &align)) == 0)
|
|
return 0;
|
|
dprint("bootfw %d bytes ... ", sz);
|
|
cmd = c->cmd;
|
|
|
|
jehanne_memset(buf, 0, sizeof buf);
|
|
c->cmd->i[0] = 0;
|
|
coherence();
|
|
buf[0] = c->cprt >> 32; /* upper dma target address */
|
|
buf[1] = c->cprt; /* lower */
|
|
buf[2] = Noconf; /* writeback */
|
|
buf[3] = Fwoffset + 8,
|
|
buf[4] = sz - 8;
|
|
buf[5] = 8;
|
|
buf[6] = 0;
|
|
prepcmd(buf, 7);
|
|
coherence();
|
|
jehanne_memmove(c->ram + Fwsubmt, buf, sizeof buf);
|
|
|
|
for(i = 0; i < 20; i++){
|
|
if(cmd->i[0] == Noconf)
|
|
break;
|
|
delay(1);
|
|
}
|
|
dprint("[%ux %ux]", gbit32(cmd->c), gbit32(cmd->c+4));
|
|
if(i == 20){
|
|
jehanne_print("m10g: cannot load fw\n");
|
|
return -1;
|
|
}
|
|
dprint("\n");
|
|
c->tx.segsz = align;
|
|
return 0;
|
|
}
|
|
|
|
#if 0
|
|
static int
|
|
kickthebaby(Pcidev *p, Ctlr *c)
|
|
{
|
|
/* don't kick the baby! */
|
|
uint32_t code;
|
|
|
|
pcicfgw8(p, 0x10 + c->boot, 0x3);
|
|
pcicfgw32(p, 0x18 + c->boot, 0xfffffff0);
|
|
code = pcicfgr32(p, 0x14 + c->boot);
|
|
|
|
dprint("reboot status = %ux\n", code);
|
|
if(code != 0xfffffff0)
|
|
return -1;
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
typedef struct {
|
|
uint8_t len[4];
|
|
uint8_t type[4];
|
|
char version[128];
|
|
uint8_t globals[4];
|
|
uint8_t ramsz[4];
|
|
uint8_t specs[4];
|
|
uint8_t specssz[4];
|
|
} Fwhdr;
|
|
|
|
enum {
|
|
Tmx = 0x4d582020,
|
|
Tpcie = 0x70636965,
|
|
Teth = 0x45544820,
|
|
Tmcp0 = 0x4d435030,
|
|
};
|
|
|
|
static char *
|
|
fwtype(uint32_t type)
|
|
{
|
|
switch(type){
|
|
case Tmx:
|
|
return "mx";
|
|
case Tpcie:
|
|
return "PCIe";
|
|
case Teth:
|
|
return "eth";
|
|
case Tmcp0:
|
|
return "mcp0";
|
|
}
|
|
return "*GOK*";
|
|
}
|
|
|
|
static int
|
|
chkfw(Ctlr *c)
|
|
{
|
|
uintptr_t off;
|
|
Fwhdr *h;
|
|
uint32_t type;
|
|
|
|
off = gbit32(c->ram+0x3c);
|
|
dprint("firmware %llux\n", (uint64_t)off);
|
|
if((off&3) || off + sizeof *h > c->ramsz){
|
|
jehanne_print("!m10g: bad firmware %llux\n", (uint64_t)off);
|
|
return -1;
|
|
}
|
|
h = (Fwhdr*)(c->ram + off);
|
|
type = gbit32(h->type);
|
|
dprint("\t" "type %s\n", fwtype(type));
|
|
dprint("\t" "vers %s\n", h->version);
|
|
dprint("\t" "ramsz %ux\n", gbit32(h->ramsz));
|
|
if(type != Teth){
|
|
jehanne_print("!m10g: bad card type %s\n", fwtype(type));
|
|
return -1;
|
|
}
|
|
|
|
return bootfw(c) || rdmacmd(c, 0);
|
|
}
|
|
|
|
static int
|
|
reset(Ether *e, Ctlr *c)
|
|
{
|
|
uint32_t i, sz;
|
|
|
|
if(waserror()){
|
|
jehanne_print("m10g: reset error\n");
|
|
nexterror();
|
|
return -1;
|
|
}
|
|
|
|
chkfw(c);
|
|
cmd(c, Creset, 0);
|
|
|
|
cmd(c, CSintrqsz, c->done.n * sizeof *c->done.entry);
|
|
cmd(c, CSintrqdma, c->done.busaddr);
|
|
c->irqack = (uint32_t*)(c->ram + cmd(c, CGirqackoff, 0));
|
|
/* required only if we're not doing msi? */
|
|
c->irqdeass = (uint32_t*)(c->ram + cmd(c, CGirqdeassoff, 0));
|
|
/* this is the driver default, why fiddle with this? */
|
|
c->coal = (uint32_t*)(c->ram + cmd(c, CGcoaloff, 0));
|
|
*c->coal = pbit32(25);
|
|
|
|
dprint("dma stats:\n");
|
|
rdmacmd(c, 1);
|
|
sz = c->tx.segsz;
|
|
i = dmatestcmd(c, DMAread, c->done.busaddr, sz);
|
|
jehanne_print("\t" "read: %ud MB/s\n", ((i>>16)*sz*2)/(i&0xffff));
|
|
i = dmatestcmd(c, DMAwrite, c->done.busaddr, sz);
|
|
jehanne_print("\t" "write: %ud MB/s\n", ((i>>16)*sz*2)/(i&0xffff));
|
|
i = dmatestcmd(c, DMAwrite|DMAread, c->done.busaddr, sz);
|
|
jehanne_print("\t" "r/w: %ud MB/s\n", ((i>>16)*sz*2*2)/(i&0xffff));
|
|
jehanne_memset(c->done.entry, 0, c->done.n * sizeof *c->done.entry);
|
|
|
|
maccmd(c, CSmac, c->ra);
|
|
// cmd(c, Cnopromisc, 0);
|
|
cmd(c, Cenablefc, 0);
|
|
e->maxmtu = Maxmtu;
|
|
cmd(c, CSmtu, e->maxmtu);
|
|
dprint("CSmtu %d...\n", e->maxmtu);
|
|
|
|
poperror();
|
|
return 0;
|
|
}
|
|
|
|
static void
|
|
ctlrfree(Ctlr *c)
|
|
{
|
|
/* free up all the Block*s, too */
|
|
jehanne_free(c->tx.host);
|
|
jehanne_free(c->sm.host);
|
|
jehanne_free(c->bg.host);
|
|
jehanne_free(c->cmd);
|
|
jehanne_free(c->done.entry);
|
|
jehanne_free(c->stats);
|
|
jehanne_free(c);
|
|
}
|
|
|
|
static int
|
|
setmem(Pcidev *p, Ctlr *c)
|
|
{
|
|
uint32_t i;
|
|
uint64_t raddr;
|
|
Done *d;
|
|
void *mem;
|
|
|
|
c->tx.segsz = 2048;
|
|
c->ramsz = 2*MiB - (2*48*KiB + 32*KiB) - 0x100;
|
|
if(c->ramsz > p->mem[0].size)
|
|
return -1;
|
|
|
|
raddr = p->mem[0].bar & ~0x0F;
|
|
mem = vmap(raddr, p->mem[0].size);
|
|
if(mem == nil){
|
|
jehanne_print("m10g: can't map %8.8lux\n", p->mem[0].bar);
|
|
return -1;
|
|
}
|
|
dprint("%llux <- vmap(mem[0].size = %ux)\n", raddr, p->mem[0].size);
|
|
c->port = raddr;
|
|
c->ram = mem;
|
|
c->cmd = malign(sizeof *c->cmd);
|
|
c->cprt = PCIWADDR64(c->cmd);
|
|
|
|
d = &c->done;
|
|
d->n = Maxslots;
|
|
d->m = d->n - 1;
|
|
i = d->n * sizeof *d->entry;
|
|
d->entry = malign(i);
|
|
jehanne_memset(d->entry, 0, i);
|
|
d->busaddr = PCIWADDR64(d->entry);
|
|
|
|
c->stats = malign(sizeof *c->stats);
|
|
jehanne_memset(c->stats, 0, sizeof *c->stats);
|
|
c->statsprt = PCIWADDR64(c->stats);
|
|
|
|
jehanne_memmove(c->eprom, c->ram + c->ramsz - Epromsz, Epromsz-2);
|
|
return setpcie(p) || parseeprom(c);
|
|
}
|
|
|
|
static Rx*
|
|
whichrx(Ctlr *c, int sz)
|
|
{
|
|
if(sz <= smpool.size)
|
|
return &c->sm;
|
|
return &c->bg;
|
|
}
|
|
|
|
static Block*
|
|
balloc(Rx* rx)
|
|
{
|
|
Block *b;
|
|
|
|
ilock(&rx->pool->l);
|
|
if((b = rx->pool->head) != nil){
|
|
rx->pool->head = b->next;
|
|
b->next = nil;
|
|
rx->pool->n--;
|
|
}
|
|
iunlock(&rx->pool->l);
|
|
return b;
|
|
}
|
|
|
|
static void
|
|
smbfree(Block *b)
|
|
{
|
|
Bpool *p;
|
|
|
|
b->rp = b->wp = (uint8_t*)ROUNDUP((uintptr_t)b->base, 4*KiB);
|
|
b->flag &= ~(Bpktck|Btcpck|Budpck|Bipck);
|
|
|
|
p = &smpool;
|
|
ilock(&p->l);
|
|
b->next = p->head;
|
|
p->head = b;
|
|
p->n++;
|
|
p->cnt++;
|
|
iunlock(&p->l);
|
|
}
|
|
|
|
static void
|
|
bgbfree(Block *b)
|
|
{
|
|
Bpool *p;
|
|
|
|
b->rp = b->wp = (uint8_t*)ROUNDUP((uintptr_t)b->base, 4*KiB);
|
|
b->flag &= ~(Bpktck|Btcpck|Budpck|Bipck);
|
|
|
|
p = &bgpool;
|
|
ilock(&p->l);
|
|
b->next = p->head;
|
|
p->head = b;
|
|
p->n++;
|
|
p->cnt++;
|
|
iunlock(&p->l);
|
|
}
|
|
|
|
static void
|
|
replenish(Rx *rx)
|
|
{
|
|
uint32_t buf[16], i, idx, e;
|
|
Bpool *p;
|
|
Block *b;
|
|
|
|
p = rx->pool;
|
|
if(p->n < 8)
|
|
return;
|
|
jehanne_memset(buf, 0, sizeof buf);
|
|
e = (rx->i - rx->cnt) & ~7;
|
|
e += rx->n;
|
|
while(p->n >= 8 && e){
|
|
idx = rx->cnt & rx->m;
|
|
for(i = 0; i < 8; i++){
|
|
b = balloc(rx);
|
|
buf[i*2] = pbit32(PCIWADDRH(b->wp));
|
|
buf[i*2+1] = pbit32(PCIWADDRL(b->wp));
|
|
rx->host[idx+i] = b;
|
|
assert(b);
|
|
}
|
|
jehanne_memmove(rx->lanai + 2*idx, buf, sizeof buf);
|
|
coherence();
|
|
rx->cnt += 8;
|
|
e -= 8;
|
|
}
|
|
if(e && p->n > 7+1)
|
|
jehanne_print("should panic? pool->n = %d\n", p->n);
|
|
}
|
|
|
|
/*
|
|
* future:
|
|
* if (c->mtrr >= 0) {
|
|
* c->tx.wcfifo = c->ram+0x200000;
|
|
* c->sm.wcfifo = c->ram+0x300000;
|
|
* c->bg.wcfifo = c->ram+0x340000;
|
|
* }
|
|
*/
|
|
|
|
static int
|
|
nextpow(int j)
|
|
{
|
|
int i;
|
|
|
|
for(i = 0; j > (1 << i); i++)
|
|
;
|
|
return 1 << i;
|
|
}
|
|
|
|
static void*
|
|
emalign(int sz)
|
|
{
|
|
void *v;
|
|
|
|
v = malign(sz);
|
|
if(v == nil)
|
|
error(Enomem);
|
|
jehanne_memset(v, 0, sz);
|
|
return v;
|
|
}
|
|
|
|
static void
|
|
open0(Ether *e, Ctlr *c)
|
|
{
|
|
Block *b;
|
|
int i, sz, entries;
|
|
|
|
entries = cmd(c, CGsendrgsz, 0) / sizeof *c->tx.lanai;
|
|
c->tx.lanai = (Send*)(c->ram + cmd(c, CGsendoff, 0));
|
|
c->tx.host = emalign(entries * sizeof *c->tx.host);
|
|
c->tx.bring = emalign(entries * sizeof *c->tx.bring);
|
|
c->tx.n = entries;
|
|
c->tx.m = entries-1;
|
|
|
|
entries = cmd(c, CGrxrgsz, 0)/8;
|
|
c->sm.pool = &smpool;
|
|
cmd(c, CSsmallsz, c->sm.pool->size);
|
|
c->sm.lanai = (uint32_t*)(c->ram + cmd(c, CGsmallrxoff, 0));
|
|
c->sm.n = entries;
|
|
c->sm.m = entries-1;
|
|
c->sm.host = emalign(entries * sizeof *c->sm.host);
|
|
|
|
c->bg.pool = &bgpool;
|
|
c->bg.pool->size = nextpow(2 + e->maxmtu); /* 2-byte alignment pad */
|
|
cmd(c, CSbigsz, c->bg.pool->size);
|
|
c->bg.lanai = (uint32_t*)(c->ram + cmd(c, CGbigrxoff, 0));
|
|
c->bg.n = entries;
|
|
c->bg.m = entries-1;
|
|
c->bg.host = emalign(entries * sizeof *c->bg.host);
|
|
|
|
sz = c->sm.pool->size + 4*KiB;
|
|
for(i = 0; i < c->sm.n; i++){
|
|
if((b = allocb(sz)) == 0)
|
|
break;
|
|
b->free = smbfree;
|
|
freeb(b);
|
|
}
|
|
sz = c->bg.pool->size + 4*KiB;
|
|
for(i = 0; i < c->bg.n; i++){
|
|
if((b = allocb(sz)) == 0)
|
|
break;
|
|
b->free = bgbfree;
|
|
freeb(b);
|
|
}
|
|
|
|
cmd(c, CSstatsdma, c->statsprt);
|
|
c->linkstat = ~0;
|
|
c->nrdma = 15;
|
|
|
|
cmd(c, Cetherup, 0);
|
|
}
|
|
|
|
static Block*
|
|
nextblock(Ctlr *c)
|
|
{
|
|
uint32_t i;
|
|
uint16_t l, k;
|
|
Block *b;
|
|
Done *d;
|
|
Rx *rx;
|
|
Slot *s;
|
|
Slotparts *sp;
|
|
|
|
d = &c->done;
|
|
s = d->entry;
|
|
i = d->i & d->m;
|
|
sp = (Slotparts *)(s + i);
|
|
l = sp->len;
|
|
if(l == 0)
|
|
return 0;
|
|
k = sp->cksum;
|
|
s[i] = 0;
|
|
d->i++;
|
|
l = gbit16((uint8_t*)&l);
|
|
//dprint("nextb: i=%d l=%d\n", d->i, l);
|
|
rx = whichrx(c, l);
|
|
if(rx->i >= rx->cnt){
|
|
iprint("m10g: overrun\n");
|
|
return 0;
|
|
}
|
|
i = rx->i & rx->m;
|
|
b = rx->host[i];
|
|
rx->host[i] = 0;
|
|
if(b == 0){
|
|
iprint("m10g: error rx to no block. memory is hosed.\n");
|
|
return 0;
|
|
}
|
|
rx->i++;
|
|
|
|
b->flag |= Bipck|Btcpck|Budpck;
|
|
b->checksum = k;
|
|
b->rp += 2;
|
|
b->wp += 2+l;
|
|
b->lim = b->wp; /* lie like a dog. */
|
|
return b;
|
|
}
|
|
|
|
static int
|
|
rxcansleep(void *v)
|
|
{
|
|
Ctlr *c;
|
|
Slot *s;
|
|
Slotparts *sp;
|
|
Done *d;
|
|
|
|
c = v;
|
|
d = &c->done;
|
|
s = c->done.entry;
|
|
sp = (Slotparts *)(s + (d->i & d->m));
|
|
if(sp->len != 0)
|
|
return -1;
|
|
c->irqack[0] = pbit32(3);
|
|
return 0;
|
|
}
|
|
|
|
static void
|
|
m10rx(void *v)
|
|
{
|
|
Ether *e;
|
|
Ctlr *c;
|
|
Block *b;
|
|
|
|
e = v;
|
|
c = e->ctlr;
|
|
for(;;){
|
|
replenish(&c->sm);
|
|
replenish(&c->bg);
|
|
sleep(&c->rxrendez, rxcansleep, c);
|
|
while(b = nextblock(c))
|
|
etheriq(e, b, 1);
|
|
}
|
|
}
|
|
|
|
static void
|
|
txcleanup(Tx *tx, uint32_t n)
|
|
{
|
|
Block *b;
|
|
uint32_t j, l, m;
|
|
|
|
if(tx->npkt == n)
|
|
return;
|
|
l = 0;
|
|
m = tx->m;
|
|
/*
|
|
* if tx->cnt == tx->i, yet tx->npkt == n-1, we just
|
|
* caught ourselves and myricom card updating.
|
|
*/
|
|
for(;; tx->cnt++){
|
|
j = tx->cnt & tx->m;
|
|
if(b = tx->bring[j]){
|
|
tx->bring[j] = 0;
|
|
tx->nbytes += BLEN(b);
|
|
freeb(b);
|
|
if(++tx->npkt == n)
|
|
return;
|
|
}
|
|
if(tx->cnt == tx->i)
|
|
return;
|
|
if(l++ == m){
|
|
iprint("tx ovrun: %ud %uld\n", n, tx->npkt);
|
|
return;
|
|
}
|
|
}
|
|
}
|
|
|
|
static int
|
|
txcansleep(void *v)
|
|
{
|
|
Ctlr *c;
|
|
|
|
c = v;
|
|
if(c->tx.cnt != c->tx.i && c->tx.npkt != gbit32(c->stats->txcnt))
|
|
return -1;
|
|
return 0;
|
|
}
|
|
|
|
static void
|
|
txproc(void *v)
|
|
{
|
|
Ether *e;
|
|
Ctlr *c;
|
|
Tx *tx;
|
|
|
|
e = v;
|
|
c = e->ctlr;
|
|
tx = &c->tx;
|
|
for(;;){
|
|
sleep(&c->txrendez, txcansleep, c);
|
|
txcleanup(tx, gbit32(c->stats->txcnt));
|
|
}
|
|
}
|
|
|
|
static void
|
|
submittx(Tx *tx, int n)
|
|
{
|
|
Send *l, *h;
|
|
int i0, i, m;
|
|
|
|
m = tx->m;
|
|
i0 = tx->i & m;
|
|
l = tx->lanai;
|
|
h = tx->host;
|
|
for(i = n-1; i >= 0; i--)
|
|
jehanne_memmove(l+(i + i0 & m), h+(i + i0 & m), sizeof *h);
|
|
tx->i += n;
|
|
// coherence();
|
|
}
|
|
|
|
static int
|
|
nsegments(Block *b, uint32_t segsz)
|
|
{
|
|
uintmem bus, end, slen, len;
|
|
int i;
|
|
|
|
bus = PCIWADDR64(b->rp);
|
|
i = 0;
|
|
for(len = BLEN(b); len; len -= slen){
|
|
end = bus + segsz & ~(uintmem)(segsz-1);
|
|
slen = end - bus;
|
|
if(slen > len)
|
|
slen = len;
|
|
bus += slen;
|
|
i++;
|
|
}
|
|
return i;
|
|
}
|
|
|
|
static void
|
|
m10gtransmit(Ether *e)
|
|
{
|
|
uint16_t slen;
|
|
uint32_t i, cnt, rdma, nseg, count, len;
|
|
uint64_t bus, end, segsz;
|
|
uint8_t flags;
|
|
Block *b;
|
|
Ctlr *c;
|
|
Send *s, *s0, *s0m8;
|
|
Tx *tx;
|
|
|
|
c = e->ctlr;
|
|
tx = &c->tx;
|
|
segsz = tx->segsz;
|
|
|
|
qlock(tx);
|
|
count = 0;
|
|
s = tx->host + (tx->i & tx->m);
|
|
cnt = tx->cnt;
|
|
s0 = tx->host + (cnt & tx->m);
|
|
s0m8 = tx->host + ((cnt - 8) & tx->m);
|
|
i = tx->i;
|
|
for(; s >= s0 || s < s0m8; i += nseg){
|
|
if((b = qget(e->netif.oq)) == nil)
|
|
break;
|
|
flags = SFfirst|SFnotso;
|
|
if((len = BLEN(b)) < 1520)
|
|
flags |= SFsmall;
|
|
rdma = nseg = nsegments(b, segsz);
|
|
bus = PCIWADDR64(b->rp);
|
|
for(; len; len -= slen){
|
|
end = bus + segsz & ~(segsz-1);
|
|
slen = end - bus;
|
|
if(slen > len)
|
|
slen = len;
|
|
s->high = pbit32(bus>>32);
|
|
s->low = pbit32(bus);
|
|
s->len = pbit16(slen);
|
|
s->nrdma = rdma;
|
|
s->flags = flags;
|
|
|
|
bus += slen;
|
|
if(++s == tx->host + tx->n)
|
|
s = tx->host;
|
|
count++;
|
|
flags &= ~SFfirst;
|
|
rdma = 1;
|
|
}
|
|
tx->bring[i + nseg - 1 & tx->m] = b;
|
|
if(1 || count > 0){
|
|
submittx(tx, count);
|
|
count = 0;
|
|
cnt = tx->cnt;
|
|
s0 = tx->host + (cnt & tx->m);
|
|
s0m8 = tx->host + ((cnt - 8) & tx->m);
|
|
}
|
|
}
|
|
qunlock(tx);
|
|
}
|
|
|
|
static void
|
|
checkstats(Ether *e, Ctlr *c, Stats *s)
|
|
{
|
|
uint32_t i;
|
|
|
|
if(s->updated == 0)
|
|
return;
|
|
|
|
i = gbit32(s->linkstat);
|
|
if(c->linkstat != i){
|
|
e->netif.link = i;
|
|
if(c->linkstat = i)
|
|
dprint("m10g: link up\n");
|
|
else
|
|
dprint("m10g: link down\n");
|
|
}
|
|
i = gbit32(s->nrdma);
|
|
if(i != c->nrdma){
|
|
dprint("m10g: rdma timeout %d\n", i);
|
|
c->nrdma = i;
|
|
}
|
|
}
|
|
|
|
static void
|
|
waitintx(Ctlr *c)
|
|
{
|
|
int i;
|
|
|
|
for(i = 0; i < 1024*1024; i++){
|
|
if(c->stats->valid == 0)
|
|
break;
|
|
coherence();
|
|
}
|
|
}
|
|
|
|
static void
|
|
m10ginterrupt(Ureg * _1, void *v)
|
|
{
|
|
Ether *e;
|
|
Ctlr *c;
|
|
|
|
e = v;
|
|
c = e->ctlr;
|
|
|
|
if(c->state != Runed || c->stats->valid == 0) /* not ready for us? */
|
|
return;
|
|
|
|
if(c->stats->valid & 1)
|
|
wakeup(&c->rxrendez);
|
|
if(gbit32(c->stats->txcnt) != c->tx.npkt)
|
|
wakeup(&c->txrendez);
|
|
if(c->msi == 0)
|
|
*c->irqdeass = 0;
|
|
else
|
|
c->stats->valid = 0;
|
|
waitintx(c);
|
|
checkstats(e, c, c->stats);
|
|
c->irqack[1] = pbit32(3);
|
|
}
|
|
|
|
static void
|
|
m10gattach(Ether *e)
|
|
{
|
|
Ctlr *c;
|
|
char name[12];
|
|
|
|
dprint("m10gattach\n");
|
|
|
|
qlock(e->ctlr);
|
|
c = e->ctlr;
|
|
if(c->state != Detached){
|
|
qunlock(c);
|
|
return;
|
|
}
|
|
if(waserror()){
|
|
c->state = Detached;
|
|
qunlock(c);
|
|
nexterror();
|
|
}
|
|
reset(e, c);
|
|
c->state = Attached;
|
|
open0(e, c);
|
|
if(c->kprocs == 0){
|
|
c->kprocs++;
|
|
jehanne_snprint(name, sizeof name, "#l%drxproc", e->ctlrno);
|
|
kproc(name, m10rx, e);
|
|
jehanne_snprint(name, sizeof name, "#l%dtxproc", e->ctlrno);
|
|
kproc(name, txproc, e);
|
|
}
|
|
c->state = Runed;
|
|
qunlock(c);
|
|
poperror();
|
|
}
|
|
|
|
static int
|
|
m10gdetach(Ctlr *c)
|
|
{
|
|
dprint("m10gdetach\n");
|
|
// reset(e->ctlr);
|
|
vunmap(c->ram, c->pcidev->mem[0].size);
|
|
ctlrfree(c);
|
|
return -1;
|
|
}
|
|
|
|
static int
|
|
lstcount(Block *b)
|
|
{
|
|
int i;
|
|
|
|
i = 0;
|
|
for(; b; b = b->next)
|
|
i++;
|
|
return i;
|
|
}
|
|
|
|
static long
|
|
m10gifstat(Ether *e, void *v, long n, uint32_t off)
|
|
{
|
|
int l, lim;
|
|
char *p;
|
|
Ctlr *c;
|
|
Stats s;
|
|
|
|
c = e->ctlr;
|
|
lim = 2*READSTR-1;
|
|
p = jehanne_malloc(lim+1);
|
|
l = 0;
|
|
/* no point in locking this because this is done via dma. */
|
|
jehanne_memmove(&s, c->stats, sizeof s);
|
|
|
|
// l +=
|
|
jehanne_snprint(p+l, lim,
|
|
"txcnt = %ud\n" "linkstat = %ud\n" "dlink = %ud\n"
|
|
"derror = %ud\n" "drunt = %ud\n" "doverrun = %ud\n"
|
|
"dnosm = %ud\n" "dnobg = %ud\n" "nrdma = %ud\n"
|
|
"txstopped = %ud\n" "down = %ud\n" "updated = %ud\n"
|
|
"valid = %ud\n\n"
|
|
"tx pkt = %uld\n" "tx bytes = %lld\n"
|
|
"tx cnt = %ud\n" "tx n = %ud\n" "tx i = %ud\n"
|
|
"sm cnt = %ud\n" "sm i = %ud\n" "sm n = %ud\n"
|
|
"sm lst = %ud\n"
|
|
"bg cnt = %ud\n" "bg i = %ud\n" "bg n = %ud\n"
|
|
"bg lst = %ud\n"
|
|
"segsz = %ud\n" "coal = %d\n",
|
|
gbit32(s.txcnt), gbit32(s.linkstat), gbit32(s.dlink),
|
|
gbit32(s.derror), gbit32(s.drunt), gbit32(s.doverrun),
|
|
gbit32(s.dnosm), gbit32(s.dnobg), gbit32(s.nrdma),
|
|
s.txstopped, s.down, s.updated, s.valid,
|
|
c->tx.npkt, c->tx.nbytes,
|
|
c->tx.cnt, c->tx.n, c->tx.i,
|
|
c->sm.cnt, c->sm.i, c->sm.pool->n, lstcount(c->sm.pool->head),
|
|
c->bg.cnt, c->bg.i, c->bg.pool->n, lstcount(c->bg.pool->head),
|
|
c->tx.segsz, gbit32((uint8_t*)c->coal));
|
|
|
|
n = readstr(off, v, n, p);
|
|
jehanne_free(p);
|
|
return n;
|
|
}
|
|
|
|
//static void
|
|
//summary(Ether *e)
|
|
//{
|
|
// char *buf;
|
|
// int n, i, j;
|
|
//
|
|
// if(e == 0)
|
|
// return;
|
|
// buf = jehanne_malloc(n=250);
|
|
// if(buf == 0)
|
|
// return;
|
|
//
|
|
// jehanne_snprint(buf, n, "oq\n");
|
|
// qsummary(e->netif.oq, buf+3, n-3-1);
|
|
// iprint("%s", buf);
|
|
//
|
|
// if(e->f) for(i = 0; e->f[i]; i++){
|
|
// j = jehanne_snprint(buf, n, "f%d %d\n", i, e->f[i]->type);
|
|
// qsummary(e->f[i]->in, buf+j, n-j-1);
|
|
// jehanne_print("%s", buf);
|
|
// }
|
|
//
|
|
// jehanne_free(buf);
|
|
//}
|
|
|
|
static void
|
|
rxring(Ctlr *c)
|
|
{
|
|
Done *d;
|
|
Slot *s;
|
|
Slotparts *sp;
|
|
int i;
|
|
|
|
d = &c->done;
|
|
s = d->entry;
|
|
for(i = 0; i < d->n; i++) {
|
|
sp = (Slotparts *)(s + i);
|
|
if(sp->len)
|
|
iprint("s[%d] = %d\n", i, sp->len);
|
|
}
|
|
}
|
|
|
|
enum {
|
|
CMdebug,
|
|
CMcoal,
|
|
CMwakeup,
|
|
CMtxwakeup,
|
|
CMqsummary,
|
|
CMrxring,
|
|
};
|
|
|
|
static Cmdtab ctab[] = {
|
|
CMdebug, "debug", 2,
|
|
CMcoal, "coal", 2,
|
|
CMwakeup, "wakeup", 1,
|
|
CMtxwakeup, "txwakeup", 1,
|
|
// CMqsummary, "q", 1,
|
|
CMrxring, "rxring", 1,
|
|
};
|
|
|
|
static long
|
|
m10gctl(Ether *e, void *v, long n)
|
|
{
|
|
int i;
|
|
Cmdbuf *c;
|
|
Cmdtab *t;
|
|
|
|
dprint("m10gctl\n");
|
|
if(e->ctlr == nil)
|
|
error(Enonexist);
|
|
|
|
c = parsecmd(v, n);
|
|
if(waserror()){
|
|
jehanne_free(c);
|
|
nexterror();
|
|
}
|
|
t = lookupcmd(c, ctab, nelem(ctab));
|
|
switch(t->index){
|
|
case CMdebug:
|
|
debug = (jehanne_strcmp(c->f[1], "on") == 0);
|
|
break;
|
|
case CMcoal:
|
|
i = jehanne_atoi(c->f[1]);
|
|
if(i < 0 || i > 1000)
|
|
error(Ebadarg);
|
|
*((Ctlr*)e->ctlr)->coal = pbit32(i);
|
|
break;
|
|
case CMwakeup:
|
|
wakeup(&((Ctlr*)e->ctlr)->rxrendez); /* you're kidding, right? */
|
|
break;
|
|
case CMtxwakeup:
|
|
wakeup(&((Ctlr*)e->ctlr)->txrendez); /* you're kidding, right? */
|
|
break;
|
|
// case CMqsummary:
|
|
// summary(e);
|
|
// break;
|
|
case CMrxring:
|
|
rxring(e->ctlr);
|
|
break;
|
|
default:
|
|
error(Ebadarg);
|
|
}
|
|
jehanne_free(c);
|
|
poperror();
|
|
return n;
|
|
}
|
|
|
|
static void
|
|
m10gshutdown(Ether *e)
|
|
{
|
|
dprint("m10gshutdown\n");
|
|
m10gdetach(e->ctlr);
|
|
}
|
|
|
|
static void
|
|
m10gpromiscuous(void *v, int on)
|
|
{
|
|
Ether *e;
|
|
int i;
|
|
|
|
dprint("m10gpromiscuous\n");
|
|
e = v;
|
|
if(on)
|
|
i = Cpromisc;
|
|
else
|
|
i = Cnopromisc;
|
|
cmd(e->ctlr, i, 0);
|
|
}
|
|
|
|
static int mcctab[] = { CSleavemc, CSjoinmc };
|
|
static char *mcntab[] = { "leave", "join" };
|
|
|
|
static void
|
|
m10gmulticast(void *v, uint8_t *ea, int on)
|
|
{
|
|
Ether *e;
|
|
int i;
|
|
|
|
dprint("m10gmulticast\n");
|
|
e = v;
|
|
if((i = maccmd(e->ctlr, mcctab[on], ea)) != 0)
|
|
jehanne_print("m10g: can't %s %E: %d\n", mcntab[on], ea, i);
|
|
}
|
|
|
|
static void
|
|
m10gpci(void)
|
|
{
|
|
Pcidev *p;
|
|
Ctlr *t, *c;
|
|
|
|
t = 0;
|
|
for(p = 0; p = pcimatch(p, 0x14c1, 0x0008); ){
|
|
c = jehanne_malloc(sizeof *c);
|
|
if(c == nil)
|
|
continue;
|
|
jehanne_memset(c, 0, sizeof *c);
|
|
c->pcidev = p;
|
|
c->id = p->did<<16 | p->vid;
|
|
// c->boot = pcicap(p, PciCapVND);
|
|
// if(c->boot != ~(uintmem)0){
|
|
// kickthebaby(p, c);
|
|
// }
|
|
pcisetbme(p);
|
|
if(setmem(p, c) == -1){
|
|
jehanne_print("m10g failed\n");
|
|
jehanne_free(c);
|
|
/* cleanup */
|
|
continue;
|
|
}
|
|
if(t)
|
|
t->next = c;
|
|
else
|
|
ctlrs = c;
|
|
t = c;
|
|
}
|
|
}
|
|
|
|
static int
|
|
m10gpnp(Ether *e)
|
|
{
|
|
Ctlr *c;
|
|
|
|
if(ctlrs == nil)
|
|
m10gpci();
|
|
|
|
for(c = ctlrs; c != nil; c = c->next)
|
|
if(c->active)
|
|
continue;
|
|
else if(e->port == 0 || e->port == c->port)
|
|
break;
|
|
if(c == nil)
|
|
return -1;
|
|
c->active = 1;
|
|
|
|
e->ctlr = c;
|
|
e->port = c->port;
|
|
e->irq = c->pcidev->intl;
|
|
e->tbdf = c->pcidev->tbdf;
|
|
e->netif.mbps = 10000;
|
|
jehanne_memmove(e->ea, c->ra, Eaddrlen);
|
|
|
|
e->attach = m10gattach;
|
|
e->detach = m10gshutdown;
|
|
e->transmit = m10gtransmit;
|
|
e->interrupt = m10ginterrupt;
|
|
e->ifstat = m10gifstat;
|
|
e->ctl = m10gctl;
|
|
// e->power = m10gpower;
|
|
e->shutdown = m10gshutdown;
|
|
|
|
e->netif.arg = e;
|
|
e->netif.promiscuous = m10gpromiscuous;
|
|
e->netif.multicast = m10gmulticast;
|
|
|
|
return 0;
|
|
}
|
|
|
|
void
|
|
etherm10glink(void)
|
|
{
|
|
addethercard("m10g", m10gpnp);
|
|
}
|