330 lines
6.6 KiB
C
330 lines
6.6 KiB
C
/*
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* This file is part of the UCB release of Plan 9. It is subject to the license
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* terms in the LICENSE file found in the top-level directory of this
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* distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
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* part of the UCB release of Plan 9, including this file, may be copied,
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* modified, propagated, or distributed except according to the terms contained
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* in the LICENSE file.
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*/
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#include <u.h>
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#include <lib9.h>
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#include <bio.h>
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#include "pci.h"
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#include "vga.h"
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/*
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* IBM RGB52x and compatibles.
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* High Performance Palette DAC.
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*/
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uint8_t (*rgb524mnxi)(Vga*, int);
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void (*rgb524mnxo)(Vga*, int, uint8_t);
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enum { /* index registers */
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MiscClock = 0x02,
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SyncControl = 0x03,
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HSyncControl = 0x04,
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PowerMgmnt = 0x05,
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PaletteControl = 0x07,
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SYSCLKControl = 0x08,
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PixelFormat = 0x0A,
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Pixel8Control = 0x0B,
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Pixel16Control = 0x0C,
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Pixel32Control = 0x0E,
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PLLControl1 = 0x10,
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PLLControl2 = 0x11,
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SYSCLKN = 0x15,
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SYSCLKM = 0x16,
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M0 = 0x20,
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N0 = 0x21,
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MiscControl1 = 0x70,
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MiscControl2 = 0x71,
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};
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static void
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clock(Vga* vga, Ctlr* ctlr, uint32_t fref, uint32_t maxpclk)
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{
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int d, mind;
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uint32_t df, f, m, n, vrf;
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mind = vga->f[0]+1;
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for(df = 0; df < 4; df++){
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for(m = 2; m < 64; m++){
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for(n = 2; n < 32; n++){
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f = (fref*(m+65))/n;
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switch(df){
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case 0:
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vrf = fref/(n*2);
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if(vrf > maxpclk/4 || vrf < 1000000)
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continue;
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f /= 8;
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break;
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case 1:
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vrf = fref/(n*2);
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if(vrf > maxpclk/2 || vrf < 1000000)
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continue;
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f /= 4;
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break;
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case 2:
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vrf = fref/(n*2);
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if(vrf > maxpclk || vrf < 1000000)
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continue;
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f /= 2;
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break;
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case 3:
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vrf = fref/n;
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if(vrf > maxpclk || vrf < 1000000)
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continue;
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break;
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}
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if(f > maxpclk)
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continue;
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d = vga->f[0] - f;
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if(d < 0)
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d = -d;
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if(d <= mind){
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vga->m[0] = m;
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vga->n[0] = n;
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vga->d[0] = df;
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mind = d;
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}
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}
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}
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}
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}
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static void
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init(Vga* vga, Ctlr* ctlr)
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{
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uint32_t fref, maxpclk;
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char *p, *val;
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/*
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* Part comes in at least a -170MHz speed-grade.
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*/
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maxpclk = 170000000;
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if(p = strrchr(ctlr->name, '-'))
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maxpclk = strtoul(p+1, 0, 0) * 1000000;
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/*
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* If we don't already have a desired pclk,
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* take it from the mode.
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* Check it's within range.
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*/
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if(vga->f[0] == 0)
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vga->f[0] = vga->mode->frequency;
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if(vga->f[0] > maxpclk)
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error("%s: invalid pclk - %ld\n", ctlr->name, vga->f[0]);
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if(val = dbattr(vga->attr, "rgb524mnrefclk"))
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fref = strtol(val, 0, 0);
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else
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fref = RefFreq;
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/*
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* Initialise the PLL parameters.
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* Use m/n pair 2.
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*/
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clock(vga, ctlr, fref, maxpclk);
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vga->i[0] = 2;
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ctlr->flag |= Finit;
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}
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static void
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load(Vga* vga, Ctlr* ctlr)
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{
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char *val;
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int hsyncdelay, x;
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if(rgb524mnxi == nil && rgb524mnxo == nil)
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error("%s->load: no access routines\n", ctlr->name);
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/*
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* Set the m/n values for the desired frequency and
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* set pixel control to use compatibility mode with
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* internal frequency select using the specified set
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* of m/n registers.
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*/
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rgb524mnxo(vga, M0+vga->i[0]*2, vga->d[0]<<6|vga->m[0]);
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rgb524mnxo(vga, N0+vga->i[0]*2, vga->n[0]);
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rgb524mnxo(vga, PLLControl2, vga->i[0]);
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rgb524mnxo(vga, PLLControl1, 0x03);
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/*
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* Enable pixel programming in MiscClock;
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* nothing to do in MiscControl1;
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* set internal PLL clock and !vga in MiscControl2;
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*/
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x = rgb524mnxi(vga, MiscClock) & ~0x01;
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x |= 0x01;
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rgb524mnxo(vga, MiscClock, x);
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x = rgb524mnxi(vga, MiscControl2) & ~0x41;
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x |= 0x41;
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rgb524mnxo(vga, MiscControl2, x);
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/*
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* Syncs.
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*/
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x = 0;
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if(vga->mode->hsync == '+')
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x |= 0x10;
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if(vga->mode->vsync == '+')
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x |= 0x20;
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rgb524mnxo(vga, SyncControl, x);
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if(val = dbattr(vga->mode->attr, "hsyncdelay"))
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hsyncdelay = strtol(val, 0, 0);
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else switch(vga->mode->z){
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default:
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case 8:
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hsyncdelay = 1;
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break;
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case 15:
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case 16:
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hsyncdelay = 5;
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break;
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case 32:
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hsyncdelay = 7;
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break;
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}
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rgb524mnxo(vga, HSyncControl, hsyncdelay);
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rgb524mnxo(vga, SYSCLKM, 0x50);
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rgb524mnxo(vga, SYSCLKN, 0x08);
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sleep(50);
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//rgb524mnxo(vga, SYSCLKM, 0x6F);
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//rgb524mnxo(vga, SYSCLKN, 0x0F);
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//sleep(500);
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/*
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* Set the palette for the desired format.
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* ****NEEDS WORK FOR OTHER THAN 8-BITS****
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*/
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rgb524mnxo(vga, PaletteControl, 0x00);
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switch(vga->mode->z){
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case 8:
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rgb524mnxo(vga, PixelFormat, 0x03);
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rgb524mnxo(vga, Pixel8Control, 0x00);
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break;
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case 15:
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rgb524mnxo(vga, PixelFormat, 0x04);
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rgb524mnxo(vga, Pixel16Control, 0xC4);
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case 16:
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rgb524mnxo(vga, PixelFormat, 0x04);
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rgb524mnxo(vga, Pixel16Control, 0xC6);
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break;
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case 32:
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rgb524mnxo(vga, PixelFormat, 0x06);
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rgb524mnxo(vga, Pixel32Control, 0x03);
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break;
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}
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}
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static void
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dumpclock(Vga* vga, Ctlr* ctlr, uint32_t fref, uint32_t m, uint32_t n,
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char* name)
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{
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uint32_t df, f;
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df = (m>>6) & 0x03;
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m &= 0x3F;
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n &= 0x1F;
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if(m == 0 || n == 0)
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return;
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f = (fref*(m+65))/n;
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switch(df){
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case 0:
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f /= 8;
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break;
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case 1:
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f /= 4;
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break;
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case 2:
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f /= 2;
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break;
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case 3:
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break;
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}
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printitem(ctlr->name, name);
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Bprint(&stdout, "%12lud\n", f);
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}
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static void
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dump(Vga* vga, Ctlr* ctlr)
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{
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int i;
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char *val;
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uint8_t x[256];
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uint32_t fref, fs;
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if(rgb524mnxi == nil && rgb524mnxo == nil)
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error("%s->dump: no access routines\n", ctlr->name);
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printitem(ctlr->name, "index00");
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for(i = 0x00; i < 0x0F; i++){
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x[i] = rgb524mnxi(vga, i);
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printreg(x[i]);
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}
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printitem(ctlr->name, "index10");
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for(i = 0x10; i < 0x18; i++){
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x[i] = rgb524mnxi(vga, i);
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printreg(x[i]);
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}
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printitem(ctlr->name, "index20");
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for(i = 0x20; i < 0x30; i++){
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x[i] = rgb524mnxi(vga, i);
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printreg(x[i]);
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}
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printitem(ctlr->name, "index30");
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for(i = 0x30; i < 0x39; i++){
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x[i] = rgb524mnxi(vga, i);
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printreg(x[i]);
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}
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printitem(ctlr->name, "index40");
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for(i = 0x40; i < 0x49; i++){
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x[i] = rgb524mnxi(vga, i);
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printreg(x[i]);
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}
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printitem(ctlr->name, "index60");
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for(i = 0x60; i < 0x63; i++){
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x[i] = rgb524mnxi(vga, i);
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printreg(x[i]);
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}
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printitem(ctlr->name, "index70");
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for(i = 0x70; i < 0x73; i++){
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x[i] = rgb524mnxi(vga, i);
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printreg(x[i]);
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}
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printitem(ctlr->name, "index8E");
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for(i = 0x8E; i < 0x92; i++){
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x[i] = rgb524mnxi(vga, i);
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printreg(x[i]);
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}
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if(val = dbattr(vga->attr, "rgb524mnrefclk"))
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fref = strtol(val, 0, 0);
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else
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fref = RefFreq;
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if(!(x[SYSCLKControl] & 0x04))
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dumpclock(vga, ctlr, fref, x[0x16], x[0x15], "sysclk");
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fs = x[PLLControl1] & 0x07;
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if(fs == 0x01 || fs == 0x03){
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if(fs == 0x01)
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i = ((vga->misc>>2) & 0x03)*2;
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else
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i = x[PLLControl2] & 0x07;
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dumpclock(vga, ctlr, fref, x[M0+i*2], x[N0+i*2], "pllclk");
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}
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}
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Ctlr rgb524mn = {
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"rgb524mn", /* name */
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0, /* snarf */
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0, /* options */
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init, /* init */
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load, /* load */
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dump, /* dump */
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};
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