121 lines
2.0 KiB
C
121 lines
2.0 KiB
C
#include "u.h"
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#include "../port/lib.h"
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#include "mem.h"
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#include "dat.h"
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#include "fns.h"
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#include "io.h"
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#include "apic.h"
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enum {
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Dpcicap = 1<<0,
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Dmsicap = 1<<1,
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Dvec = 1<<2,
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Debug = 0,
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};
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enum {
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/* address */
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Msiabase = 0xfee00000u,
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Msiadest = 1<<12, /* same as 63:56 of apic vector */
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Msiaedest = 1<<4, /* same as 55:48 of apic vector */
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Msialowpri = 1<<3, /* redirection hint */
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Msialogical = 1<<2,
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/* data */
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Msidlevel = 1<<15,
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Msidassert = 1<<14,
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Msidlogical = 1<<11,
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Msidmode = 1<<8, /* 3 bits; delivery mode */
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Msidvector = 0xff<<0,
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};
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enum{
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/* msi capabilities */
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Vmask = 1<<8,
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Cap64 = 1<<7,
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Mmesgmsk = 7<<4,
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Mmcap = 7<<1,
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Msienable = 1<<0,
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};
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static int
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msicap(Pcidev *p)
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{
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int c;
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c = pcicap(p, PciCapMSI);
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if(c == -1)
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return 0;
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return c;
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}
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static int
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blacklist(Pcidev *p)
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{
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switch(p->vid<<16 | p->did){
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case 0x11ab<<16 | 0x6485:
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return -1;
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}
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return 0;
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}
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int
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pcimsienable(Pcidev *p, uint64_t vec)
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{
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char *s;
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uint32_t c, f, d, datao, lopri, dmode, logical;
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if(ioconf.nomsi)
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return -1;
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c = msicap(p);
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if(c == 0)
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return -1;
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f = pcicfgr16(p, c + 2) & ~Mmesgmsk;
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if(blacklist(p) != 0)
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return -1;
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datao = 8;
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d = vec>>48;
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lopri = (vec & 0x700) == MTlp;
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logical = (vec & Lm) != 0;
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pcicfgw32(p, c + 4, Msiabase | Msiaedest * d
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| Msialowpri * lopri | Msialogical * logical);
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if(f & Cap64){
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datao += 4;
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pcicfgw32(p, c + 8, 0);
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}
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dmode = (vec >> 8) & 7;
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pcicfgw16(p, c + datao, Msidassert | Msidlogical * logical
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| Msidmode * dmode | (uint32_t)vec & 0xff);
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if(f & Vmask)
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pcicfgw32(p, c + datao + 4, 0);
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/* leave vectors configured but disabled for debugging */
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if((s = getconf("*nomsi")) != nil && jehanne_atoi(s) != 0)
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return -1;
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pcicfgw16(p, c + 2, f);
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return 0;
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}
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int
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pcimsimask(Pcidev *p, int mask)
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{
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uint32_t c, f;
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c = msicap(p);
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if(c == 0)
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return -1;
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f = pcicfgr16(p, c + 2) & ~Msienable;
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if(mask){
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pcicfgw16(p, c + 2, f & ~Msienable);
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// pciclrbme(p); cheeze
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}else{
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pcisetbme(p);
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pcicfgw16(p, c + 2, f | Msienable);
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}
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return 0;
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}
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