438 lines
8.7 KiB
C
438 lines
8.7 KiB
C
/*
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* This file is part of the UCB release of Plan 9. It is subject to the license
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* terms in the LICENSE file found in the top-level directory of this
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* distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
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* part of the UCB release of Plan 9, including this file, may be copied,
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* modified, propagated, or distributed except according to the terms contained
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* in the LICENSE file.
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*/
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#include "u.h"
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#include "../port/lib.h"
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#include "mem.h"
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#include "dat.h"
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#include "fns.h"
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#include "io.h"
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#include "mp.h"
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static PCMP *pcmp;
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static char* buses[] = {
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"CBUSI ",
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"CBUSII",
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"EISA ",
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"FUTURE",
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"INTERN",
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"ISA ",
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"MBI ",
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"MBII ",
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"MCA ",
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"MPI ",
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"MPSA ",
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"NUBUS ",
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"PCI ",
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"PCMCIA",
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"TC ",
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"VL ",
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"VME ",
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"XPRESS",
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0,
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};
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static Bus*
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mpgetbus(int busno)
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{
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Bus *bus;
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for(bus = mpbus; bus; bus = bus->next)
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if(bus->busno == busno)
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return bus;
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print("mpgetbus: can't find bus %d\n", busno);
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return 0;
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}
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static Apic*
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mkprocessor(PCMPprocessor* p)
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{
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static int machno = 1;
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int apicno;
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Apic *apic;
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apicno = p->apicno;
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if(!(p->flags & PcmpEN) || apicno > MaxAPICNO || mpapic[apicno] != nil)
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return 0;
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if((apic = xalloc(sizeof(Apic))) == nil)
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panic("mkprocessor: no memory for Apic");
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apic->type = PcmpPROCESSOR;
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apic->apicno = apicno;
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apic->flags = p->flags;
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apic->lintr[0] = ApicIMASK;
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apic->lintr[1] = ApicIMASK;
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if(p->flags & PcmpBP)
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apic->machno = 0;
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else
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apic->machno = machno++;
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mpapic[apicno] = apic;
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return apic;
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}
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static Bus*
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mkbus(PCMPbus* p)
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{
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Bus *bus;
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int i;
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for(i = 0; buses[i]; i++)
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if(strncmp(buses[i], p->string, sizeof(p->string)) == 0)
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break;
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if(buses[i] == 0)
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return 0;
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if((bus = xalloc(sizeof(Bus))) == nil)
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panic("mkbus: no memory for Bus");
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if(mpbus)
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mpbuslast->next = bus;
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else
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mpbus = bus;
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mpbuslast = bus;
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bus->type = i;
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bus->busno = p->busno;
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if(bus->type == BusEISA){
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bus->po = PcmpLOW;
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bus->el = PcmpLEVEL;
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if(mpeisabus != -1)
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print("mkbus: more than one EISA bus\n");
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mpeisabus = bus->busno;
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}
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else if(bus->type == BusPCI){
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bus->po = PcmpLOW;
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bus->el = PcmpLEVEL;
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}
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else if(bus->type == BusISA){
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bus->po = PcmpHIGH;
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bus->el = PcmpEDGE;
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if(mpisabus != -1)
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print("mkbus: more than one ISA bus\n");
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mpisabus = bus->busno;
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}
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else{
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bus->po = PcmpHIGH;
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bus->el = PcmpEDGE;
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}
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return bus;
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}
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static Apic*
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mkioapic(PCMPioapic* p)
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{
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void *va;
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int apicno;
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Apic *apic;
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apicno = p->apicno;
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if(!(p->flags & PcmpEN) || apicno > MaxAPICNO || mpioapic[apicno] != nil)
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return 0;
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/*
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* Map the I/O APIC.
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*/
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if((va = vmap(p->addr, 1024)) == nil)
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return 0;
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if((apic = xalloc(sizeof(Apic))) == nil)
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panic("mkioapic: no memory for Apic");
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apic->type = PcmpIOAPIC;
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apic->apicno = apicno;
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apic->addr = va;
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apic->paddr = p->addr;
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apic->flags = p->flags;
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mpioapic[apicno] = apic;
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return apic;
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}
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static Aintr*
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mkiointr(PCMPintr* p)
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{
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Bus *bus;
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Aintr *aintr;
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PCMPintr* pcmpintr;
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/*
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* According to the MultiProcessor Specification, a destination
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* I/O APIC of 0xFF means the signal is routed to all I/O APICs.
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* It's unclear how that can possibly be correct so treat it as
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* an error for now.
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*/
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if(p->apicno > MaxAPICNO || mpioapic[p->apicno] == nil)
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return 0;
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if((bus = mpgetbus(p->busno)) == 0)
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return 0;
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if((aintr = xalloc(sizeof(Aintr))) == nil)
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panic("mkiointr: no memory for Aintr");
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aintr->intr = p;
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if(0)
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print("mkiointr: type %d intr type %d flags %#o "
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"bus %d irq %d apicno %d intin %d\n",
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p->type, p->intr, p->flags,
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p->busno, p->irq, p->apicno, p->intin);
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/*
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* Hack for Intel SR1520ML motherboard, which BIOS describes
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* the i82575 dual ethernet controllers incorrectly.
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*/
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if(memcmp(pcmp->product, "INTEL X38MLST ", 20) == 0){
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if(p->busno == 1 && p->intin == 16 && p->irq == 1){
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if((pcmpintr = xalloc(sizeof(PCMPintr))) == nil)
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panic("iointr: no memory for PCMPintr");
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memmove(pcmpintr, p, sizeof(PCMPintr));
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print("mkiointr: %20.20s bus %d intin %d irq %d\n",
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(char*)pcmp->product,
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pcmpintr->busno, pcmpintr->intin,
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pcmpintr->irq);
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pcmpintr->intin = 17;
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aintr->intr = pcmpintr;
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}
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}
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aintr->apic = mpioapic[p->apicno];
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aintr->next = bus->aintr;
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bus->aintr = aintr;
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return aintr;
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}
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static int
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mklintr(PCMPintr* p)
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{
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Apic *apic;
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Bus *bus;
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int i, intin, v;
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/*
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* The offsets of vectors for LINT[01] are known to be
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* 0 and 1 from the local APIC vector space at VectorLAPIC.
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*/
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if((bus = mpgetbus(p->busno)) == 0)
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return 0;
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intin = p->intin;
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/*
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* Pentium Pros have problems if LINT[01] are set to ExtINT
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* so just bag it, SMP mode shouldn't need ExtINT anyway.
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*/
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if(p->intr == PcmpExtINT || p->intr == PcmpNMI)
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v = ApicIMASK;
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else
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v = mpintrinit(bus, p, VectorLAPIC+intin, p->irq);
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if(p->apicno == 0xFF){
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for(i=0; i<=MaxAPICNO; i++){
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if((apic = mpapic[i]) == nil)
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continue;
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if(apic->flags & PcmpEN)
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apic->lintr[intin] = v;
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}
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}
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else{
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if(apic = mpapic[p->apicno])
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if(apic->flags & PcmpEN)
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apic->lintr[intin] = v;
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}
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return v;
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}
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static void
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dumpmp(uint8_t *p, uint8_t *e)
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{
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int i;
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for(i = 0; p < e; p++) {
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if((i % 16) == 0) print("*mp%d=", i/16);
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print("%.2x ", *p);
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if((++i % 16) == 0) print("\n");
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}
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if((i % 16) != 0) print("\n");
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}
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static void
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mpoverride(uint8_t** newp, uint8_t** e)
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{
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int size, i, j;
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char buf[20];
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uint8_t* p;
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char* s;
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size = strtol(getconf("*mp"), 0, 0);
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if(size <= 0) panic("mpoverride: invalid size in *mp");
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*newp = p = xalloc(size);
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if(p == nil) panic("mpoverride: can't allocate memory");
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*e = p + size;
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for(i = 0; ; i++){
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snprint(buf, sizeof buf, "*mp%d", i);
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s = getconf(buf);
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if(s == nil) break;
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while(*s){
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j = strtol(s, &s, 16);
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if(*s && *s != ' ' || j < 0 || j > 0xff) panic("mpoverride: invalid entry in %s", buf);
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if(p >= *e) panic("mpoverride: overflow in %s", buf);
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*p++ = j;
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}
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}
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if(p != *e) panic("mpoverride: size doesn't match");
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}
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static void
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pcmpinit(void)
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{
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uint8_t *p, *e;
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Apic *apic;
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void *va;
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/*
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* Map the local APIC.
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*/
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va = vmap(pcmp->lapicbase, 1024);
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print("LAPIC: %.8lux %#p\n", pcmp->lapicbase, va);
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if(va == nil)
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panic("pcmpinit: cannot map lapic %.8lux", pcmp->lapicbase);
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p = ((uint8_t*)pcmp)+PCMPsz;
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e = ((uint8_t*)pcmp)+pcmp->length;
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if(getconf("*dumpmp") != nil)
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dumpmp(p, e);
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if(getconf("*mp") != nil)
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mpoverride(&p, &e);
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/*
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* Run through the table saving information needed for starting
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* application processors and initialising any I/O APICs. The table
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* is guaranteed to be in order such that only one pass is necessary.
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*/
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while(p < e) switch(*p){
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default:
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print("pcmpinit: unknown PCMP type 0x%uX (e-p 0x%zuX)\n",
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*p, e-p);
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while(p < e){
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print("%uX ", *p);
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p++;
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}
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break;
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case PcmpPROCESSOR:
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if(apic = mkprocessor((PCMPprocessor*)p)){
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apic->addr = va;
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apic->paddr = pcmp->lapicbase;
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}
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p += PCMPprocessorsz;
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continue;
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case PcmpBUS:
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mkbus((PCMPbus*)p);
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p += PCMPbussz;
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continue;
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case PcmpIOAPIC:
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if(apic = mkioapic((PCMPioapic*)p))
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ioapicinit(apic, apic->apicno);
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p += PCMPioapicsz;
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continue;
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case PcmpIOINTR:
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mkiointr((PCMPintr*)p);
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p += PCMPintrsz;
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continue;
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case PcmpLINTR:
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mklintr((PCMPintr*)p);
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p += PCMPintrsz;
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continue;
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}
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/*
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* Ininitalize local APIC and start application processors.
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*/
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mpinit();
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}
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static void
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mpreset(void)
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{
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/* stop application processors */
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mpshutdown();
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/* do generic reset */
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archreset();
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}
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static int identify(void);
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PCArch archmp = {
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.id= "_MP_",
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.ident= identify,
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.reset= mpreset,
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.intrinit= pcmpinit,
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.intrenable= mpintrenable,
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.intron= lapicintron,
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.introff= lapicintroff,
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.fastclock= i8253read,
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.timerset= lapictimerset,
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};
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static int
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identify(void)
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{
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char *cp;
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_MP_ *_mp_;
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uint32_t len;
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if((cp = getconf("*nomp")) != nil && strcmp(cp, "0") != 0)
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return 1;
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/*
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* Search for an MP configuration table. For now,
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* don't accept the default configurations (physaddr == 0).
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* Check for correct signature, calculate the checksum and,
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* if correct, check the version.
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* To do: check extended table checksum.
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*/
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if((_mp_ = sigsearch("_MP_")) == nil || checksum(_mp_, _MP_sz) != 0 || _mp_->physaddr == 0)
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return 1;
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len = PCMPsz;
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if(_mp_->physaddr < MemMin)
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pcmp = KADDR(_mp_->physaddr);
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else if((pcmp = vmap(_mp_->physaddr, len)) == nil)
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return 1;
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if(pcmp->length < len
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|| memcmp(pcmp, "PCMP", 4) != 0
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|| (pcmp->version != 1 && pcmp->version != 4)){
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Bad:
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if((uintptr)pcmp < KZERO)
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vunmap(pcmp, len);
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pcmp = nil;
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return 1;
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}
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len = pcmp->length;
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if((uintptr)pcmp < KZERO)
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vunmap(pcmp, PCMPsz);
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if(_mp_->physaddr < MemMin)
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pcmp = KADDR(_mp_->physaddr);
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else if((pcmp = vmap(_mp_->physaddr, len)) == nil)
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return 1;
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if(checksum(pcmp, len) != 0)
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goto Bad;
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if(m->havetsc && getconf("*notsc") == nil)
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archmp.fastclock = tscticks;
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return 0;
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}
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