496 lines
9.5 KiB
C
496 lines
9.5 KiB
C
/*
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* This file is part of the UCB release of Plan 9. It is subject to the license
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* terms in the LICENSE file found in the top-level directory of this
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* distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
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* part of the UCB release of Plan 9, including this file, may be copied,
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* modified, propagated, or distributed except according to the terms contained
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* in the LICENSE file.
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*/
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#include <u.h>
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#include <lib9.h>
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#include <bio.h>
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#include "pci.h"
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#include "vga.h"
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enum {
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NSeqx = 0x05,
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NCrtx = 0x19,
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NGrx = 0x09,
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NAttrx = 0x15,
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};
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uint8_t
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vgai(int32_t port)
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{
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uint8_t data;
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switch(port){
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case MiscR:
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case Status0:
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case Status1:
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case FeatureR:
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case PaddrW:
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case Pdata:
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case Pixmask:
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case Pstatus:
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data = inportb(port);
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break;
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default:
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error("vgai(0x%4.4lX): unknown port\n", port);
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/*NOTREACHED*/
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data = 0xFF;
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break;
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}
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return data;
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}
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uint8_t
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vgaxi(int32_t port, uint8_t index)
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{
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uint8_t data;
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switch(port){
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case Seqx:
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case Crtx:
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case Grx:
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outportb(port, index);
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data = inportb(port+1);
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break;
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case Attrx:
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/*
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* Allow processor access to the colour
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* palette registers. Writes to Attrx must
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* be preceded by a read from Status1 to
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* initialise the register to point to the
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* index register and not the data register.
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* Processor access is allowed by turning
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* off bit 0x20.
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*/
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inportb(Status1);
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if(index < 0x10){
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outportb(Attrx, index);
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data = inportb(Attrx+1);
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inportb(Status1);
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outportb(Attrx, 0x20|index);
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}
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else{
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outportb(Attrx, 0x20|index);
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data = inportb(Attrx+1);
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}
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break;
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default:
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error("vgaxi(0x%4.4lx, 0x%2.2uX): unknown port\n", port, index);
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/*NOTREACHED*/
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data = 0xFF;
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break;
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}
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return data;
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}
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void
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vgao(int32_t port, uint8_t data)
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{
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switch(port){
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case MiscW:
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case FeatureW:
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case PaddrW:
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case Pdata:
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case Pixmask:
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case PaddrR:
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outportb(port, data);
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break;
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default:
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error("vgao(0x%4.4lX, 0x%2.2uX): unknown port\n", port, data);
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/*NOTREACHED*/
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break;
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}
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}
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void
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vgaxo(int32_t port, uint8_t index, uint8_t data)
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{
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switch(port){
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case Seqx:
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case Crtx:
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case Grx:
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/*
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* We could use an outport here, but some chips
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* (e.g. 86C928) have trouble with that for some
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* registers.
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*/
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outportb(port, index);
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outportb(port+1, data);
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break;
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case Attrx:
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inportb(Status1);
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if(index < 0x10){
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outportb(Attrx, index);
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outportb(Attrx, data);
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inportb(Status1);
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outportb(Attrx, 0x20|index);
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}
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else{
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outportb(Attrx, 0x20|index);
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outportb(Attrx, data);
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}
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break;
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default:
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error("vgaxo(0x%4.4lX, 0x%2.2uX, 0x%2.2uX): unknown port\n",
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port, index, data);
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break;
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}
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}
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static void
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snarf(Vga* vga, Ctlr* ctlr)
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{
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int i;
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/*
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* Generic VGA registers:
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* misc, feature;
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* sequencer;
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* crt;
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* graphics;
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* attribute;
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* palette.
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*/
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vga->misc = vgai(MiscR);
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vga->feature = vgai(FeatureR);
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for(i = 0; i < NSeqx; i++)
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vga->sequencer[i] = vgaxi(Seqx, i);
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for(i = 0; i < NCrtx; i++)
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vga->crt[i] = vgaxi(Crtx, i);
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for(i = 0; i < NGrx; i++)
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vga->graphics[i] = vgaxi(Grx, i);
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for(i = 0; i < NAttrx; i++)
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vga->attribute[i] = vgaxi(Attrx, i);
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if(dflag)
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palette.snarf(vga, ctlr);
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ctlr->flag |= Fsnarf;
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}
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static void
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init(Vga* vga, Ctlr* ctlr)
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{
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Mode *mode;
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int vt, vde, vrs, vre;
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uint32_t tmp;
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mode = vga->mode;
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memset(vga->sequencer, 0, NSeqx*sizeof(vga->sequencer[0]));
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memset(vga->crt, 0, NCrtx*sizeof(vga->crt[0]));
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memset(vga->graphics, 0, NGrx*sizeof(vga->graphics[0]));
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memset(vga->attribute, 0, NAttrx*sizeof(vga->attribute[0]));
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if(dflag)
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memset(vga->palette, 0, sizeof(vga->palette));
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/*
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* Misc. If both the horizontal and vertical sync polarity
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* options are set, use them. Otherwise use the defaults for
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* the given vertical size.
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*/
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vga->misc = 0x23;
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if(mode->frequency == VgaFreq1)
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vga->misc |= 0x04;
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if(mode->hsync && mode->vsync){
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if(mode->hsync == '-')
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vga->misc |= 0x40;
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if(mode->vsync == '-')
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vga->misc |= 0x80;
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}
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else{
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if(mode->y < 480)
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vga->misc |= 0x40;
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else if(mode->y < 400)
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vga->misc |= 0x80;
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else if(mode->y < 768)
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vga->misc |= 0xC0;
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}
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/*
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* Sequencer
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*/
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vga->sequencer[0x00] = 0x03;
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vga->sequencer[0x01] = 0x01;
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vga->sequencer[0x02] = 0x0F;
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vga->sequencer[0x03] = 0x00;
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if(mode->z >= 8)
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vga->sequencer[0x04] = 0x0A;
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else
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vga->sequencer[0x04] = 0x06;
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/*
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* Crt. Most of the work here is in dealing
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* with field overflow.
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*/
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memset(vga->crt, 0, NCrtx);
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vga->crt[0x00] = (mode->ht>>3)-5;
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vga->crt[0x01] = (mode->x>>3)-1;
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vga->crt[0x02] = (mode->shb>>3)-1;
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/*
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* End Horizontal Blank is a 6-bit field, 5-bits
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* in Crt3, high bit in Crt5.
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*/
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tmp = mode->ehb>>3;
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vga->crt[0x03] = 0x80|(tmp & 0x1F);
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if(tmp & 0x20)
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vga->crt[0x05] |= 0x80;
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if(mode->shs == 0)
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mode->shs = mode->shb;
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vga->crt[0x04] = mode->shs>>3;
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if(mode->ehs == 0)
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mode->ehs = mode->ehb;
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vga->crt[0x05] |= ((mode->ehs>>3) & 0x1F);
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/*
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* Vertical Total is 10-bits, 8 in Crt6, the high
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* two bits in Crt7. What if vt is >= 1024? We hope
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* the specific controller has some more overflow
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* bits.
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*
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* Interlace: if 'v', divide the vertical timing
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* values by 2.
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*/
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vt = mode->vt;
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vde = mode->y;
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vrs = mode->vrs;
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vre = mode->vre;
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if(mode->interlace == 'v'){
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vt /= 2;
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vde /= 2;
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vrs /= 2;
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vre /= 2;
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}
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tmp = vt-2;
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vga->crt[0x06] = tmp;
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if(tmp & 0x100)
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vga->crt[0x07] |= 0x01;
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if(tmp & 0x200)
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vga->crt[0x07] |= 0x20;
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tmp = vrs;
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vga->crt[0x10] = tmp;
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if(tmp & 0x100)
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vga->crt[0x07] |= 0x04;
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if(tmp & 0x200)
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vga->crt[0x07] |= 0x80;
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vga->crt[0x11] = 0x20|(vre & 0x0F);
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tmp = vde-1;
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vga->crt[0x12] = tmp;
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if(tmp & 0x100)
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vga->crt[0x07] |= 0x02;
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if(tmp & 0x200)
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vga->crt[0x07] |= 0x40;
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vga->crt[0x15] = vrs;
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if(vrs & 0x100)
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vga->crt[0x07] |= 0x08;
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if(vrs & 0x200)
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vga->crt[0x09] |= 0x20;
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vga->crt[0x16] = (vrs+1);
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vga->crt[0x17] = 0x83;
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tmp = ((vga->virtx*mode->z)/8);
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if(tmp >= 512){
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vga->crt[0x14] |= 0x60;
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tmp /= 8;
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}
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else if(tmp >= 256){
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vga->crt[0x17] |= 0x08;
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tmp /= 4;
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}
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else{
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vga->crt[0x17] |= 0x40;
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tmp /= 2;
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}
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vga->crt[0x13] = tmp;
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if(mode->x*mode->y*mode->z/8 > 64*1024)
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vga->crt[0x17] |= 0x20;
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vga->crt[0x18] = 0x7FF;
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if(vga->crt[0x18] & 0x100)
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vga->crt[0x07] |= 0x10;
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if(vga->crt[0x18] & 0x200)
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vga->crt[0x09] |= 0x40;
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/*
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* Graphics
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*/
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memset(vga->graphics, 0, NGrx);
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if((vga->sequencer[0x04] & 0x04) == 0)
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vga->graphics[0x05] |= 0x10;
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if(mode->z >= 8)
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vga->graphics[0x05] |= 0x40;
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vga->graphics[0x06] = 0x05;
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vga->graphics[0x07] = 0x0F;
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vga->graphics[0x08] = 0xFF;
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/*
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* Attribute
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*/
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memset(vga->attribute, 0, NAttrx);
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for(tmp = 0; tmp < 0x10; tmp++)
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vga->attribute[tmp] = tmp;
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vga->attribute[0x10] = 0x01;
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if(mode->z >= 8)
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vga->attribute[0x10] |= 0x40;
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vga->attribute[0x11] = 0xFF;
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vga->attribute[0x12] = 0x0F;
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/*
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* Palette
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*/
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if(dflag)
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palette.init(vga, ctlr);
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ctlr->flag |= Finit;
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}
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static void
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load(Vga* vga, Ctlr* ctlr)
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{
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int i;
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/*
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* Reset the sequencer and leave it off.
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* Load the generic VGA registers:
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* misc;
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* sequencer (but not seq01, display enable);
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* take the sequencer out of reset;
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* take off write-protect on crt[0x00-0x07];
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* crt;
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* graphics;
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* attribute;
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* palette.
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vgaxo(Seqx, 0x00, 0x00);
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*/
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vgao(MiscW, vga->misc);
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for(i = 2; i < NSeqx; i++)
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vgaxo(Seqx, i, vga->sequencer[i]);
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/*vgaxo(Seqx, 0x00, 0x03);*/
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vgaxo(Crtx, 0x11, vga->crt[0x11] & ~0x80);
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for(i = 0; i < NCrtx; i++)
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vgaxo(Crtx, i, vga->crt[i]);
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for(i = 0; i < NGrx; i++)
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vgaxo(Grx, i, vga->graphics[i]);
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for(i = 0; i < NAttrx; i++)
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vgaxo(Attrx, i, vga->attribute[i]);
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if(dflag)
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palette.load(vga, ctlr);
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ctlr->flag |= Fload;
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}
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static void
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dump(Vga* vga, Ctlr* ctlr)
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{
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int i;
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printitem(ctlr->name, "misc");
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printreg(vga->misc);
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printitem(ctlr->name, "feature");
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printreg(vga->feature);
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printitem(ctlr->name, "sequencer");
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for(i = 0; i < NSeqx; i++)
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printreg(vga->sequencer[i]);
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printitem(ctlr->name, "crt");
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for(i = 0; i < NCrtx; i++)
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printreg(vga->crt[i]);
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printitem(ctlr->name, "graphics");
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for(i = 0; i < NGrx; i++)
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printreg(vga->graphics[i]);
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printitem(ctlr->name, "attribute");
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for(i = 0; i < NAttrx; i++)
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printreg(vga->attribute[i]);
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if(dflag)
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palette.dump(vga, ctlr);
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printitem(ctlr->name, "virtual");
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Bprint(&stdout, "%ld %ld\n", vga->virtx, vga->virty);
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printitem(ctlr->name, "panning");
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Bprint(&stdout, "%s\n", vga->panning ? "on" : "off");
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if(vga->f[0]){
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printitem(ctlr->name, "clock[0] f");
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Bprint(&stdout, "%9ld\n", vga->f[0]);
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printitem(ctlr->name, "clock[0] d i m");
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Bprint(&stdout, "%9ld %8ld - %8ld\n",
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vga->d[0], vga->i[0], vga->m[0]);
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printitem(ctlr->name, "clock[0] n p q r");
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Bprint(&stdout, "%9ld %8ld - %8ld %8ld\n",
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vga->n[0], vga->p[0], vga->q[0], vga->r[0]);
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}
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if(vga->f[1]){
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printitem(ctlr->name, "clock[1] f");
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Bprint(&stdout, "%9ld\n", vga->f[1]);
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printitem(ctlr->name, "clock[1] d i m");
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Bprint(&stdout, "%9ld %8ld - %8ld\n",
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vga->d[1], vga->i[1], vga->m[1]);
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printitem(ctlr->name, "clock[1] n p q r");
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Bprint(&stdout, "%9ld %8ld - %8ld %8ld\n",
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vga->n[1], vga->p[1], vga->q[1], vga->r[1]);
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}
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if(vga->vma || vga->vmb){
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printitem(ctlr->name, "vm a b");
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Bprint(&stdout, "%9lud %8lud\n", vga->vma, vga->vmb);
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}
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if(vga->vmz){
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printitem(ctlr->name, "vmz");
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Bprint(&stdout, "%9lud\n", vga->vmz);
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}
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printitem(ctlr->name, "apz");
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Bprint(&stdout, "%9lud\n", vga->apz);
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printitem(ctlr->name, "linear");
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Bprint(&stdout, "%9d\n", vga->linear);
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}
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Ctlr generic = {
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"vga", /* name */
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snarf, /* snarf */
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0, /* options */
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init, /* init */
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load, /* load */
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dump, /* dump */
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};
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