diff --git a/sys/include/memdraw.h b/sys/include/memdraw.h
index 034c20e..4e57d23 100644
--- a/sys/include/memdraw.h
+++ b/sys/include/memdraw.h
@@ -159,7 +159,7 @@ extern void	memarc(Memimage*, Point, int, int, int, Memimage*, Point, int, int,
 extern Rectangle	memlinebbox(Point, Point, int, int, int);
 extern int	memlineendsize(int);
 extern void	_memmkcmap(void);
-extern void	memimageinit(void);
+extern int	memimageinit(void);
 
 /*
  * Subfont management
diff --git a/sys/include/pool.h b/sys/include/pool.h
index dea0088..857c7bc 100644
--- a/sys/include/pool.h
+++ b/sys/include/pool.h
@@ -9,40 +9,39 @@
 
 typedef struct Pool Pool;
 struct Pool {
-	char*	name;
-	uint32_t	maxsize;
+	char*		name;
+	uintptr_t	maxsize;
 
-	uint32_t	cursize;
-	uint32_t	curfree;
-	uint32_t	curalloc;
+	uintptr_t	cursize;
+	uintptr_t	curfree;
+	uintptr_t	curalloc;
 
 	uint32_t	minarena;	/* smallest size of new arena */
 	uint32_t	quantum;	/* allocated blocks should be multiple of */
 	uint32_t	minblock;	/* smallest newly allocated block */
 
-	void*	freeroot;	/* actually Free* */
-	void*	arenalist;	/* actually Arena* */
+	int		flags;
+	int		nfree;
+	int		lastcompact;
 
-	void*	(*alloc)(uint32_t);
-	int	(*merge)(void*, void*);
-	void	(*move)(void* from, void* to);
+	void*		freeroot;	/* actually Free* */
+	void*		arenalist;	/* actually Arena* */
 
-	int	flags;
-	int	nfree;
-	int	lastcompact;
+	void*		(*alloc)(uint32_t);
+	int		(*merge)(void*, void*);
+	void		(*move)(void* from, void* to);
 
-	void	(*lock)(Pool*);
-	void	(*unlock)(Pool*);
-	void	(*print)(Pool*, char*, ...);
-	void	(*panic)(Pool*, char*, ...);
-	void	(*logstack)(Pool*);
+	void		(*lock)(Pool*);
+	void		(*unlock)(Pool*);
+	void		(*print)(Pool*, char*, ...);
+	void		(*panic)(Pool*, char*, ...);
+	void		(*logstack)(Pool*);
 
-	void*	private;
+	void*		private;
 };
 
 extern void*	poolalloc(Pool*, uint32_t);
-extern void*	poolallocalign(Pool*, uint32_t, uint32_t, int32_t,
-				   uint32_t);
+extern void*	poolallocalign(Pool*, uint32_t, uint32_t, int32_t, uint32_t);
 extern void	poolfree(Pool*, void*);
 extern uint32_t	poolmsize(Pool*, void*);
 extern void*	poolrealloc(Pool*, void*, uint32_t);
diff --git a/sys/src/cmd/hmi/console/screenconsole.c b/sys/src/cmd/hmi/console/screenconsole.c
index b9a4890..d9486c4 100644
--- a/sys/src/cmd/hmi/console/screenconsole.c
+++ b/sys/src/cmd/hmi/console/screenconsole.c
@@ -57,8 +57,8 @@ main(int argc, char *argv[])
 		srv = "screenconsole";
 
 	/* first try in /dev so that binding can work */
-	if((fd = open("/dev/ps2keyb", OREAD)) <= 0)
-		if((fd = open("#P/ps2keyb", OREAD)) <= 0)
+	if((fd = open("/dev/scancode", OREAD)) <= 0)
+		if((fd = open("#b/scancode", OREAD)) <= 0)
 			sysfatal("open keyboard: %r");
 	dup(fd, 0);
 	close(fd);
diff --git a/sys/src/cmd/hmi/realemu/realemu.json b/sys/src/cmd/hmi/realemu/realemu.json
index 7e0b8ab..e3c3fc7 100644
--- a/sys/src/cmd/hmi/realemu/realemu.json
+++ b/sys/src/cmd/hmi/realemu/realemu.json
@@ -1,7 +1,7 @@
 {
 	"realemu": {
 		"Cflags": [
-			"-I", "/sys/src/kern/386/"
+			"-I", "/sys/src/kern/$ARCH/"
 		],
 		"Include": [
 			"/sys/src/cmd/cmd.json"
diff --git a/sys/src/cmd/hmi/vga/build.json b/sys/src/cmd/hmi/vga/build.json
index b2ef61a..a717a71 100644
--- a/sys/src/cmd/hmi/vga/build.json
+++ b/sys/src/cmd/hmi/vga/build.json
@@ -1,7 +1,7 @@
 {
 	"vga": {
 		"Cflags": [
-			"-I", "/sys/src/kern/386/"
+			"-I", "/sys/src/kern/$ARCH/"
 		],
 		"Include": [
 			"/sys/src/cmd/cmd.json"
diff --git a/sys/src/cmd/import.c b/sys/src/cmd/import.c
index 5c4ee2e..2b39370 100644
--- a/sys/src/cmd/import.c
+++ b/sys/src/cmd/import.c
@@ -120,9 +120,6 @@ main(int argc, char **argv)
 	case 'c':
 		mntflags |= MCREATE;
 		break;
-	case 'C':
-		mntflags |= MCACHE;
-		break;
 	case 'd':
 		debug++;
 		break;
diff --git a/sys/src/cmd/mount.c b/sys/src/cmd/mount.c
index a68314d..cfc9987 100644
--- a/sys/src/cmd/mount.c
+++ b/sys/src/cmd/mount.c
@@ -71,9 +71,6 @@ main(int argc, char *argv[])
 	case 'd':
 		setmntdevice(EARGF(usage()));
 		break;
-	case 'C':
-		flag |= MCACHE;
-		break;
 	case 'k':
 		keyspec = EARGF(usage());
 		break;
diff --git a/sys/src/cmd/srv.c b/sys/src/cmd/srv.c
index 0b525d1..444ead0 100644
--- a/sys/src/cmd/srv.c
+++ b/sys/src/cmd/srv.c
@@ -103,11 +103,6 @@ main(int argc, char *argv[])
 		domount = 1;
 		reallymount = 1;
 		break;
-	case 'C':
-		mountflag |= MCACHE;
-		domount = 1;
-		reallymount = 1;
-		break;
 	case 'e':
 		doexec = 1;
 		break;
diff --git a/sys/src/kern/386/i8042.c b/sys/src/kern/386/i8042.c
deleted file mode 100644
index 6d7badc..0000000
--- a/sys/src/kern/386/i8042.c
+++ /dev/null
@@ -1,328 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-
-#include	"u.h"
-#include	"../port/lib.h"
-#include	"mem.h"
-#include	"dat.h"
-#include	"fns.h"
-#include	"../port/error.h"
-
-#include	"io.h"
-
-enum {
-	Data=		0x60,		/* data port */
-
-	Status=		0x64,		/* status port */
-		Inready=	0x01,		/*  input character ready */
-		Outbusy=	0x02,		/*  output busy */
-		Sysflag=	0x04,		/*  system flag */
-		Cmddata=	0x08,		/*  cmd==0, data==1 */
-		Inhibit=	0x10,		/*  keyboard/mouse inhibited */
-		Minready=	0x20,		/*  mouse character ready */
-		Rtimeout=	0x40,		/*  general timeout */
-		Parity=	0x80,
-
-	Cmd=		0x64,		/* command port (write only) */
-
-};
-
-
-enum
-{
-	/* controller command byte */
-	Cscs1=		(1<<6),		/* scan code set 1 */
-	Cauxdis=	(1<<5),		/* mouse disable */
-	Ckeybdis=	(1<<4),		/* keyb disable */
-	Csf=		(1<<2),		/* system flag */
-	Cauxint=	(1<<1),		/* mouse interrupt enable */
-	Ckeybint=	(1<<0),		/* keyb interrupt enable */
-};
-
-static Queue *keybq;
-static Queue *mouseq;
-
-
-static int nokeyb = 1;
-
-static Lock i8042lock;
-static uint8_t ccc;
-
-/*
- *  wait for output no longer busy
- */
-static int
-outready(void)
-{
-	int tries;
-
-	for(tries = 0; (inb(Status) & Outbusy); tries++){
-		if(tries > 500)
-			return -1;
-		delay(2);
-	}
-	return 0;
-}
-
-/*
- *  wait for input
- */
-static int
-inready(void)
-{
-	int tries;
-
-	for(tries = 0; !(inb(Status) & Inready); tries++){
-		if(tries > 500)
-			return -1;
-		delay(2);
-	}
-	return 0;
-}
-
-void
-i8042systemreset(void)
-{
-	uint16_t *s = KADDR(0x472);
-	int i, x;
-
-	if(nokeyb)
-		return;
-
-	*s = 0x1234;		/* BIOS warm-boot flag */
-
-	/* newer reset the machine command */
-	outready();
-	outb(Cmd, 0xFE);
-	outready();
-
-	/* Pulse it by hand (old somewhat reliable) */
-	x = 0xDF;
-	for(i = 0; i < 5; i++){
-		x ^= 1;
-		outready();
-		outb(Cmd, 0xD1);
-		outready();
-		outb(Data, x);	/* toggle reset */
-		delay(100);
-	}
-}
-
-int
-mousecmd(int cmd)
-{
-	unsigned int c;
-	int tries;
-	static int badkbd;
-
-	if(badkbd)
-		return -1;
-	c = 0;
-	tries = 0;
-
-	ilock(&i8042lock);
-	do{
-		if(tries++ > 2)
-			break;
-		if(outready() < 0)
-			break;
-		outb(Cmd, 0xD4);
-		if(outready() < 0)
-			break;
-		outb(Data, cmd);
-		if(outready() < 0)
-			break;
-		if(inready() < 0)
-			break;
-		c = inb(Data);
-	} while(c == 0xFE || c == 0);
-	iunlock(&i8042lock);
-
-	if(c != 0xFA){
-		jehanne_print("mousecmd: %2.2ux returned to the %2.2ux command\n", c, cmd);
-		badkbd = 1;	/* don't keep trying; there might not be one */
-		return -1;
-	}
-	return 0;
-}
-
-static int
-mousecmds(uint8_t *cmd, int ncmd)
-{
-	int i;
-
-	ilock(&i8042lock);
-	for(i=0; i<ncmd; i++){
-		if(outready() == -1)
-			break;
-		outb(Cmd, 0xD4);
-		if(outready() == -1)
-			break;
-		outb(Data, cmd[i]);
-	}
-	iunlock(&i8042lock);
-	return i;
-}
-
-static void
-i8042intr(Ureg* u, void* v)
-{
-	uint8_t stat, data;
-
-	ilock(&i8042lock);
-	stat = inb(Status);
-	if((stat&Inready) == 0){
-		iunlock(&i8042lock);
-		return;
-	}
-	data = inb(Data);
-	iunlock(&i8042lock);
-
-	if(stat & Minready){
-		if(mouseq != nil)
-			qiwrite(mouseq, &data, 1);
-	} else {
-		if(keybq != nil)
-			qiwrite(keybq, &data, 1);
-	}
-}
-
-static int
-outbyte(int port, int c)
-{
-	if(outready() == -1) {
-		return -1;
-	}
-	outb(port, c);
-	if(outready() == -1) {
-		return -1;
-	}
-	return 0;
-}
-
-static long
-mouserwrite(Chan* c, void *vbuf, long len, int64_t off64)
-{
-	return mousecmds(vbuf, len);
-}
-
-static long
-mouseread(Chan* c, void *vbuf, long len, int64_t off64)
-{
-	return qread(mouseq, vbuf, len);
-}
-
-void
-mouseenable(void)
-{
-	mouseq = qopen(32, 0, 0, 0);
-	if(mouseq == nil)
-		panic("mouseenable");
-	qnoblock(mouseq, 1);
-
-	ccc &= ~Cauxdis;
-	ccc |= Cauxint;
-
-	ilock(&i8042lock);
-	if(outready() == -1)
-		iprint("mouseenable: failed 0\n");
-	outb(Cmd, 0x60);	/* write control register */
-	if(outready() == -1)
-		iprint("mouseenable: failed 1\n");
-	outb(Data, ccc);
-	if(outready() == -1)
-		iprint("mouseenable: failed 2\n");
-	outb(Cmd, 0xA8);	/* auxilliary device enable */
-	if(outready() == -1){
-		iprint("mouseenable: failed 3\n");
-		iunlock(&i8042lock);
-		return;
-	}
-	iunlock(&i8042lock);
-
-	intrenable(IrqAUX, i8042intr, 0, BUSUNKNOWN, "mouse");
-	addarchfile("ps2mouse", 0666, mouseread, mouserwrite);
-}
-
-void
-keybinit(void)
-{
-	int c, try;
-
-	/* wait for a quiescent controller */
-	ilock(&i8042lock);
-
-	try = 1000;
-	while(try-- > 0 && (c = inb(Status)) & (Outbusy | Inready)) {
-		if(c & Inready)
-			inb(Data);
-		delay(1);
-	}
-	if (try <= 0) {
-		iunlock(&i8042lock);
-		jehanne_print("keybinit failed 0\n");
-		return;
-	}
-
-	/* get current controller command byte */
-	outb(Cmd, 0x20);
-	if(inready() == -1){
-		iunlock(&i8042lock);
-		jehanne_print("keybinit failed 1\n");
-		ccc = 0;
-	} else
-		ccc = inb(Data);
-
-	/* enable keyb xfers and interrupts */
-	ccc &= ~(Ckeybdis);
-	ccc |= Csf | Ckeybint | Cscs1;
-	if(outready() == -1) {
-		iunlock(&i8042lock);
-		jehanne_print("keybinit failed 2\n");
-		return;
-	}
-
-	if (outbyte(Cmd, 0x60) == -1){
-		iunlock(&i8042lock);
-		jehanne_print("keybinit failed 3\n");
-		return;
-	}
-	if (outbyte(Data, ccc) == -1){
-		iunlock(&i8042lock);
-		jehanne_print("keybinit failed 4\n");
-		return;
-	}
-
-	nokeyb = 0;
-
-	iunlock(&i8042lock);
-}
-
-static long
-keybread(Chan* c, void *vbuf, long len, int64_t off64)
-{
-	return qread(keybq, vbuf, len);
-}
-
-void
-keybenable(void)
-{
-	keybq = qopen(32, 0, 0, 0);
-	if(keybq == nil)
-		panic("keybinit");
-	qnoblock(keybq, 1);
-
-	ioalloc(Data, 1, 0, "keyb");
-	ioalloc(Cmd, 1, 0, "keyb");
-
-	intrenable(IrqKBD, i8042intr, 0, BUSUNKNOWN, "keyb");
-
-	addarchfile("ps2keyb", 0666, keybread, nil);
-
-}
diff --git a/sys/src/kern/386/include.json b/sys/src/kern/386/include.json
deleted file mode 100644
index 864b2a2..0000000
--- a/sys/src/kern/386/include.json
+++ /dev/null
@@ -1,22 +0,0 @@
-{
-	"386": {
-		"SourceFiles": [
-			"../386/bios32.c",
-			"../386/devether.c",
-			"../386/devrtc.c",
-			"../386/ether8139.c",
-			"../386/ether8169.c",
-			"../386/ether82557.c",
-			"../386/ether82563.c",
-			"../386/etherigbe.c",
-			"../386/ethermii.c",
-			"../386/etherm10g.c",
-			"../386/i8042.c",
-			"../386/pci.c",
-			"../386/sdiahci.c",
-			"../386/sdscsi.c",
-			"../386/uarti8250.c",
-			"../386/uartpci.c"
-		]
-	}
-}
diff --git a/sys/src/kern/amd64/acpi.c b/sys/src/kern/amd64/acpi.c
index 683a6fa..4d13235 100644
--- a/sys/src/kern/amd64/acpi.c
+++ b/sys/src/kern/amd64/acpi.c
@@ -4,13 +4,14 @@
 #include "dat.h"
 #include "fns.h"
 #include "io.h"
-#include "adr.h"
+#include "../port/error.h"
+
+#include "mp.h"
 
-#include "apic.h"
-#include "acpi.h"
 #include <aml.h>
 
 typedef struct Rsd Rsd;
+typedef struct Tbl Tbl;
 
 struct Rsd {
 	uint8_t	sig[8];
@@ -24,177 +25,121 @@ struct Rsd {
 	uint8_t	reserved[3];
 };
 
-enum {
-	Tblsz	= 4+4+1+1+6+8+4+4+4,
-	Rdsz	= 8+1+6+1+4+4+8+1+3,
+struct Tbl {
+	uint8_t	sig[4];
+	uint8_t	len[4];
+	uint8_t	rev;
+	uint8_t	csum;
+	uint8_t	oemid[6];
+	uint8_t	oemtid[8];
+	uint8_t	oemrev[4];
+	uint8_t	cid[4];
+	uint8_t	crev[4];
+	uint8_t	data[];
 };
 
-static	Rsd	*rsd;
-static	int	ntblpa;			/* physical addresses visited by maptable() */
-static	uintmem	tblpa[64];
-static	int	ntblmap;			/* successfully mapped tables */
-static	Tbl	*tblmap[64];
-	Fadt	fadt;
-	Acpicfg	acpicfg;
+enum {
+	Tblsz	= 4+4+1+1+6+8+4+4+4,
+};
 
+static Rsd *rsd;
 
-int
-checksum(void *v, int n)
-{
-	uint8_t *p, s;
+/* physical addresses visited by maptable() */
+static int ntblpa;
+static uintptr_t tblpa[64];
 
-	s = 0;
-	p = v;
-	while(n-- > 0)
-		s += *p++;
-	return s;
+/* successfully mapped tables */
+static int ntblmap;
+static Tbl *tblmap[64];
+
+static int16_t
+get16(uint8_t *p){
+	return p[1]<<8 | p[0];
 }
 
-static void*
-sigscan(uint8_t* addr, int len, char* signature)
-{
-	int sl;
-	uint8_t *e, *p;
-
-	e = addr+len;
-	sl = jehanne_strlen(signature);
-	for(p = addr; p+sl < e; p += 16)
-		if(jehanne_memcmp(p, signature, sl) == 0)
-			return p;
-	return nil;
-}
-
-static uintptr_t
-convmemsize(void)
-{
-	uintptr_t top;
-	uint8_t *bda;
-
-	bda = KADDR(0x400);
-	top = ((bda[0x14]<<8) | bda[0x13])*KiB;
-
-	if(top < 64*KiB || top > 640*KiB)
-		top = 640*KiB;	/* sanity */
-
-	/* reserved for bios tables (EBDA) */
-	top -= 1*KiB;
-
-	return top;
-}
-
-void*
-sigsearch(char* signature)
-{
-	uintptr_t p;
-	uint8_t *bda;
-	void *r;
-
-	/*
-	 * Search for the data structure:
-	 * 1) within the first KiB of the Extended BIOS Data Area (EBDA), or
-	 * 2) within the last KiB of system base memory if the EBDA segment
-	 *    is undefined, or
-	 * 3) within the BIOS ROM address space between 0xf0000 and 0xfffff
-	 *    (but will actually check 0xe0000 to 0xfffff).
-	 */
-	bda = KADDR(0x400);
-	if(jehanne_memcmp(KADDR(0xfffd9), "EISA", 4) == 0){
-		if((p = (bda[0x0f]<<8)|bda[0x0e]) != 0){
-			if((r = sigscan(KADDR(p<<4), 1024, signature)) != nil)
-				return r;
-		}
-	}
-	if((r = sigscan(KADDR(convmemsize()), 1024, signature)) != nil)
-		return r;
-
-	/* hack for virtualbox: look in KiB below 0xa0000 */
-	if((r = sigscan(KADDR(0xa0000-1024), 1024, signature)) != nil)
-		return r;
-
-	return sigscan(KADDR(0xe0000), 0x20000, signature);
-}
-
-static uint32_t
-get16(uint8_t *p)
-{
-	return (p[1]<<8)|p[0];
-}
-
-static uint32_t
-get32(uint8_t *p)
-{
-	return (p[3]<<24)|(p[2]<<16)|(p[1]<<8)|p[0];
+static uint
+get32(uint8_t *p){
+	return p[3]<<24 | p[2]<<16 | p[1]<<8 | p[0];
 }
 
 static uint64_t
-get64(uint8_t *p)
-{
-	return ((uint64_t)get32(p+4))|get32(p);
+get64(uint8_t *p){
+	uint64_t u;
+
+	u = get32(p+4);
+	return u<<32 | get32(p);
 }
 
-static void
-put16(uint8_t *p, int v)
-{
-	p[0] = v;
-	p[1] = v>>8;
-}
-
-static void
-put32(uint8_t *p, int v)
-{
-	p[0] = v;
-	p[1] = v>>8;
-	p[2] = v>>16;
-	p[3] = v>>24;
-}
-
-static uint32_t
-tbldlen(Tbl *t)
-{
+static uint
+tbldlen(Tbl *t){
 	return get32(t->len) - Tblsz;
 }
 
-Tbl*
-acpigettbl(void *sig)
+static long
+memcheck(uintptr_t pa, long len)
 {
 	int i;
-	for(i=0; i<ntblmap; i++)
-		if(jehanne_memcmp(tblmap[i]->sig, sig, 4) == 0)
-			return tblmap[i];
-	return nil;
+	uintptr_t pe;
+	Confmem *cm;
+
+	if(len <= 0)
+		return len;
+	pe = pa + len-1;
+	if(pe < pa){
+		len = -pa;
+		pe = pa + len-1;
+	}
+	if(pa < PADDR(CPU0END))
+		return 0;
+	if(pe >= PADDR(KTZERO) && pa < PADDR(end))
+		return PADDR(KTZERO) - pa;
+	for(i=0; i<nelem(sys->mem); i++){
+		cm = &sys->mem[i];
+		if(cm->npage == 0)
+			continue;
+		if(pe >= cm->base && pa <= cm->base + cm->npage*BY2PG - 1)
+			return cm->base - pa;
+	}
+	return len;
 }
 
-#define	vunmap(a,b)
-#define	vmapoverlap	vmap
-
 static void
-acpimaptbl(uint64_t xpa)
+maptable(uint64_t xpa)
 {
 	uint8_t *p, *e;
-	int i;
-	uintmem pa;
+	uintptr_t pa;
 	uint32_t l;
 	Tbl *t;
+	int i;
 
 	pa = xpa;
-	if(pa != xpa || pa == 0)
+	if((uint64_t)pa != xpa || pa == 0)
 		return;
 	if(ntblpa >= nelem(tblpa) || ntblmap >= nelem(tblmap))
 		return;
+
 	for(i=0; i<ntblpa; i++){
 		if(pa == tblpa[i])
 			return;
 	}
 	tblpa[ntblpa++] = pa;
-	if((t = vmapoverlap(pa, 8)) == nil)
+
+	if((t = vmap(pa, 8)) == nil)
 		return;
 	l = get32(t->len);
 	if(l < Tblsz){
 		vunmap(t, 8);
 		return;
 	}
+	if(memcheck(pa, l) != l){
+		print("maptable: ignoring %.4s at [%#p-%#p); overlaps usable memory\n",
+			(char*)t->sig, pa, pa+l);
+		vunmap(t, 8);
+		return;
+	}
 	vunmap(t, 8);
-	if((t = vmapoverlap(pa, l)) == nil)
+
+	if((t = vmap(pa, l)) == nil)
 		return;
 	if(checksum(t, l)){
 		vunmap(t, l);
@@ -204,240 +149,124 @@ acpimaptbl(uint64_t xpa)
 
 	p = (uint8_t*)t;
 	e = p + l;
-	if(jehanne_memcmp("RSDT", t->sig, 4) == 0){
+	if(memcmp("RSDT", t->sig, 4) == 0){
 		for(p = t->data; p+3 < e; p += 4)
-			acpimaptbl(get32(p));
+			maptable(get32(p));
+		return;
 	}
-	else if(jehanne_memcmp("XSDT", t->sig, 4) == 0){
+	if(memcmp("XSDT", t->sig, 4) == 0){
 		for(p = t->data; p+7 < e; p += 8)
-			acpimaptbl(get64(p));
+			maptable(get64(p));
+		return;
 	}
-	else if(jehanne_memcmp("FACP", t->sig, 4) == 0){
+	if(memcmp("FACP", t->sig, 4) == 0){
 		if(l < 44)
 			return;
-		acpimaptbl(get32(p + 40));
+		maptable(get32(p + 40));
 		if(l < 148)
 			return;
-		acpimaptbl(get64(p + 140));
+		maptable(get64(p + 140));
+		return;
 	}
 }
 
-static void*
-rsdscan(uint8_t* addr, int len, char* signature)
-{
-	int sl;
-	uint8_t *e, *p;
-
-	e = addr+len;
-	sl = jehanne_strlen(signature);
-	for(p = addr; p+sl < e; p += 16){
-		if(jehanne_memcmp(p, signature, sl))
-			continue;
-		return p;
-	}
-
-	return nil;
-}
-
-static void*
-rsdsearch(char* signature)
-{
-	uintptr_t p;
-	uint8_t *bda;
-	Rsd *rsd;
-
-	/*
-	 * Search for the data structure signature:
-	 * 1) in the first KB of the EBDA;
-	 * 2) in the BIOS ROM between 0xE0000 and 0xFFFFF.
-	 */
-	if(jehanne_strncmp((char*)KADDR(0xFFFD9), "EISA", 4) == 0){
-		bda = BIOSSEG(0x40);
-		if((p = (bda[0x0F]<<8)|bda[0x0E])){
-			if(rsd = rsdscan(KADDR(p), 1024, signature))
-				return rsd;
-		}
-	}
-	return rsdscan(BIOSSEG(0xE000), 0x20000, signature);
-}
-
-static void
-rsdload(void)
-{
-	if((rsd = rsdsearch("RSD PTR ")) == nil)
-		panic("acpi: no rsd ptr");
-	if(checksum(rsd, 20) && checksum(rsd, 36))
-		panic("acpi: acpi checksum");
-}
-
 static void
 maptables(void)
 {
-	if(ntblmap > 0 || ntblpa > 0)
+	if(rsd == nil || ntblmap > 0 || ntblpa > 0)
 		return;
-	rsdload();
-	if(rsd->rev >= 2 && !checksum(rsd, 36))
-		acpimaptbl(get64(rsd->xaddr));
-	else if(!checksum(rsd, 20))
-		acpimaptbl(get32(rsd->raddr));
+	if(!checksum(rsd, 20))
+		maptable(get32(rsd->raddr));
+	if(rsd->rev >= 2)
+		if(!checksum(rsd, 36))
+			maptable(get64(rsd->xaddr));
 }
 
-enum {
-	Iointr,
-	Lintr,
-
-	MTint	= 0,		/* fake interrupt type, equivalent to fixed */
-};
-
-static uint32_t
-apicmkintr(uint32_t src, uint32_t inttype, int polarity, int trigger, uint32_t apicno, uint32_t intin)
+static Apic*
+findapic(int gsi, int *pintin)
 {
-	uint32_t v;
-	IOapic *ioapic;
-	Lapic *lapic;
+	Apic *a;
+	int i;
 
-	/*
-	 * Check valid bus, interrupt input pin polarity
-	 * and trigger mode. If the APIC ID is 0xff it means
-	 * all APICs of this type so those checks for useable
-	 * APIC and valid INTIN must also be done later in
-	 * the appropriate init routine in that case. It's hard
-	 * to imagine routing a signal to all IOAPICs, the
-	 * usual case is routing NMI and ExtINT to all LAPICs.
-	 */
-	if(apicno != 0xff){
-		if(Napic < 256 && apicno >= Napic){
-			jehanne_print("apic: id out-of-range: %d\n", apicno);
-			return 0;
-		}
-		switch(src){
-		default:
-			jehanne_print("apic: intin botch: %d\n", intin);
-			return 0;
-		case Iointr:
-			if((ioapic = ioapiclookup(apicno)) == nil){
-				jehanne_print("ioapic%d: ioapic unusable\n", apicno);
-				return 0;
-			}
-			if(intin >= ioapic->nrdt){
-				jehanne_print("ioapic%d: intin %d >= nrdt %d\n", apicno, intin, ioapic->nrdt);
-				return 0;
-			}
-			break;
-		case Lintr:
-			if((lapic = lapiclookup(apicno)) == nil){
-				jehanne_print("lapic%d: lapic unusable\n", apicno);
-				return 0;
-			}
-			if(intin >= nelem(lapic->lvt)){
-				jehanne_print("lapic%d: intin beyond lvt: %d\n", apicno, intin);
-				return 0;
-			}
-			USED(lapic);
-			break;
+	for(i=0; i<=MaxAPICNO; i++){
+		if((a = mpioapic[i]) == nil)
+			continue;
+		if((a->flags & PcmpEN) == 0)
+			continue;
+		if(gsi >= a->gsibase && gsi <= a->gsibase+a->mre){
+			if(pintin)
+				*pintin = gsi - a->gsibase;
+			return a;
 		}
 	}
-
-	/*
-	 * Create the low half of the vector table entry (LVT or RDT).
-	 * For the NMI, SMI and ExtINT cases, the polarity and trigger
-	 * are fixed (but are not always consistent over IA-32 generations).
-	 * For the INT case, either the polarity/trigger are given or
-	 * it defaults to that of the source bus;
-	 * whether INT is Fixed or Lowest Priority is left until later.
-	 */
-	v = Im;
-	switch(inttype){
-	default:
-		jehanne_print("apic: bad irq type %d\n", inttype);
-		return 0;
-	case MTint:				/* INT (fake type, same as fixed) */
-		v |= polarity | trigger;
-		break;
-	case MTnmi:				/* NMI */
-	case MTsmi:				/* SMI */
-	case MTei:				/* ExtINT */
-		v |= TMedge|IPhigh|inttype;
-		break;
-	}
-
-	return v;
-}
-
-int
-flagstopolarity(int bustype, int flags)
-{
-	switch(flags & 3){
-	case 1:
-		return IPhigh;
-	case 3:
-		return IPlow;
-	case 2:
-		return -1;
-	}
-	switch(bustype){
-	case BusISA:
-		return IPhigh;
-	case BusPCI:
-		return IPlow;
-		break;
-	default:
-		return -1;
-	}
-}
-
-int
-flagstotrigger(int bustype, int flags)
-{
-	switch((flags>>2) & 3){
-	case 1:
-		return TMedge;
-	case 3:
-		return TMlevel;
-	case 2:
-		return -1;
-	}
-	switch(bustype){
-	case BusISA:
-		return TMedge;
-	case BusPCI:
-		return TMlevel;
-		break;
-	default:
-		return -1;
-	}
+	print("findapic: no ioapic found for gsi %d\n", gsi);
+	return nil;
 }
 
 static void
-addirq(int gsi, int bustype, int busno, int irq, int flags)
+addirq(int gsi, int type, int busno, int irq, int flags)
 {
-	uint32_t apicno, intin, polarity, trigger;
-	uint32_t i;
+	Apic *a;
+	Bus *bus;
+	Aintr *ai;
+	PCMPintr *pi;
+	int intin;
 
-	if((apicno = gsitoapicid(gsi, &intin)) == -1){
-		DBG("acpi: addirq: no apic for gsi %d bus type=%d busno %d\n", gsi, bustype, busno);
+	if((a = findapic(gsi, &intin)) == nil)
 		return;
-	}
-	DBG("addirq: gsi %d %s busno %d irq %d flags %.8ux\n",
-		gsi, bustype == BusPCI? "pci": "isa", busno, irq, flags);
-	polarity = flagstopolarity(bustype, flags);
-	trigger = flagstotrigger(bustype, flags);
-	if(polarity == -1 || trigger == -1){
-		jehanne_print("addirq: bad polarity: gsi %d %s busno %d irq %d flags %.8ux\n",
-			gsi, bustype == BusPCI? "pci": "isa", busno, irq, flags);
-		return;
-	}
 
-	i = apicmkintr(Iointr, MTint, polarity, trigger, apicno, intin);
-	ioapicintrinit(bustype, busno, apicno, intin, irq, i);
+	for(bus = mpbus; bus; bus = bus->next)
+		if(bus->type == type && bus->busno == busno)
+			goto Foundbus;
+
+	if((bus = xalloc(sizeof(Bus))) == nil)
+		panic("addirq: no memory for Bus");
+	bus->busno = busno;
+	bus->type = type;
+	if(type == BusISA){
+		bus->po = PcmpHIGH;
+		bus->el = PcmpEDGE;
+		if(mpisabus == -1)
+			mpisabus = busno;
+	} else {
+		bus->po = PcmpLOW;
+		bus->el = PcmpLEVEL;
+	}
+	if(mpbus)
+		mpbuslast->next = bus;
+	else
+		mpbus = bus;
+	mpbuslast = bus;
+
+Foundbus:
+	for(ai = bus->aintr; ai; ai = ai->next)
+		if(ai->intr->irq == irq)
+			return;
+
+	if((pi = xalloc(sizeof(PCMPintr))) == nil)
+		panic("addirq: no memory for PCMPintr");
+	pi->type = PcmpIOINTR;
+	pi->intr = PcmpINT;
+	pi->flags = flags & (PcmpPOMASK|PcmpELMASK);
+	pi->busno = busno;
+	pi->irq = irq;
+	pi->apicno = a->apicno;
+	pi->intin = intin;
+
+	if((ai = xalloc(sizeof(Aintr))) == nil)
+		panic("addirq: no memory for Aintr");
+	ai->intr = pi;
+	ai->apic = a;
+	ai->next = bus->aintr;
+	bus->aintr = ai;
 }
 
 static char*
 eisaid(void *v)
 {
+	static char id[8];
 	uint32_t b, l;
 	int i;
-	static char id[8];
 
 	if(amltag(v) == 's')
 		return v;
@@ -452,7 +281,7 @@ eisaid(void *v)
 	return id;
 }
 
-/*static*/ int
+static int
 pcibusno(void *dot)
 {
 	int bno, adr, tbdf;
@@ -467,11 +296,12 @@ pcibusno(void *dot)
 	if((x = amlwalk(dot, "^_BBN")) == nil)
 		if((x = amlwalk(dot, "^_ADR")) == nil)
 			return -1;
-	if((p = amlval(x)) == nil)
+	p = nil;
+	if(amleval(x, "", &p) < 0)
 		return -1;
 	adr = amlint(p);
 	/* if root bridge, then we are done here */
-	if(id != nil && (jehanne_strcmp(id, "PNP0A03")==0 || jehanne_strcmp(id, "PNP0A08")==0))
+	if(id != nil && (strcmp(id, "PNP0A03")==0 || strcmp(id, "PNP0A08")==0))
 		return adr;
 	x = amlwalk(dot, "^");
 	if(x == nil || x == dot)
@@ -487,6 +317,31 @@ pcibusno(void *dot)
 	return BUSBNO(pdev->bridge->tbdf);
 }
 
+static int
+pciaddr(void *dot)
+{
+	int adr, bno;
+	void *x, *p;
+
+	for(;;){
+		if((x = amlwalk(dot, "_ADR")) == nil){
+			x = amlwalk(dot, "^");
+			if(x == nil || x == dot)
+				break;
+			dot = x;
+			continue;
+		}
+		if((bno = pcibusno(x)) < 0)
+			break;
+		p = nil;
+		if(amleval(x, "", &p) < 0)
+			break;
+		adr = amlint(p);
+		return MKBUS(BusPCI, bno, adr>>16, adr&0xFFFF);
+	}
+	return -1;
+}
+
 static int
 getirqs(void *d, uint8_t pmask[32], int *pflags)
 {
@@ -494,7 +349,7 @@ getirqs(void *d, uint8_t pmask[32], int *pflags)
 	uint8_t *p;
 
 	*pflags = 0;
-	jehanne_memset(pmask, 0, 32);
+	memset(pmask, 0, 32);
 	if(amltag(d) != 'b')
 		return -1;
 	p = amlval(d);
@@ -502,7 +357,8 @@ getirqs(void *d, uint8_t pmask[32], int *pflags)
 		pmask[0] = p[1];
 		pmask[1] = p[2];
 		if(amllen(d) >= 3 && p[0] == 0x23)
-			*pflags = p[3];
+			*pflags = ((p[3] & (1<<0)) ? PcmpEDGE : PcmpLEVEL)
+				| ((p[3] & (1<<3)) ? PcmpLOW : PcmpHIGH);
 		return 0;
 	}
 	if(amllen(d) >= 5 && p[0] == 0x89){
@@ -514,26 +370,33 @@ getirqs(void *d, uint8_t pmask[32], int *pflags)
 			if(m >= 0 && m < 256)
 				pmask[m/8] |= 1<<(m%8);
 		}
-		*pflags = p[3];
+		*pflags = ((p[3] & (1<<1)) ? PcmpEDGE : PcmpLEVEL)
+			| ((p[3] & (1<<2)) ? PcmpLOW : PcmpHIGH);
 		return 0;
 	}
 	return -1;
 }
 
 static uint8_t*
-setirq(void *d, uint32_t irq)
+setirq(void *d, uint irq)
 {
 	uint8_t *p;
 
 	if(amltag(d) != 'b')
 		return nil;
 	p = amlnew('b', amllen(d));
-	jehanne_memmove(p, d, amllen(p));
-	if(p[0] == 0x22 || p[0] == 0x23)
-		put16(p, 1<<irq);
+	memmove(p, d, amllen(p));
+	if(p[0] == 0x22 || p[0] == 0x23){
+		irq = 1<<irq;
+		p[1] = irq;
+		p[2] = irq>>8;
+	}
 	if(p[0] == 0x89){
 		p[4] = 1;
-		put32(p+5, irq);
+		p[5] = irq;
+		p[6] = irq>>8;
+		p[7] = irq>>16;
+		p[8] = irq>>24;
 	}
 	return p;
 }
@@ -588,16 +451,15 @@ setuplink(void *link, int *pflags)
 }
 
 static int
-enumprt(void *dot, void * _1)
+enumprt(void *dot, void * _)
 {
 	void *p, **a, **b;
-	int bno, dno, pin, gsi, flags, n, i;
+	int bno, dno, pin, gsi, flags;
+	int n, i;
 
 	bno = pcibusno(dot);
-	if(bno < 0){
-		DBG("enumprt: pci not found %V\n", dot);
+	if(bno < 0)
 		return 1;
-	}
 
 	/* evalulate _PRT method */
 	p = nil;
@@ -619,35 +481,277 @@ enumprt(void *dot, void * _1)
 		dno = amlint(b[0])>>16;
 		pin = amlint(b[1]);
 		gsi = amlint(b[3]);
-		if(gsi == 0){
+		if(gsi==0){
 			gsi = setuplink(b[2], &flags);
 			if(gsi <= 0)
 				continue;
 		}
-		addirq(gsi, BusPCI, bno, (dno<<2)|pin, 0);
+		addirq(gsi, BusPCI, bno, (dno<<2)|pin, flags);
 	}
 	amldrop(p);
+
 	return 1;
 }
 
-static void
-loadtbls(char *name, int all)
+static int
+enumec(void *dot, void * _)
 {
-	int i;
-	Tbl *t;
+	int cmdport, dataport;
+	uint8_t *b;
+	void *x;
+	char *id;
 
-	for(i = 0; i < ntblmap; i++){
-		t = tblmap[i];
-		if(jehanne_memcmp(t->sig, name, 4) == 0){
-			amlload(t->data, tbldlen(t));
-			if(!all)
-				break;
-		}
-	}
+	b = nil;
+	id = eisaid(amlval(amlwalk(dot, "^_HID")));
+	if(id == nil || strcmp(id, "PNP0C09") != 0)
+		return 1;
+	if((x = amlwalk(dot, "^_CRS")) == nil)
+		return 1;
+	if(amleval(x, "", &b) < 0 || amltag(b) != 'b' || amllen(b) < 16)
+		return 1;
+	if(b[0] != 0x47 || b[8] != 0x47)	/* two i/o port descriptors */
+		return 1;
+	dataport = b[0+2] | b[0+3]<<8;
+	cmdport = b[8+2] | b[8+3]<<8;
+	ecinit(cmdport, dataport);
+	return 1;
 }
 
 static long
-readtbls(Chan* _1, void *v, long n, int64_t o)
+readmem(Chan* _, void *v, long n, int64_t o)
+{
+	uintptr_t pa = (uintptr_t)o;
+	void *t;
+
+	if((n = memcheck(pa, n)) <= 0)
+		return 0;
+	if((t = vmap(pa, n)) == nil)
+		error(Enovmem);
+	if(waserror()){
+		vunmap(t, n);
+		nexterror();
+	}
+	memmove(v, t, n);
+	vunmap(t, n);
+	poperror();
+	return n;
+}
+
+static long
+writemem(Chan* _, void *v, long n, int64_t o)
+{
+	uintptr_t pa = (uintptr_t)o;
+	void *t;
+
+	if(memcheck(pa, n) != n)
+		error(Eio);
+	if((t = vmap(pa, n)) == nil)
+		error(Enovmem);
+	if(waserror()){
+		vunmap(t, n);
+		nexterror();
+	}
+	memmove(t, v, n);
+	vunmap(t, n);
+	poperror();
+	return n;
+}
+
+static void
+acpiinit(void)
+{
+	Tbl *t;
+	Apic *a;
+	void *va;
+	uint8_t *s, *p, *e;
+	uint32_t lapicbase;
+	int machno, i, c;
+
+	maptables();
+
+	amlinit();
+
+	/* load DSDT */
+	for(i=0; i<ntblmap; i++){
+		t = tblmap[i];
+		if(memcmp(t->sig, "DSDT", 4) == 0){
+			amlintmask = (~0ULL) >> (t->rev <= 1)*32;
+			amlload(t->data, tbldlen(t));
+			break;
+		}
+	}
+
+	/* load SSDT, there can be multiple tables */
+	for(i=0; i<ntblmap; i++){
+		t = tblmap[i];
+		if(memcmp(t->sig, "SSDT", 4) == 0)
+			amlload(t->data, tbldlen(t));
+	}
+
+	/* set APIC mode */
+	amleval(amlwalk(amlroot, "_PIC"), "i", 1, nil);
+
+	for(i=0; i<ntblmap; i++){
+		t = tblmap[i];
+		if(memcmp(t->sig, "APIC", 4) == 0)
+			goto Foundapic;
+	}
+	panic("acpiinit: no MADT (APIC) table");
+	return;
+
+Foundapic:
+	s = t->data;
+	e = s + tbldlen(t);
+	lapicbase = get32(s); s += 8;
+	va = vmap(lapicbase, 1024);
+	print("LAPIC: %.8lux %#p\n", lapicbase, va);
+	if(va == nil)
+		panic("acpiinit: cannot map lapic %.8lux", lapicbase);
+
+	machno = 0;
+	for(p = s; p < e; p += c){
+		c = p[1];
+		if(c < 2 || (p+c) > e)
+			break;
+		switch(*p){
+		case 0x00:	/* Processor Local APIC */
+			if(p[3] > MaxAPICNO)
+				break;
+			if((a = xalloc(sizeof(Apic))) == nil)
+				panic("acpiinit: no memory for Apic");
+			a->type = PcmpPROCESSOR;
+			a->apicno = p[3];
+			a->paddr = lapicbase;
+			a->addr = va;
+			a->lintr[0] = ApicIMASK;
+			a->lintr[1] = ApicIMASK;
+			a->flags = p[4] & PcmpEN;
+
+			/* skip disabled processors */
+			if((a->flags & PcmpEN) == 0 || mpapic[a->apicno] != nil){
+				xfree(a);
+				break;
+			}
+			a->machno = machno++;
+
+			/*
+			 * platform firmware should list the boot processor
+			 * as the first processor entry in the MADT
+			 */
+			if(a->machno == 0)
+				a->flags |= PcmpBP;
+
+			mpapic[a->apicno] = a;
+			break;
+		case 0x01:	/* I/O APIC */
+			if(p[2] > MaxAPICNO)
+				break;
+			if((a = xalloc(sizeof(Apic))) == nil)
+				panic("acpiinit: no memory for io Apic");
+			a->type = PcmpIOAPIC;
+			a->apicno = p[2];
+			a->paddr = get32(p+4);
+			if((a->addr = vmap(a->paddr, 1024)) == nil)
+				panic("acpiinit: cannot map ioapic %.8lux", a->paddr);
+			a->gsibase = get32(p+8);
+			a->flags = PcmpEN;
+			mpioapic[a->apicno] = a;
+			ioapicinit(a, a->apicno);
+			break;
+		}
+	}
+
+	/*
+	 * need 2nd pass as vbox puts interrupt overrides
+	 * *before* the ioapic entries (!)
+	 */
+	for(p = s; p < e; p += c){
+		c = p[1];
+		if(c < 2 || (p+c) > e)
+			break;
+		switch(*p){
+		case 0x02:	/* Interrupt Source Override */
+			addirq(get32(p+4), BusISA, 0, p[3], get16(p+8));
+			break;
+		case 0x03:	/* NMI Source */
+		case 0x04:	/* Local APIC NMI */
+		case 0x05:	/* Local APIC Address Override */
+		case 0x06:	/* I/O SAPIC */
+		case 0x07:	/* Local SAPIC */
+		case 0x08:	/* Platform Interrupt Sources */
+		case 0x09:	/* Processor Local x2APIC */
+		case 0x0A:	/* x2APIC NMI */
+		case 0x0B:	/* GIC */
+		case 0x0C:	/* GICD */
+			break;
+		}
+	}
+
+	/* find embedded controller */
+	amlenum(amlroot, "_HID", enumec, nil);
+
+	/* look for PCI interrupt mappings */
+	amlenum(amlroot, "_PRT", enumprt, nil);
+
+	/* add identity mapped legacy isa interrupts */
+	for(i=0; i<16; i++)
+		addirq(i, BusISA, 0, i, 0);
+
+	/* free the AML interpreter */
+	amlexit();
+
+	/*
+	 * Ininitalize local APIC and start application processors.
+	 */
+	mpinit();
+}
+
+static void
+acpireset(void)
+{
+	uint8_t *p;
+	Tbl *t;
+	int i;
+
+	/* stop application processors */
+	mpshutdown();
+
+	/* locate and write platform reset register */
+	for(i=0; i < ntblmap; i++){
+		t = tblmap[i];
+		if(memcmp(t->sig, "FACP", 4) != 0)
+			continue;
+		if(get32(t->len) <= 128)
+			break;
+		p = (uint8_t*)t;
+		if((get32(p + 112) & (1<<10)) == 0)
+			break;
+		if(p[116+0] != IoSpace)
+			break;
+		outb(get32(p+116+4), p[128]);
+		break;
+	}
+
+	/* acpi shutdown failed, try generic reset */
+	archreset();
+}
+
+static int identify(void);
+
+PCArch archacpi = {
+.id=		"ACPI",
+.ident=		identify,
+.reset=		acpireset,
+.intrinit=	acpiinit,
+.intrenable=	mpintrenable,
+.intron=	lapicintron,
+.introff=	lapicintroff,
+.fastclock=	i8253read,
+.timerset=	lapictimerset,
+};
+
+static long
+readtbls(Chan* _, void *v, long n, int64_t o)
 {
 	int i, l, m;
 	uint8_t *p;
@@ -666,7 +770,7 @@ readtbls(Chan* _1, void *v, long n, int64_t o)
 		m = l - o;
 		if(m > n)
 			m = n;
-		jehanne_memmove(p, (uint8_t*)t + o, m);
+		memmove(p, (uint8_t*)t + o, m);
 		p += m;
 		n -= m;
 		o = 0;
@@ -674,567 +778,271 @@ readtbls(Chan* _1, void *v, long n, int64_t o)
 	return p - (uint8_t*)v;
 }
 
-enum {
-	Lapicen		= 1,
-};
-
-typedef struct Parsedat Parsedat;
-struct Parsedat {
-	int	maxmach;		/* for the apic structure */
-};
-
-static void
-parseapic(Tbl *t, Parsedat *dat)
-{
-	uint8_t *p, *e;
-	int i, c, nmach, maxmach;
-	uintmem lapicbase;
-
-	maxmach = dat->maxmach;
-
-	/* set APIC mode */
-	amleval(amlwalk(amlroot, "_PIC"), "i", 1, nil);
-
-	p = t->data;
-	e = p + tbldlen(t);
-	lapicbase = get32(p);
-	p += 8;
-
-	nmach = 0;
-	for(; p < e; p += c){
-		c = p[1];
-		if(c < 2 || (p+c) > e)
-			break;
-		switch(*p){
-		case 0x00:	/* Processor Local APIC */
-			if(p[4] & Lapicen && nmach < maxmach){
-				lapicinit(p[3], lapicbase, nmach==0);
-				++nmach;
-			}
-			break;
-		case 0x01:	/* I/O APIC */
-			ioapicinit(p[2], get32(p+8), get32(p+4));
-			break;
-		case 0x02:	/* Interrupt Source Override */
-			addirq(get32(p+4), BusISA, 0, p[3], get16(p+8));
-			break;
-		case 0x03:	/* NMI Source */
-			jehanne_print("acpi: ignoring nmi source\n");
-			break;
-		case 0x04:	/* Local APIC NMI */
-			DBG("acpi: lapic nmi %.2ux flags %.4ux lint# %d (ignored)\n",
-				p[2], (uint32_t)get16(p+3), p[5]);
-			break;
-		case 0x05:	/* Local APIC Address Override */
-		case 0x06:	/* I/O SAPIC */
-		case 0x07:	/* Local SAPIC */
-		case 0x08:	/* Platform Interrupt Sources */
-		case 0x09:	/* Processor Local x2APIC */
-		case 0x0A:	/* x2APIC NMI */
-		case 0x0B:	/* GIC */
-		case 0x0C:	/* GICD */
-			jehanne_print("acpi: ignoring entry: %.2ux\n", *p);
-			break;
-		}
-	}
-
-	/* look for PCI interrupt mappings */
-	amlenum(amlroot, "_PRT", enumprt, nil);
-
-	/* add identity mapped legacy isa interrupts */
-	for(i=0; i<16; i++)
-		addirq(i, BusISA, 0, i, 0);
-
-	DBG("acpiinit: %d maches\n", nmach);
-}
-
-static void
-parsesrat(Tbl *t, Parsedat* _1)
-{
-	uint8_t *p, *e;
-
-	e = t->data + tbldlen(t);
-	for(p = t->data + 12; p < e; p += p[1]){
-		switch(p[0]){
-		case 0:		/* local apic */
-			if(get32(p+4)&1)
-				lapicsetdom(p[3], p[2] | p[9]<<24| p[10]<<16 | p[11]<<8);
-			break;
-		case 1:		/* memory affinity */
-			if(get32(p+28)&1)
-				memaffinity(get64(p+8), get64(p+16), get32(p+2), p[0]);
-			break;
-		case 2:		/* x2apic */
-			if(get32(p+12)&1)
-				lapicsetdom(get32(p+8), get32(p+4));
-			break;
-		default:
-			jehanne_print("acpi: SRAT type %.2ux unknown\n", p[0]);
-			break;
-		}
-	}
-}
-
-static char* regnames[] = {
-	"mem", "io", "pcicfg", "embed",
-	"smb", "cmos", "pcibar",
-};
-
 static int
-Gfmt(Fmt* f)
+identify(void)
 {
-	Gas *g;
+	uintptr_t pa;
+	char *cp;
 
-	g = va_arg(f->args, Gas*);
-	switch(g->spc){
-	case MemSpace:
-	case IoSpace:
-	case EbctlSpace:
-	case SmbusSpace:
-	case CmosSpace:
-	case PcibarSpace:
-	case IpmiSpace:
-		jehanne_fmtprint(f, "[%s", regnames[g->spc]);
-		break;
-	case PcicfgSpace:
-		jehanne_fmtprint(f, "[pci %T", (int)g->addr);
-		break;
-//	case FixedhwSpace:		// undeclared
-//		jehanne_fmtprint(f, "[hw");
-//		break;
-	default:
-		jehanne_fmtprint(f, "[%#ux", g->spc);
-		break;
-	}
-	jehanne_fmtprint(f, " %#llux", g->addr);
-	if(g->off != 0)
-		jehanne_fmtprint(f, "+%d", g->off);
-	jehanne_fmtprint(f, " len %d", g->len);
-	if(g->accsz != 0)
-		jehanne_fmtprint(f, " accsz %d", g->accsz);
-	return jehanne_fmtprint(f, "]");
-}
-
-static void
-gasget(Gas *gas, uint8_t *p)
-{
-	gas->spc = p[0];
-	gas->len = p[1];
-	gas->off = p[2];
-	gas->accsz = p[3];
-	gas->addr = get64(p+4);
-}
-
-static int
-loadfacs(uintmem pa)
-{
-	USED(pa);
+	if((cp = getconf("*acpi")) == nil)
+		return 1;
+	pa = (uintptr_t)strtoull(cp, nil, 16);
+	if(pa <= 1)
+		rsd = sigsearch("RSD PTR ");
+	else if(pa < MemMin)
+		rsd = KADDR(pa);
+	else
+		rsd = vmap(pa, sizeof(Rsd));
+	if(rsd == nil)
+		return 1;
+	if(checksum(rsd, 20) && checksum(rsd, 36))
+		return 1;
+	addarchfile("acpitbls", 0444, readtbls, nil);
+	addarchfile("acpimem", 0600, readmem, writemem);
+	if(strcmp(cp, "0") == 0)
+		return 1;
+	if((cp = getconf("*nomp")) != nil && strcmp(cp, "0") != 0)
+		return 1;
+	if(m->havetsc && getconf("*notsc") == nil)
+		archacpi.fastclock = tscticks;
 	return 0;
 }
 
-static long
-readfadt(Chan* _1, void *a, long n, int64_t o)
+static int
+readpcicfg(Amlio *io, void *data, int n, int offset)
 {
-	char *s, *p, *e;
-	Fadt *f;
+	uint32_t r, x;
+	Pcidev *p;
+	uint8_t *a;
+	int i;
 
-	s = smalloc(READSTR);
-	if(waserror()){
-		jehanne_free(s);
-		nexterror();
+	a = data;
+	p = io->aux;
+	if(p == nil)
+		return -1;
+	offset += io->off;
+	if(offset > 256)
+		return 0;
+	if(n+offset > 256)
+		n = 256-offset;
+	r = offset;
+	if(!(r & 3) && n == 4){
+		x = pcicfgr32(p, r);
+		PBIT32(a, x);
+		return 4;
 	}
-	p = s;
-	e = s+READSTR;
-	f = &fadt;
-
-	p = jehanne_seprint(p, e, "facs %#ux\n", f->facs);
-	p = jehanne_seprint(p, e, "dsdt %#ux\n", f->dsdt);
-	p = jehanne_seprint(p, e, "pmprofile %#ux\n", f->pmprofile);
-	p = jehanne_seprint(p, e, "sciint %d\n", f->sciint);
-	p = jehanne_seprint(p, e, "smicmd %#ux\n", f->smicmd);
-	p = jehanne_seprint(p, e, "acpienable %#ux\n", f->acpienable);
-	p = jehanne_seprint(p, e, "acpidisable %#ux\n", f->acpidisable);
-	p = jehanne_seprint(p, e, "s4biosreq %#ux\n", f->s4biosreq);
-	p = jehanne_seprint(p, e, "pstatecnt %#ux\n", f->pstatecnt);
-	p = jehanne_seprint(p, e, "pm1aevtblk %#ux\n", f->pm1aevtblk);
-	p = jehanne_seprint(p, e, "pm1bevtblk %#ux\n", f->pm1bevtblk);
-	p = jehanne_seprint(p, e, "pm1acntblk %#ux\n", f->pm1acntblk);
-	p = jehanne_seprint(p, e, "pm1bcntblk %#ux\n", f->pm1bcntblk);
-	p = jehanne_seprint(p, e, "pm2cntblk %#ux\n", f->pm2cntblk);
-	p = jehanne_seprint(p, e, "pmtmrblk %#ux\n", f->pmtmrblk);
-	p = jehanne_seprint(p, e, "gpe0blk %#ux\n", f->gpe0blk);
-	p = jehanne_seprint(p, e, "gpe1blk %#ux\n", f->gpe1blk);
-	p = jehanne_seprint(p, e, "pm1evtlen %#ux\n", f->pm1evtlen);
-	p = jehanne_seprint(p, e, "pm1cntlen %#ux\n", f->pm1cntlen);
-	p = jehanne_seprint(p, e, "pm2cntlen %#ux\n", f->pm2cntlen);
-	p = jehanne_seprint(p, e, "pmtmrlen %#ux\n", f->pmtmrlen);
-	p = jehanne_seprint(p, e, "gpe0blklen %#ux\n", f->gpe0blklen);
-	p = jehanne_seprint(p, e, "gpe1blklen %#ux\n", f->gpe1blklen);
-	p = jehanne_seprint(p, e, "gp1base %#ux\n", f->gp1base);
-	p = jehanne_seprint(p, e, "cstcnt %#ux\n", f->cstcnt);
-	p = jehanne_seprint(p, e, "plvl2lat %#ux\n", f->plvl2lat);
-	p = jehanne_seprint(p, e, "plvl3lat %#ux\n", f->plvl3lat);
-	p = jehanne_seprint(p, e, "flushsz %#ux\n", f->flushsz);
-	p = jehanne_seprint(p, e, "flushstride %#ux\n", f->flushstride);
-	p = jehanne_seprint(p, e, "dutyoff %#ux\n", f->dutyoff);
-	p = jehanne_seprint(p, e, "dutywidth %#ux\n", f->dutywidth);
-	p = jehanne_seprint(p, e, "dayalrm %#ux\n", f->dayalrm);
-	p = jehanne_seprint(p, e, "monalrm %#ux\n", f->monalrm);
-	p = jehanne_seprint(p, e, "century %#ux\n", f->century);
-	p = jehanne_seprint(p, e, "iapcbootarch %#ux\n", f->iapcbootarch);
-	p = jehanne_seprint(p, e, "flags %#ux\n", f->flags);
-	p = jehanne_seprint(p, e, "resetreg %G\n", &f->resetreg);
-	if(f->rev >= 3){
-		p = jehanne_seprint(p, e, "resetval %#ux\n", f->resetval);
-		p = jehanne_seprint(p, e, "xfacs %#llux\n", f->xfacs);
-		p = jehanne_seprint(p, e, "xdsdt %#llux\n", f->xdsdt);
-		p = jehanne_seprint(p, e, "xpm1aevtblk %G\n", &f->xpm1aevtblk);
-		p = jehanne_seprint(p, e, "xpm1bevtblk %G\n", &f->xpm1bevtblk);
-		p = jehanne_seprint(p, e, "xpm1acntblk %G\n", &f->xpm1acntblk);
-		p = jehanne_seprint(p, e, "xpm1bcntblk %G\n", &f->xpm1bcntblk);
-		p = jehanne_seprint(p, e, "xpm2cntblk %G\n", &f->xpm2cntblk);
-		p = jehanne_seprint(p, e, "xpmtmrblk %G\n", &f->xpmtmrblk);
-		p = jehanne_seprint(p, e, "xgpe0blk %G\n", &f->xgpe0blk);
-		p = jehanne_seprint(p, e, "xgpe1blk %G\n", &f->xgpe1blk);
+	if(!(r & 1) && n == 2){
+		x = pcicfgr16(p, r);
+		PBIT16(a, x);
+		return 2;
 	}
-	USED(p);
+	for(i = 0; i <  n; i++){
+		x = pcicfgr8(p, r);
+		PBIT8(a, x);
+		a++;
+		r++;
+	}
+	return i;
+}
 
-	n = readstr(o, a, n, s);
-	poperror();
-	jehanne_free(s);
+static int
+readec(Amlio *io, void *data, int n, int off)
+{
+	int port, v;
+	uint8_t *p;
+
+	USED(io);
+	if(off < 0 || off >= 256)
+		return 0;
+	if(off+n > 256)
+		n = 256 - off;
+	p = data;
+	for(port = off; port < off+n; port++){
+		if((v = ecread(port)) < 0)
+			break;
+		*p++ = v;
+	}
 	return n;
 }
 
-static void
-parsefadt(Tbl *t, Parsedat* _1)
+static int
+writeec(Amlio *io, void *data, int n, int off)
 {
+	int port;
 	uint8_t *p;
-	Fadt *f;
 
-	p = (uint8_t*)t;
-	f = &fadt;
-	f->rev = t->rev;
-	f->facs = get32(p + 36);
-	f->dsdt = get32(p + 40);
-	f->pmprofile = p[45];
-	f->sciint = get16(p+46);
-	f->smicmd = get32(p+48);
-	f->acpienable = p[52];
-	f->acpidisable = p[53];
-	f->s4biosreq = p[54];
-	f->pstatecnt = p[55];
-	f->pm1aevtblk = get32(p+56);
-	f->pm1bevtblk = get32(p+60);
-	f->pm1acntblk = get32(p+64);
-	f->pm1bcntblk = get32(p+68);
-	f->pm2cntblk = get32(p+72);
-	f->pmtmrblk = get32(p+76);
-	f->gpe0blk = get32(p+80);
-	f->gpe1blk = get32(p+84);
-	f->pm1evtlen = p[88];
-	f->pm1cntlen = p[89];
-	f->pm2cntlen = p[90];
-	f->pmtmrlen = p[91];
-	f->gpe0blklen = p[92];
-	f->gpe1blklen = p[93];
-	f->gp1base = p[94];
-	f->cstcnt = p[95];
-	f->plvl2lat = get16(p+96);
-	f->plvl3lat = get16(p+98);
-	f->flushsz = get16(p+100);
-	f->flushstride = get16(p+102);
-	f->dutyoff = p[104];
-	f->dutywidth = p[105];
-	f->dayalrm = p[106];
-	f->monalrm = p[107];
-	f->century = p[108];
-	f->iapcbootarch = get16(p+109);
-	f->flags = get32(p+112);
-	gasget(&f->resetreg, p+116);
-
-	if(f->rev >= 3){
-		f->resetval = p[128];
-		f->xfacs = get64(p+132);
-		f->xdsdt = get64(p+140);
-		gasget(&f->xpm1aevtblk, p+148);
-		gasget(&f->xpm1bevtblk, p+160);
-		gasget(&f->xpm1acntblk, p+172);
-		gasget(&f->xpm1bcntblk, p+184);
-		gasget(&f->xpm2cntblk, p+196);
-		gasget(&f->xpmtmrblk, p+208);
-		gasget(&f->xgpe0blk, p+220);
-		gasget(&f->xgpe1blk, p+232);
-	}
-
-//	dumpfadt(f);
-	if(f->xfacs != 0)
-		loadfacs(f->xfacs);
-	else
-		loadfacs(f->facs);
-}
-
-typedef	struct	Hpet	Hpet;
-struct Hpet {
-	uint8_t	id[4];
-	uint8_t	addr[12];		/* gas */
-	uint8_t	seqno;
-	uint8_t	minticks[2];
-	uint8_t	attr;			/* Page Protection */
-};
-
-static void
-parsehpet(Tbl *t, Parsedat* _1)
-{
-	int minticks;
-	Hpet *h;
-	Gas g;
-
-	h = (Hpet*)t->data;
-	gasget(&g, h->addr);
-	minticks = get16(h->minticks);
-
-	DBG("acpi: hpet id %#ux addr %d %d %d %d %#p seqno %d ticks %d attr %#ux\n",
-		get32(h->id), g.spc, g.len, g.off, g.accsz,
-		g.addr, h->seqno, minticks, h->attr);
-	hpetinit(get32(h->id), h->seqno, g.addr, minticks);
-}
-
-typedef struct Mcfg Mcfg;
-struct Mcfg
-{
-	uint64_t	base;	/* base of enhanced configuration mechanism */
-	uint16_t	pciseg;	/* pci segment group number */
-	uint8_t	start;		/* first pci bus number covered by this */
-	uint8_t	end;		/* last pci bus number covered */
-	/* 4 reserved */
-};
-static Mcfg mcfg[8];
-static int	nmcfg;
-
-static void
-parsemcfg(Tbl *t, Parsedat* _1)
-{
-	uint8_t *p, *e;
-	Mcfg *mc;
-
-	if(nmcfg == nelem(mcfg))
-		return;
-	mc = &mcfg[nmcfg++];
-	e = t->data + tbldlen(t);
-	p = t->data + 8;	/* reserved */
-//	mc->nbus = 0;
-	for(; p < e; p += 16){
-		mc->base = get64(p+0);
-		mc->pciseg = get16(p+8);
-		mc->start = p[10];
-		mc->end = p[11];
-jehanne_print("MCFG: %d-%d %d %#P\n", mc->start, mc->end, mc->pciseg, mc->base);
-	}
-}
-
-uintmem
-pcixcfgspace(int b)
-{
-	Mcfg *m;
-	int i;
-
-	for(i = 0; i < nmcfg; i++){
-		m = &mcfg[i];
-		if(m->start <= b && b <= m->end)
-			return m->base;
-	}
-	return 0;
-}
-
-enum {
-	Blegacy		= 1<<0,
-	B8042kbd	= 1<<1,
-	Bnovga		= 1<<2,
-	Bnomsi		= 1<<3,
-	Bnocmos	= 1<<4,
-};
-
-static void
-iapcbootarch(void)
-{
-	int i;
-
-	i = fadt.iapcbootarch;
-
-	ioconf.nolegacyprobe = !(i&Blegacy);
-	ioconf.noi8042kbd = !(i&B8042kbd);
-	ioconf.novga = i&Bnovga;
-	ioconf.nomsi = i&Bnomsi;
-	ioconf.nocmos = i&Bnocmos;
-}
-
-typedef struct Ptab Ptab;
-struct Ptab {
-	char	*sig;
-	void	(*parse)(Tbl*, Parsedat*);
-	int	required;
-};
-
-static Ptab ptab[] = {
-	"APIC",		parseapic,	1,
-	"SRAT",		parsesrat,	0,
-	"FACP",		parsefadt,	0,
-	"HPET",		parsehpet,	0,
-	"MCFG",		parsemcfg,	0,
-};
-
-static void
-parsetables(Parsedat *dat)
-{
-	int i;
-	Tbl *t;
-	Ptab *p;
-
-	jehanne_print("acpi parse: ");
-	for(i = 0; i < nelem(ptab); i++){
-		p = ptab + i;
-		if((t = acpigettbl(p->sig)) != nil){
-			p->parse(t, dat);
-			jehanne_print("%s ", p->sig);
-		}else if(p->required)
-			panic("acpi: parsetables: no %s table\n", p->sig);
-	}
-	jehanne_print("\n");
-}
-
-int
-checkpnpid(void *dot, char *pnpid)
-{
-	char *id;
-	void *p, *x;
-
-	if(dot == nil)
+	USED(io);
+	if(off < 0 || off+n > 256)
 		return -1;
-	id = nil;
-	if((x = amlwalk(dot, "_HID")) != nil)
-		if((p = amlval(x)) != nil)
-			id = eisaid(p);
-	if(id == nil)
-		return -1;
-	return jehanne_strcmp(id, pnpid);
-}
-
-enum {
-	Present	= 1<<0,
-	Decode	= 1<<1,
-	Funct	= 1<<3,
-	Staok	= Present | Funct,
-};
-
-int
-staok(void *dot)
-{
-	int b;
-	void *p, *x;
-
-	if((x = amlwalk(dot, "_STA")) == nil)
-		return 0;
-	if(amleval(x, "", &p) != 0)
-		return 0;
-	b = amlint(p);
-	return b & Staok;
+	p = data;
+	for(port = off; port < off+n; port++)
+		if(ecwrite(port, *p++) < 0)
+			break;
+	return n;
 }
 
 static int
-evalini(void *dot)
+writepcicfg(Amlio *io, void *data, int n, int offset)
 {
-	int b;
-	void *p, *x;
+	uint32_t r, x;
+	Pcidev *p;
+	uint8_t *a;
+	int i;
 
-	b = staok(dot);
-	if((b & Present) == 0)
+	a = data;
+	p = io->aux;
+	if(p == nil)
 		return -1;
-	if((x = amlwalk(dot, "_INI")) != nil){
-		if(amleval(x, "", &p) == 0)
-			jehanne_print("eval _INI → %V\n", p);
+	offset += io->off;
+	if(offset > 256)
+		return 0;
+	if(n+offset > 256)
+		n = 256-offset;
+	r = offset;
+	if(!(r & 3) && n == 4){
+		x = GBIT32(a);
+		pcicfgw32(p, r, x);
+		return 4;
 	}
-	return 0;
+	if(!(r & 1) && n == 2){
+		x = GBIT16(a);
+		pcicfgw16(p, r, x);
+		return 2;
+	}
+	for(i = 0; i <  n; i++){
+		x = GBIT8(a);
+		pcicfgw8(p, r, x);
+		a++;
+		r++;
+	}
+	return i;
+}
+
+static int
+readioport(Amlio *io, void *data, int len, int port)
+{
+	uint8_t *a;
+
+	a = data;
+	port += io->off;
+	switch(len){
+	case 4:
+		PBIT32(a, inl(port));
+		return 4;
+	case 2:
+		PBIT16(a, ins(port));
+		return 2;
+	case 1:
+		PBIT8(a, inb(port));
+		return 1;
+	}
+	return -1;
+}
+
+static int
+writeioport(Amlio *io, void *data, int len, int port)
+{
+	uint8_t *a;
+
+	a = data;
+	port += io->off;
+	switch(len){
+	case 4:
+		outl(port, GBIT32(a));
+		return 4;
+	case 2:
+		outs(port, GBIT16(a));
+		return 2;
+	case 1:
+		outb(port, GBIT8(a));
+		return 1;
+	}
+	return -1;
 }
 
 int
-cfgpwerb(void)
+amlmapio(Amlio *io)
 {
-	void *dot;
+	int tbdf;
+	Pcidev *pdev;
+	char buf[64];
 
-	dot = amlwalk(amlroot, "\\_SB_.PWRB");
-	if(checkpnpid(dot, "PNP0C0C") != 0)
-		return 0;
-//	jehanne_print("PWRB %V\n", dot);
-	if(evalini(dot) == -1){
-		jehanne_print("PWRB evalini fails\n");
-		return 0;
-	}
-	return 1;
-}
-
-static void
-cfgsleep(void)
-{
-	char buf[16];
-	uint32_t *t, i;
-	void **v;
-
-	/* default soft off values */
-	t = acpicfg.sval[5];
-	t[0] = 7;
-	t[1] = 0;
-
-	/* look for the proper ones */
-	for(i = 0; i < 6; i++){
-		t = acpicfg.sval[i];
-		jehanne_snprint(buf, sizeof buf, "\\_S%d_", i);
-		v = amlval(amlwalk(amlroot, buf));
-		if(v != nil && amltag(v) == 'p' && amllen(v) == 4){
-			t[0] = amlint(v[0]);
-			t[1] = amlint(v[1]);
+	switch(io->space){
+	default:
+		print("amlmapio: address space %x not implemented\n", io->space);
+		break;
+	case MemSpace:
+		if(memcheck(io->off, io->len) != io->len){
+			print("amlmapio: [%#p-%#p) overlaps usable memory\n",
+				(uintptr_t)io->off, (uintptr_t)(io->off+io->len));
+			break;
 		}
+		if((io->va = vmap(io->off, io->len)) == nil){
+			print("amlmapio: vmap failed\n");
+			break;
+		}
+		return 0;
+	case IoSpace:
+		snprint(buf, sizeof(buf), "%N", io->name);
+		if(ioalloc(io->off, io->len, 0, buf) < 0){
+			print("amlmapio: ioalloc failed\n");
+			break;
+		}
+		io->read = readioport;
+		io->write = writeioport;
+		return 0;
+	case PcicfgSpace:
+		if((tbdf = pciaddr(io->name)) < 0){
+			print("amlmapio: no address\n");
+			break;
+		}
+		if((pdev = pcimatchtbdf(tbdf)) == nil){
+			print("amlmapio: no device %T\n", tbdf);
+			break;
+		}
+		io->aux = pdev;
+		io->read = readpcicfg;
+		io->write = writepcicfg;
+		return 0;
+	case EbctlSpace:
+		io->read = readec;
+		io->write = writeec;
+		return 0;
 	}
+	print("amlmapio: mapping %N failed\n", io->name);
+	return -1;
 }
 
 void
-acpiinit(int maxmach)
+amlunmapio(Amlio *io)
 {
-	int i;
-	Parsedat dat;
-
-	jehanne_print("acpiinit\n");
-	jehanne_fmtinstall('G', Gfmt);
-	maptables();
-	amlinit();
-	loadtbls("DSDT", 0);
-	loadtbls("SSDT", 1);
-
-	jehanne_memset(&dat, 0, sizeof dat);
-	dat.maxmach = maxmach;
-	parsetables(&dat);
-	if(fadt.smicmd != 0)
-		iapcbootarch();
-
-	cfgpwerb();
-	cfgsleep();
-
-	/* free the AML interpreter */
-	amlexit();
-
-	addarchfile("acpifadt", 0444, readfadt, nil);		/* hack */
-	addarchfile("acpitbls", 0444, readtbls, nil);
-	if(1||DBGFLG){
-		jehanne_print("acpi load: ");
-		for(i = 0; i < ntblmap; i++)
-			jehanne_print("%.4s ", (char*)tblmap[i]->sig);
-		jehanne_print("\n");
+	switch(io->space){
+	case MemSpace:
+		vunmap(io->va, io->len);
+		break;
+	case IoSpace:
+		iofree(io->off);
+		break;
 	}
-	lapicdump();
-	iordtdump();
 }
 
-int
-corecolor(int _1)
-{
-	return 0;
+void*
+amlalloc(int n){
+	void *p;
+
+	if((p = malloc(n)) == nil)
+		panic("amlalloc: no memory");
+	memset(p, 0, n);
+	return p;
+}
+
+void
+amlfree(void *p){
+	free(p);
+}
+
+void
+amldelay(int us)
+{
+	microdelay(us);
 }
diff --git a/sys/src/kern/386/ahci.h b/sys/src/kern/amd64/ahci.h
similarity index 100%
rename from sys/src/kern/386/ahci.h
rename to sys/src/kern/amd64/ahci.h
diff --git a/sys/src/kern/amd64/arch.c b/sys/src/kern/amd64/arch.c
index ae597a7..efbb275 100644
--- a/sys/src/kern/amd64/arch.c
+++ b/sys/src/kern/amd64/arch.c
@@ -20,8 +20,6 @@ procrestore(Proc *p)
 		return;
 	cycles(&t);
 	p->pcycles -= t;
-
-	fpuprocrestore(p);
 }
 
 /*
@@ -35,11 +33,35 @@ procsave(Proc *p)
 	cycles(&t);
 	p->pcycles += t;
 
-	fpuprocsave(p);
+	if(p->fpstate == FPactive){
+		if(p->state == Moribund)
+			fpclear();
+		else{
+			/*
+			 * Fpsave() stores without handling pending
+			 * unmasked exeptions. Postnote() can't be called
+			 * here as sleep() already has up->rlock, so
+			 * the handling of pending exceptions is delayed
+			 * until the process runs again and generates an
+			 * emulation fault to activate the FPU.
+			 */
+			fpsave(&p->fpsave);
+		}
+		p->fpstate = FPinactive;
+	}
 
 	/*
+	 * While this processor is in the scheduler, the process could run
+	 * on another processor and exit, returning the page tables to
+	 * the free list where they could be reallocated and overwritten.
+	 * When this processor eventually has to get an entry from the
+	 * trashed page tables it will crash.
+	 *
+	 * If there's only one processor, this can't happen.
+	 * You might think it would be a win not to do this in that case,
+	 * especially on VMware, but it turns out not to matter.
 	 */
-	mmuflushtlb(m->pml4->pa);
+	mmuflushtlb();
 }
 
 static void
@@ -76,12 +98,21 @@ onIdleSpin(void)
 /*
  *  put the processor in the halt state if we've no processes to run.
  *  an interrupt will get us going again.
+ *
+ *  halting in an smp system can result in a startup latency for
+ *  processes that become ready.
+ *  if idle_spin is zero, we care more about saving energy
+ *  than reducing this latency.
+ *
+ *  the performance loss with idle_spin == 0 seems to be slight
+ *  and it reduces lock contention (thus system time and real time)
+ *  on many-core systems with large values of NPROC.
  */
 void
 idlehands(void)
 {
 	extern int nrdy;
-	if(sys->nonline == 1)
+	if(sys->nmach == 1)
 		halt();
 	else if (SUPPORT_MWAIT)
 		mwait32(&nrdy, 0);
diff --git a/sys/src/kern/amd64/archamd64.c b/sys/src/kern/amd64/archamd64.c
deleted file mode 100644
index 942b878..0000000
--- a/sys/src/kern/amd64/archamd64.c
+++ /dev/null
@@ -1,406 +0,0 @@
-#include "u.h"
-#include "../port/lib.h"
-#include "mem.h"
-#include "dat.h"
-#include "fns.h"
-
-static int
-cpuidinit(void)
-{
-	uint32_t eax, info[4];
-
-	/*
-	 * Standard CPUID functions.
-	 * Functions 0 and 1 will be needed multiple times
-	 * so cache the info now.
-	 */
-	if((m->ncpuinfos = cpuid(0, 0, m->cpuinfo[0])) == 0)
-		return 0;
-	m->ncpuinfos++;
-
-	if(jehanne_memcmp(&m->cpuinfo[0][1], "GenuntelineI", 12) == 0)
-		m->isintelcpu = 1;
-	cpuid(1, 0, m->cpuinfo[1]);
-
-	/*
-	 * Extended CPUID functions.
-	 */
-	if((eax = cpuid(0x80000000, 0, info)) >= 0x80000000)
-		m->ncpuinfoe = (eax & ~0x80000000) + 1;
-
-	return 1;
-}
-
-static int
-cpuidinfo(uint32_t eax, uint32_t ecx, uint32_t info[4])
-{
-	if(m->ncpuinfos == 0 && cpuidinit() == 0)
-		return 0;
-
-	if(!(eax & 0x80000000)){
-		if(eax >= m->ncpuinfos)
-			return 0;
-	}
-	else if(eax >= (0x80000000|m->ncpuinfoe))
-		return 0;
-
-	cpuid(eax, ecx, info);
-
-	return 1;
-}
-
-static int64_t
-cpuidhz(uint32_t info[2][4])
-{
-	int f, r;
-	int64_t hz;
-	uint64_t msr;
-
-	if(jehanne_memcmp(&info[0][1], "GenuntelineI", 12) == 0){
-		switch(info[1][0] & 0x0fff3ff0){
-		default:
-			return 0;
-		case 0x00000f30:		/* Xeon (MP), Pentium [4D] */
-		case 0x00000f40:		/* Xeon (MP), Pentium [4D] */
-		case 0x00000f60:		/* Xeon 7100, 5000 or above */
-			msr = rdmsr(0x2c);
-			r = (msr>>16) & 0x07;
-			switch(r){
-			default:
-				return 0;
-			case 0:
-				hz = 266666666666ll;
-				break;
-			case 1:
-				hz = 133333333333ll;
-				break;
-			case 2:
-				hz = 200000000000ll;
-				break;
-			case 3:
-				hz = 166666666666ll;
-				break;
-			case 4:
-				hz = 333333333333ll;
-				break;
-			}
-
-			/*
-			 * Hz is *1000 at this point.
-			 * Do the scaling then round it.
-			 * The manual is conflicting about
-			 * the size of the msr field.
-			 */
-			hz = (((hz*(msr>>24))/100)+5)/10;
-			break;
-		case 0x00000690:		/* Pentium M, Celeron M */
-		case 0x000006d0:		/* Pentium M, Celeron M */
-			hz = ((rdmsr(0x2a)>>22) & 0x1f)*100 * 1000000ll;
-			break;
-		case 0x000006e0:		/* Core Duo */
-		case 0x000006f0:		/* Core 2 Duo/Quad/Extreme */
-		case 0x00000660:		/* kvm over i5 */
-		case 0x00000670:		/* Core 2 Extreme */
-		case 0x00000650:		/* i5 6xx, i3 5xx */
-		case 0x000006c0:		/* i5 4xxx */
-		case 0x000006a0:		/* i7 paurea... */
-			/*
-			 * Get the FSB frequemcy.
-			 * If processor has Enhanced Intel Speedstep Technology
-			 * then non-integer bus frequency ratios are possible.
-			 */
-			if(info[1][2] & 0x00000080){
-				msr = rdmsr(0x198);
-				r = (msr>>40) & 0x1f;
-			}
-			else{
-				msr = 0;
-				r = rdmsr(0x2a) & 0x1f;
-			}
-			f = rdmsr(0xcd) & 0x07;
-			switch(f){
-			default:
-				return 0;
-			case 5:
-				hz = 100000000000ll;
-				break;
-			case 1:
-				hz = 133333333333ll;
-				break;
-			case 3:
-				hz = 166666666666ll;
-				break;
-			case 2:
-				hz = 200000000000ll;
-				break;
-			case 0:
-				hz = 266666666666ll;
-				break;
-			case 4:
-				hz = 333333333333ll;
-				break;
-			case 6:
-				hz = 400000000000ll;
-				break;
-			}
-
-			/*
-			 * Hz is *1000 at this point.
-			 * Do the scaling then round it.
-			 */
-			if(msr & 0x0000400000000000ll)
-				hz = hz*(r+10) + hz/2;
-			else
-				hz = hz*(r+10);
-			hz = ((hz/100)+5)/10;
-			break;
-		}
-		DBG("cpuidhz: 0x2a: %#llux hz %lld\n", rdmsr(0x2a), hz);
-	}
-	else if(jehanne_memcmp(&info[0][1], "AuthcAMDenti", 12) == 0){
-		switch(info[1][0] & 0x0fff0ff0){
-		default:
-			return 0;
-		case 0x00050ff0:		/* K8 Athlon Venice 64 / Qemu64 */
-		case 0x00020fc0:		/* K8 Athlon Lima 64 */
-		case 0x00000f50:		/* K8 Opteron 2xxx */
-			msr = rdmsr(0xc0010042);
-			r = (msr>>16) & 0x3f;
-			hz = 200000000ULL*(4 * 2 + r)/2;
-			break;
-		case 0x00100f60:		/* K8 Athlon II */
-		case 0x00100f40:		/* Phenom II X2 */
-		case 0x00100f20:		/* Phenom II X4 */
-		case 0x00100fa0:		/* Phenom II X6 */
-			msr = rdmsr(0xc0010042);
-			r = msr & 0x1f;
-			hz = ((r+0x10)*100000000ll)/(1<<(msr>>6 & 0x07));
-			break;
-		case 0x00100f90:		/* K10 Opteron 61xx */
-		case 0x00600f00:		/* K10 Opteron 62xx */
-		case 0x00600f10:		/* K10 Opteron 6272, FX 6xxx/4xxx */
-		case 0x00600f20:		/* K10 Opteron 63xx, FX 3xxx/8xxx/9xxx */
-			msr = rdmsr(0xc0010064);
-			r = msr & 0x1f;
-			hz = ((r+0x10)*100000000ll)/(1<<(msr>>6 & 0x07));
-			break;
-		case 0x00000620:		/* QEMU64 / Athlon MP/XP */
-			msr = rdmsr(0xc0010064);
-			r = (msr>>6) & 0x07;
-			hz = (((msr & 0x3f)+0x10)*100000000ll)/(1<<r);
-			break;
-		}
-		DBG("cpuidhz: %#llux hz %lld\n", msr, hz);
-	}
-	else
-		return 0;
-
-	return hz;
-}
-
-void
-cpuiddump(void)
-{
-	int i;
-	uint32_t info[4];
-
-	if(!DBGFLG)
-		return;
-
-	if(m->ncpuinfos == 0 && cpuidinit() == 0)
-		return;
-
-	for(i = 0; i < m->ncpuinfos; i++){
-		cpuid(i, 0, info);
-		DBG("eax = %#8.8ux: %8.8ux %8.8ux %8.8ux %8.8ux\n",
-			i, info[0], info[1], info[2], info[3]);
-	}
-	for(i = 0; i < m->ncpuinfoe; i++){
-		cpuid(0x80000000|i, 0, info);
-		DBG("eax = %#8.8ux: %8.8ux %8.8ux %8.8ux %8.8ux\n",
-			0x80000000|i, info[0], info[1], info[2], info[3]);
-	}
-}
-
-int64_t
-archhz(void)
-{
-	int64_t hz;
-	uint32_t info[2][4];
-
-	if(DBGFLG && m->machno == 0)
-		cpuiddump();
-	if(!cpuidinfo(0, 0, info[0]) || !cpuidinfo(1, 0, info[1]))
-		return 0;
-
-	hz = cpuidhz(info);
-	if(hz != 0)
-		return hz;
-	else if(m->machno != 0)
-		return sys->machptr[0]->cpuhz;
-
-	return i8254hz(info);
-}
-
-void
-archenable(void)
-{
-	// here used to be code to enable MONITOR/WAIT
-	// writing 0x1a0 MSR; however such register is
-	// supported on i386 only (MISC_ENABLE), not on x86_64.
-}
-
-int
-archmmu(void)
-{
-	uint32_t info[4];
-
-	/*
-	 * Should the check for m->machno != 0 be here
-	 * or in the caller (mmuinit)?
-	 *
-	 * To do here:
-	 * check and enable Pse;
-	 * Pge; Nxe.
-	 */
-
-	/*
-	 * How many page sizes are there?
-	 * Always have 4*KiB, but need to check
-	 * configured correctly.
-	 */
-	assert(PGSZ == 4*KiB);
-
-	m->pgszlg2[0] = 12;
-	m->pgszmask[0] = (1<<12)-1;
-	m->npgsz = 1;
-	if(m->ncpuinfos == 0 && cpuidinit() == 0)
-		return 1;
-
-	/*
-	 * Check the Pse bit in function 1 DX for 2*MiB support;
-	 * if false, only 4*KiB is available.
-	 */
-	if(!(m->cpuinfo[1][3] & 0x00000008))
-		return 1;
-	m->pgszlg2[1] = 21;
-	m->pgszmask[1] = (1<<21)-1;
-	m->npgsz = 2;
-
-	/*
-	 * Check the Page1GB bit in function 0x80000001 DX for 1*GiB support.
-	 */
-	if(cpuidinfo(0x80000001, 0, info) && (info[3] & 0x04000000)){
-		m->pgszlg2[2] = 30;
-		m->pgszmask[2] = (1<<30)-1;
-		m->npgsz = 3;
-	}
-
-	return m->npgsz;
-}
-
-static int
-fmtP(Fmt* f)
-{
-	uintmem pa;
-
-	pa = va_arg(f->args, uintmem);
-
-	if(f->flags & FmtSharp)
-		return jehanne_fmtprint(f, "%#16.16llux", pa);
-
-	return jehanne_fmtprint(f, "%llud", pa);
-}
-
-static int
-fmtL(Fmt* f)
-{
-	Mpl pl;
-
-	pl = va_arg(f->args, Mpl);
-
-	return jehanne_fmtprint(f, "%#16.16llux", pl);
-}
-
-static int
-fmtR(Fmt* f)
-{
-	uint64_t r;
-
-	r = va_arg(f->args, uint64_t);
-
-	return jehanne_fmtprint(f, "%#16.16llux", r);
-}
-
-/* virtual address fmt */
-static int
-fmtW(Fmt *f)
-{
-	uint64_t va;
-
-	va = va_arg(f->args, uint64_t);
-	return jehanne_fmtprint(f, "%#ullx=0x[%ullx][%ullx][%ullx][%ullx][%ullx]", va,
-		PTLX(va, 3), PTLX(va, 2), PTLX(va, 1), PTLX(va, 0),
-		va & ((1<<PGSHFT)-1));
-
-}
-
-void
-archfmtinstall(void)
-{
-	/*
-	 * Architecture-specific formatting. Not as neat as they
-	 * could be (e.g. there's no defined type for a 'register':
-	 *	L - Mpl, mach priority level
-	 *	P - uintmem, physical address
-	 *	R - register
-	 *      W - virtual address
-	 * With a little effort these routines could be written
-	 * in a fairly architecturally-independent manner, relying
-	 * on the compiler to optimise-away impossible conditions,
-	 * and/or by exploiting the innards of the fmt library.
-	 */
-	jehanne_fmtinstall('P', fmtP);
-	jehanne_fmtinstall('L', fmtL);
-	jehanne_fmtinstall('R', fmtR);
-	jehanne_fmtinstall('W', fmtW);
-}
-
-void
-archidle(void)
-{
-	halt();
-}
-
-void
-microdelay(int microsecs)
-{
-	uint64_t r, t;
-
-	r = rdtsc();
-	for(t = r + m->cpumhz*microsecs; r < t; r = rdtsc())
-		pause();
-}
-
-void
-millidelay(int millisecs)
-{
-	uint64_t r, t;
-
-	r = rdtsc();
-	for(t = r + m->cpumhz*1000ull*millisecs; r < t; r = rdtsc())
-		pause();
-}
-
-int
-isdmaok(void *a, usize len, int range)
-{
-	uintmem pa;
-
-	if(!iskaddr(a) || (char*)a < etext)
-		return 0;
-	pa = mmuphysaddr(PTR2UINT(a));
-	if(pa == 0 || pa == ~(uintmem)0)
-		return 0;
-	return range > 32 || pa+len <= 0xFFFFFFFFULL;
-}
diff --git a/sys/src/kern/amd64/archmp.c b/sys/src/kern/amd64/archmp.c
new file mode 100644
index 0000000..d0d576d
--- /dev/null
+++ b/sys/src/kern/amd64/archmp.c
@@ -0,0 +1,429 @@
+#include "u.h"
+#include "../port/lib.h"
+#include "mem.h"
+#include "dat.h"
+#include "fns.h"
+#include "io.h"
+
+#include "mp.h"
+
+static PCMP *pcmp;
+
+static char* buses[] = {
+	"CBUSI ",
+	"CBUSII",
+	"EISA  ",
+	"FUTURE",
+	"INTERN",
+	"ISA   ",
+	"MBI   ",
+	"MBII  ",
+	"MCA   ",
+	"MPI   ",
+	"MPSA  ",
+	"NUBUS ",
+	"PCI   ",
+	"PCMCIA",
+	"TC    ",
+	"VL    ",
+	"VME   ",
+	"XPRESS",
+	0,
+};
+
+static Bus*
+mpgetbus(int busno)
+{
+	Bus *bus;
+
+	for(bus = mpbus; bus; bus = bus->next)
+		if(bus->busno == busno)
+			return bus;
+
+	print("mpgetbus: can't find bus %d\n", busno);
+	return 0;
+}
+
+static Apic*
+mkprocessor(PCMPprocessor* p)
+{
+	static int machno = 1;
+	int apicno;
+	Apic *apic;
+
+	apicno = p->apicno;
+	if(!(p->flags & PcmpEN) || apicno > MaxAPICNO || mpapic[apicno] != nil)
+		return 0;
+
+	if((apic = xalloc(sizeof(Apic))) == nil)
+		panic("mkprocessor: no memory for Apic");
+	apic->type = PcmpPROCESSOR;
+	apic->apicno = apicno;
+	apic->flags = p->flags;
+	apic->lintr[0] = ApicIMASK;
+	apic->lintr[1] = ApicIMASK;
+	if(p->flags & PcmpBP)
+		apic->machno = 0;
+	else
+		apic->machno = machno++;
+	mpapic[apicno] = apic;
+
+	return apic;
+}
+
+static Bus*
+mkbus(PCMPbus* p)
+{
+	Bus *bus;
+	int i;
+
+	for(i = 0; buses[i]; i++)
+		if(strncmp(buses[i], p->string, sizeof(p->string)) == 0)
+			break;
+	if(buses[i] == 0)
+		return 0;
+
+	if((bus = xalloc(sizeof(Bus))) == nil)
+		panic("mkbus: no memory for Bus");
+	if(mpbus)
+		mpbuslast->next = bus;
+	else
+		mpbus = bus;
+	mpbuslast = bus;
+
+	bus->type = i;
+	bus->busno = p->busno;
+	if(bus->type == BusEISA){
+		bus->po = PcmpLOW;
+		bus->el = PcmpLEVEL;
+		if(mpeisabus != -1)
+			print("mkbus: more than one EISA bus\n");
+		mpeisabus = bus->busno;
+	}
+	else if(bus->type == BusPCI){
+		bus->po = PcmpLOW;
+		bus->el = PcmpLEVEL;
+	}
+	else if(bus->type == BusISA){
+		bus->po = PcmpHIGH;
+		bus->el = PcmpEDGE;
+		if(mpisabus != -1)
+			print("mkbus: more than one ISA bus\n");
+		mpisabus = bus->busno;
+	}
+	else{
+		bus->po = PcmpHIGH;
+		bus->el = PcmpEDGE;
+	}
+
+	return bus;
+}
+
+static Apic*
+mkioapic(PCMPioapic* p)
+{
+	void *va;
+	int apicno;
+	Apic *apic;
+
+	apicno = p->apicno;
+	if(!(p->flags & PcmpEN) || apicno > MaxAPICNO || mpioapic[apicno] != nil)
+		return 0;
+	/*
+	 * Map the I/O APIC.
+	 */
+	if((va = vmap(p->addr, 1024)) == nil)
+		return 0;
+	if((apic = xalloc(sizeof(Apic))) == nil)
+		panic("mkioapic: no memory for Apic");
+	apic->type = PcmpIOAPIC;
+	apic->apicno = apicno;
+	apic->addr = va;
+	apic->paddr = p->addr;
+	apic->flags = p->flags;
+	mpioapic[apicno] = apic;
+
+	return apic;
+}
+
+static Aintr*
+mkiointr(PCMPintr* p)
+{
+	Bus *bus;
+	Aintr *aintr;
+	PCMPintr* pcmpintr;
+
+	/*
+	 * According to the MultiProcessor Specification, a destination
+	 * I/O APIC of 0xFF means the signal is routed to all I/O APICs.
+	 * It's unclear how that can possibly be correct so treat it as
+	 * an error for now.
+	 */
+	if(p->apicno > MaxAPICNO || mpioapic[p->apicno] == nil)
+		return 0;
+
+	if((bus = mpgetbus(p->busno)) == 0)
+		return 0;
+
+	if((aintr = xalloc(sizeof(Aintr))) == nil)
+		panic("mkiointr: no memory for Aintr");
+	aintr->intr = p;
+
+	if(0)
+		print("mkiointr: type %d intr type %d flags %#o "
+			"bus %d irq %d apicno %d intin %d\n",
+			p->type, p->intr, p->flags,
+			p->busno, p->irq, p->apicno, p->intin);
+	/*
+	 * Hack for Intel SR1520ML motherboard, which BIOS describes
+	 * the i82575 dual ethernet controllers incorrectly.
+	 */
+	if(memcmp(pcmp->product, "INTEL   X38MLST     ", 20) == 0){
+		if(p->busno == 1 && p->intin == 16 && p->irq == 1){
+			if((pcmpintr = xalloc(sizeof(PCMPintr))) == nil)
+				panic("iointr: no memory for PCMPintr");
+			memmove(pcmpintr, p, sizeof(PCMPintr));
+			print("mkiointr: %20.20s bus %d intin %d irq %d\n",
+				(char*)pcmp->product,
+				pcmpintr->busno, pcmpintr->intin,
+				pcmpintr->irq);
+			pcmpintr->intin = 17;
+			aintr->intr = pcmpintr;
+		}
+	}
+	aintr->apic = mpioapic[p->apicno];
+	aintr->next = bus->aintr;
+	bus->aintr = aintr;
+
+	return aintr;
+}
+
+static int
+mklintr(PCMPintr* p)
+{
+	Apic *apic;
+	Bus *bus;
+	int i, intin, v;
+
+	/*
+	 * The offsets of vectors for LINT[01] are known to be
+	 * 0 and 1 from the local APIC vector space at VectorLAPIC.
+	 */
+	if((bus = mpgetbus(p->busno)) == 0)
+		return 0;
+	intin = p->intin;
+
+	/*
+	 * Pentium Pros have problems if LINT[01] are set to ExtINT
+	 * so just bag it, SMP mode shouldn't need ExtINT anyway.
+	 */
+	if(p->intr == PcmpExtINT || p->intr == PcmpNMI)
+		v = ApicIMASK;
+	else
+		v = mpintrinit(bus, p, VectorLAPIC+intin, p->irq);
+
+	if(p->apicno == 0xFF){
+		for(i=0; i<=MaxAPICNO; i++){
+			if((apic = mpapic[i]) == nil)
+				continue;
+			if(apic->flags & PcmpEN)
+				apic->lintr[intin] = v;
+		}
+	}
+	else{
+		if(apic = mpapic[p->apicno])
+			if(apic->flags & PcmpEN)
+				apic->lintr[intin] = v;
+	}
+
+	return v;
+}
+
+static void
+dumpmp(uint8_t *p, uint8_t *e)
+{
+	int i;
+
+	for(i = 0; p < e; p++) {
+		if((i % 16) == 0) print("*mp%d=", i/16);
+		print("%.2x ", *p);
+		if((++i % 16) == 0) print("\n");
+	}
+	if((i % 16) != 0) print("\n");
+}
+
+
+static void
+mpoverride(uint8_t** newp, uint8_t** e)
+{
+	int size, i, j;
+	char buf[20];
+	uint8_t* p;
+	char* s;
+
+	size = strtol(getconf("*mp"), 0, 0);
+	if(size <= 0) panic("mpoverride: invalid size in *mp");
+	*newp = p = xalloc(size);
+	if(p == nil) panic("mpoverride: can't allocate memory");
+	*e = p + size;
+	for(i = 0; ; i++){
+		snprint(buf, sizeof buf, "*mp%d", i);
+		s = getconf(buf);
+		if(s == nil) break;
+		while(*s){
+			j = strtol(s, &s, 16);
+			if(*s && *s != ' ' || j < 0 || j > 0xff) panic("mpoverride: invalid entry in %s", buf);
+			if(p >= *e) panic("mpoverride: overflow in %s", buf);
+			*p++ = j;
+		}
+	}
+	if(p != *e) panic("mpoverride: size doesn't match");
+}
+
+static void
+pcmpinit(void)
+{
+	uint8_t *p, *e;
+	Apic *apic;
+	void *va;
+
+	/*
+	 * Map the local APIC.
+	 */
+	va = vmap(pcmp->lapicbase, 1024);
+
+	print("LAPIC: %.8lux %#p\n", pcmp->lapicbase, va);
+	if(va == nil)
+		panic("pcmpinit: cannot map lapic %.8lux", pcmp->lapicbase);
+
+	p = ((uint8_t*)pcmp)+PCMPsz;
+	e = ((uint8_t*)pcmp)+pcmp->length;
+	if(getconf("*dumpmp") != nil)
+		dumpmp(p, e);
+	if(getconf("*mp") != nil)
+		mpoverride(&p, &e);
+
+	/*
+	 * Run through the table saving information needed for starting
+	 * application processors and initialising any I/O APICs. The table
+	 * is guaranteed to be in order such that only one pass is necessary.
+	 */
+	while(p < e) switch(*p){
+	default:
+		print("pcmpinit: unknown PCMP type 0x%uX (e-p 0x%zuX)\n",
+			*p, e-p);
+		while(p < e){
+			print("%uX ", *p);
+			p++;
+		}
+		break;
+
+	case PcmpPROCESSOR:
+		if(apic = mkprocessor((PCMPprocessor*)p)){
+			apic->addr = va;
+			apic->paddr = pcmp->lapicbase;
+		}
+		p += PCMPprocessorsz;
+		continue;
+
+	case PcmpBUS:
+		mkbus((PCMPbus*)p);
+		p += PCMPbussz;
+		continue;
+
+	case PcmpIOAPIC:
+		if(apic = mkioapic((PCMPioapic*)p))
+			ioapicinit(apic, apic->apicno);
+		p += PCMPioapicsz;
+		continue;
+
+	case PcmpIOINTR:
+		mkiointr((PCMPintr*)p);
+		p += PCMPintrsz;
+		continue;
+
+	case PcmpLINTR:
+		mklintr((PCMPintr*)p);
+		p += PCMPintrsz;
+		continue;
+	}
+
+	/*
+	 * Ininitalize local APIC and start application processors.
+	 */
+	mpinit();
+}
+
+static void
+mpreset(void)
+{
+	/* stop application processors */
+	mpshutdown();
+
+	/* do generic reset */
+	archreset();
+}
+
+static int identify(void);
+
+PCArch archmp = {
+.id=		"_MP_",
+.ident=		identify,
+.reset=		mpreset,
+.intrinit=	pcmpinit,
+.intrenable=	mpintrenable,
+.intron=	lapicintron,
+.introff=	lapicintroff,
+.fastclock=	i8253read,
+.timerset=	lapictimerset,
+};
+
+static int
+identify(void)
+{
+	char *cp;
+	_MP_ *_mp_;
+	uint32_t len;
+
+	if((cp = getconf("*nomp")) != nil && strcmp(cp, "0") != 0)
+		return 1;
+
+	/*
+	 * Search for an MP configuration table. For now,
+	 * don't accept the default configurations (physaddr == 0).
+	 * Check for correct signature, calculate the checksum and,
+	 * if correct, check the version.
+	 * To do: check extended table checksum.
+	 */
+	if((_mp_ = sigsearch("_MP_")) == nil || checksum(_mp_, _MP_sz) != 0 || _mp_->physaddr == 0)
+		return 1;
+
+	len = PCMPsz;
+	if(_mp_->physaddr < MemMin)
+		pcmp = KADDR(_mp_->physaddr);
+	else if((pcmp = vmap(_mp_->physaddr, len)) == nil)
+		return 1;
+	if(pcmp->length < len
+	|| memcmp(pcmp, "PCMP", 4) != 0
+	|| (pcmp->version != 1 && pcmp->version != 4)){
+Bad:
+		if((uintptr)pcmp < KZERO)
+			vunmap(pcmp, len);
+		pcmp = nil;
+		return 1;
+	}
+	len = pcmp->length;
+	if((uintptr)pcmp < KZERO)
+		vunmap(pcmp, PCMPsz);
+	if(_mp_->physaddr < MemMin)
+		pcmp = KADDR(_mp_->physaddr);
+	else if((pcmp = vmap(_mp_->physaddr, len)) == nil)
+		return 1;
+	if(checksum(pcmp, len) != 0)
+		goto Bad;
+
+	if(m->havetsc && getconf("*notsc") == nil)
+		archmp.fastclock = tscticks;
+
+	return 0;
+}
diff --git a/sys/src/kern/386/bios32.c b/sys/src/kern/amd64/bios32.c
similarity index 100%
rename from sys/src/kern/386/bios32.c
rename to sys/src/kern/amd64/bios32.c
diff --git a/sys/src/kern/amd64/build.json b/sys/src/kern/amd64/build.json
index 2e9dd6e..3072e0b 100644
--- a/sys/src/kern/amd64/build.json
+++ b/sys/src/kern/amd64/build.json
@@ -6,7 +6,6 @@
 		"Include": [
 			"core.json",
 			"devdraw.json",
-			"../386/include.json",
 			"../ip/include.json",
 			"../port/include.json"
 		],
@@ -18,7 +17,6 @@
 					"int printallsyscalls;"
 				],
 				"Dev": [
-					"acpi",
 					"arch",
 					"bridge",
 					"cap",
@@ -29,6 +27,7 @@
 					"ether",
 					"ip",
 					"kprof",
+					"kbd",
 					"ninep",
 					"pci",
 					"pipe",
@@ -87,7 +86,6 @@
 			"autogenerated.c",
 			"sdata.c",
 			"cga.c",
-			"devacpi.c",
 			"usbehcipc.c",
 			"usbohci.c",
 			"usbuhci.c"
diff --git a/sys/src/kern/amd64/cga.c b/sys/src/kern/amd64/cga.c
index c314726..2345ce6 100644
--- a/sys/src/kern/amd64/cga.c
+++ b/sys/src/kern/amd64/cga.c
@@ -179,7 +179,7 @@ cgaprinthex(uintptr_t x)
 	cgaputc('\n');
 }
 
-void
+static void
 cgaconsputs(char* s, int n)
 {
 	ilock(&cgalock);
@@ -235,7 +235,7 @@ cgawrite(Chan* c, void *vbuf, long len, int64_t off)
 }
 
 void
-cgainit(void)
+screen_init(void)
 {
 	ilock(&cgalock);
 
@@ -245,5 +245,6 @@ cgainit(void)
 	cgablinkoff();
 	cgainitdone = 1;
 	iunlock(&cgalock);
+	screenputs = cgaconsputs;
 	addarchfile("cgamem", 0666, cgaread, cgawrite);
 }
diff --git a/sys/src/kern/amd64/core.json b/sys/src/kern/amd64/core.json
index 4a2c764..015b109 100644
--- a/sys/src/kern/amd64/core.json
+++ b/sys/src/kern/amd64/core.json
@@ -62,7 +62,24 @@
 			"inith.json"
 		],
 		"SourceFiles": [
+			"bios32.c",
+			"devether.c",
+			"devrtc.c",
+			"devkbd.c",
+			"ether8139.c",
+			"ether8169.c",
+			"ether82557.c",
+			"ether82563.c",
+			"etherigbe.c",
+			"ethermii.c",
+			"etherm10g.c",
+			"pci.c",
+			"sdiahci.c",
+			"sdscsi.c",
+			"uarti8250.c",
+			"uartpci.c",
 			"entry.S",
+			"ec.c",
 			"l64v.S",
 			"l64fpu.S",
 			"cpuidamd64.S",
@@ -70,26 +87,24 @@
 			"l64vsyscall.S",
 			"acpi.c",
 			"arch.c",
-			"archamd64.c",
+			"archmp.c",
 			"devarch.c",
 			"fpu.c",
 			"hpet.c",
-			"i8254.c",
+			"i8253.c",
 			"i8259.c",
-			"ioapic.c",
 			"lapic.c",
 			"main.c",
-			"map.c",
 			"memory.c",
 			"mmu.c",
 			"mp.c",
 			"msi.c",
+			"mtrr.c",
 			"multiboot.c",
-			"sipi.c",
+			"squidboy.c",
 			"syscall.c",
 			"systab.c",
-			"trap.c",
-			"vsvm.c"
+			"trap.c"
 		]
 	}
 }
diff --git a/sys/src/kern/amd64/cpuidamd64.S b/sys/src/kern/amd64/cpuidamd64.S
index eacf6e8..6d6a879 100644
--- a/sys/src/kern/amd64/cpuidamd64.S
+++ b/sys/src/kern/amd64/cpuidamd64.S
@@ -3,25 +3,18 @@
  */
 .globl cpuid
 cpuid:
-	pushq %rbx
-	pushq %rcx
-	pushq %rdx
-	movq	%rdi, %rax
-	movq	%rsi, %rcx
-	pushq	%r15
-	movq	%rdx, %r15
-
-	cpuid 	/* Argument in %rax */
-
-	// Plan 9 just moves them as a,b,c,d. Weird.
-	movl	%eax, 0(%r15)
-	movl	%ebx, 4(%r15)
-	movl	%ecx, 8(%r15)
-	movl	%edx, 12(%r15)
-	popq	%r15
+	pushq	%rbx
+	pushq	%rcx
+	pushq	%rdx
+	movl	%edi, %eax
+	cpuid
+	movl	%eax, 0(%rsi)
+	movl	%ebx, 4(%rsi)
+	movl	%ecx, 8(%rsi)
+	movl	%edx, 12(%rsi)
 	popq	%rdx
 	popq	%rcx
-	pop	%rbx
+	popq	%rbx
 	ret
 
 /*
diff --git a/sys/src/kern/amd64/createSIPIHeader.sh b/sys/src/kern/amd64/createSIPIHeader.sh
index cd4ec54..ecf54ea 100755
--- a/sys/src/kern/amd64/createSIPIHeader.sh
+++ b/sys/src/kern/amd64/createSIPIHeader.sh
@@ -8,11 +8,11 @@ fi
 
 cd $JEHANNE/sys/src/kern/amd64
 
-gcc -c -O0 -static -fplan9-extensions -mno-red-zone -ffreestanding -fno-builtin -mcmodel=kernel l64sipi.S
-ld -Ttext 0x00003000 -e 0x00003000 l64sipi.o -o l64sipi
-objcopy -O binary -j .text l64sipi l64sipi.out
+x86_64-jehanne-gcc -c -O0 -static -fplan9-extensions -mno-red-zone -ffreestanding -fno-builtin -mcmodel=kernel l64sipi.S
+x86_64-jehanne-ld -Ttext 0x00003000 -e 0x00003000 l64sipi.o -o l64sipi
+x86_64-jehanne-objcopy -O binary -j .text l64sipi l64sipi.out
 
 echo 'uint8_t sipihandler[]={' > sipi.h
 cat l64sipi.out | hexdump -v -e '7/1 "0x%02x, " 1/1 " 0x%02x,\n"' | sed '$s/0x  ,/0x00,/g'>> sipi.h
 echo '};' >> sipi.h
-rm l64sipi.out
+#rm l64sipi.out
diff --git a/sys/src/kern/amd64/dat.h b/sys/src/kern/amd64/dat.h
index a8bb4f4..4e7701c 100644
--- a/sys/src/kern/amd64/dat.h
+++ b/sys/src/kern/amd64/dat.h
@@ -1,7 +1,7 @@
 /*
  * This file is part of Jehanne.
  *
- * Copyright (C) 2015-2016 Giacomo Tesio <giacomo@tesio.it>
+ * Copyright (C) 2015-2017 Giacomo Tesio <giacomo@tesio.it>
  *
  * Jehanne is free software: you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -17,6 +17,7 @@
  */
 typedef struct BIOS32si	BIOS32si;
 typedef struct BIOS32ci	BIOS32ci;
+typedef struct Confmem Confmem;
 typedef struct Fxsave Fxsave;
 typedef struct IOConf IOConf;
 typedef struct ISAConf ISAConf;
@@ -25,27 +26,35 @@ typedef struct Lock Lock;
 typedef struct LockEntry LockEntry;
 typedef struct MCPU MCPU;
 typedef struct MFPU MFPU;
+typedef struct MMU MMU;
 typedef struct MMMU MMMU;
 typedef struct Mach Mach;
 typedef uint64_t Mpl;
 typedef Mpl Mreg;				/* GAK */
-typedef struct Ptpage Ptpage;
+typedef struct Segdesc Segdesc;
 typedef struct Pcidev Pcidev;
 typedef struct PFPU PFPU;
 typedef struct PMMU PMMU;
 typedef struct PNOTIFY PNOTIFY;
 typedef struct PPAGE PPAGE;
 typedef uint64_t PTE;
+typedef struct RMap RMap;
 typedef struct Proc Proc;
 typedef struct Sys Sys;
 typedef uint64_t uintmem;			/* horrible name */
+typedef long Tval;
 typedef struct Ureg Ureg;
 typedef struct Vctl Vctl;
+typedef struct PCArch PCArch;
+typedef union  FPsave	FPsave;
+typedef struct Fxsave	Fxsave;
+typedef struct FPstate	FPstate;
+typedef struct PCMmap	PCMmap;
 
 #pragma incomplete BIOS32si
 #pragma incomplete Ureg
 
-#define MAXSYSARG	5	/* for mount(fd, afd, mpt, flag, arg) */
+#define MAXSYSARG	6	/* for mount(fd, afd, mpt, flag, arg, dc) */
 
 /*
  *  parameters for sysproc.c
@@ -58,10 +67,16 @@ typedef struct Vctl Vctl;
  */
 struct Lock
 {
-	LockEntry*	head;
-	LockEntry*	e;
+	uint64_t	sr;
+	uintptr_t	pc;
+	Proc		*lp;
+	Mach		*lm;
+	uint32_t	key;
+	uint16_t	isilock;
+	long		lockcycles;
 };
 
+
 struct Label
 {
 	uintptr_t	sp;
@@ -69,6 +84,24 @@ struct Label
 	uintptr_t	regs[14];
 };
 
+/*
+ * FPsave.status
+ */
+enum
+{
+	/* this is a state */
+	FPinit=		0,
+	FPactive=	1,
+	FPinactive=	2,
+
+	/* the following is a bit that can be or'd into the state */
+	FPillegal=	0x100,
+};
+
+/*
+ * the FP regs must be stored here, not somewhere pointed to from here.
+ * port code assumes this.
+ */
 struct Fxsave {
 	uint16_t	fcw;		/* x87 control word */
 	uint16_t	fsw;		/* x87 status word */
@@ -84,40 +117,41 @@ struct Fxsave {
 	uint8_t		ign[96];	/* reserved, ignored */
 };
 
-/*
- *  FPU stuff in Proc
- */
-struct PFPU {
-	int		fpustate;
-	uint8_t		fxsave[sizeof(Fxsave)+15];
-	void*		fpusave;
+union FPsave {
+	uint8_t align[512+15];
+	Fxsave;
 };
 
-struct Ptpage
+struct Segdesc
 {
-	PTE*		pte;		/* kernel-addressible page table entries */
-	uintmem		pa;		/* physical address (from physalloc) */
-	Ptpage*		next;		/* next in level's set, or free list */
-	Ptpage*		parent;		/* parent page table page or page directory */
-	uint32_t	ptoff;		/* index of this table's entry in parent */
+	uint32_t	d0;
+	uint32_t	d1;
+};
+
+/*
+ *  MMU structure for PDP, PD, PT pages.
+ */
+struct MMU
+{
+	MMU*		next;
+	uintptr_t*	page;
+	int		index;
+	int		level;
 };
 
 /*
  *  MMU stuff in Proc
  */
+#define NCOLOR 1
 struct PMMU
 {
-	Ptpage*		mmuptp[4];	/* page table pages for each level */
-	Ptpage*		ptpfree;
-	int		nptpbusy;
-};
-
-/*
- * MMU stuff in Page
- */
-struct PPAGE
-{
-	uint8_t*	nothing;
+	MMU*		mmuhead;
+	MMU*		mmutail;
+	MMU*		kmaphead;
+	MMU*		kmaptail;
+	unsigned long	kmapcount;
+	unsigned long	kmapindex;
+	unsigned long	mmucount;
 };
 
 /*
@@ -138,8 +172,6 @@ struct IOConf
 };
 extern IOConf ioconf;
 
-#define MAXMDOM	8	/* maximum memory/cpu domains */
-
 #include "../port/portdat.h"
 
 /*
@@ -164,24 +196,26 @@ struct MFPU {
 /*
  *  MMU stuff in Mach.
  */
-enum
-{
-	NPGSZ = 4
-};
+typedef struct {
+	uint32_t	_0_;
+	uint32_t	rsp0[2];
+	uint32_t	rsp1[2];
+	uint32_t	rsp2[2];
+	uint32_t	_28_[2];
+	uint32_t	ist[14];
+	uint16_t	_92_[5];
+	uint16_t	iomap;
+} Tss;
 
 struct MMMU
 {
-	Ptpage*		pml4;			/* pml4 for this processor */
-	PTE*		pmap;			/* unused as of yet */
-	Ptpage*		ptpfree;		/* per-mach free list */
-	int		nptpfree;
+	uint64_t*	pml4;		/* pml4 base for this processor (va) */
+	Tss*		tss;		/* tss for this processor */
+	Segdesc*	gdt;		/* gdt for this processor */
 
-	uint32_t	pgszlg2[NPGSZ];		/* per Mach or per Sys? */
-	uintmem		pgszmask[NPGSZ];
-	uint32_t	pgsz[NPGSZ];
-	int		npgsz;
-
-	Ptpage		pml4kludge;
+	uint64_t	mmumap[4];	/* bitmap of pml4 entries for zapping */
+	MMU*		mmufree;	/* freelist for MMU structures */
+	unsigned long	mmucount;	/* number of MMU structures in freelist */
 };
 
 /*
@@ -212,8 +246,6 @@ struct Mach
 
 	uintptr_t	stack;
 	uint8_t*	vsvm;
-	void*		gdt;
-	void*		tss;
 
 	uint64_t	ticks;		/* of the clock since boot time */
 	Label		sched;		/* scheduler wakeup */
@@ -241,18 +273,36 @@ struct Mach
 
 	int		lastintr;
 
+	int		loopconst;
+
 	Lock		apictimerlock;
 	uint64_t	cyclefreq;	/* Frequency of user readable cycle counter */
-	int64_t		cpuhz;
+	uint64_t	cpuhz;
 	int		cpumhz;
+	int		cpuidax;
+	int		cpuidcx;
+	int		cpuiddx;
+	char		cpuidid[16];
+	char*		cpuidtype;
+	int		havetsc;
+	int		havepge;
+	uint64_t	tscticks;
 	uint64_t	rdtsc;
 
-	LockEntry	locks[8];
+//	LockEntry	locks[8];
 
 	MFPU	FPU;
 	MCPU;
 };
 
+struct Confmem
+{
+	uintptr_t	base;
+	unsigned long	npage;
+	uintptr_t	kbase;
+	uintptr_t	klimit;
+};
+
 /*
  * This is the low memory map, between 0x100000 and 0x110000.
  * It is located there to allow fundamental datastructures to be
@@ -265,62 +315,102 @@ struct Mach
  * Some of the elements must be aligned on page boundaries, hence
  * the unions.
  */
-struct Sys {
-	uint8_t	machstk[MACHSTKSZ];
+struct Sys
+{
+	Ureg*		boot_regs;
+	unsigned int	nmach;		/* processors */
+	unsigned int	nproc;		/* processes */
+	unsigned int	monitor;	/* has monitor? */
+	unsigned int	npages;		/* total physical pages of memory */
+	unsigned int	upages;		/* user page pool */
+	unsigned int	nimage;		/* number of images */
+	Confmem		mem[16];	/* physical memory */
 
-	PTE	pml4[PTSZ/sizeof(PTE)];	/*  */
-	PTE	pdp[PTSZ/sizeof(PTE)];
-	PTE	pd[PTSZ/sizeof(PTE)];
-	PTE	pt[PTSZ/sizeof(PTE)];
+	unsigned int	copymode;	/* 0 is copy on write, 1 is copy on reference */
+	unsigned int	ialloc;		/* max interrupt time allocation in bytes */
+	unsigned int	pipeqsize;	/* size in bytes of pipe queues */
+	int		nuart;		/* number of uart devices */
 
-	uint8_t	vsvmpage[4*KiB];
+	char*		architecture;
+	uint64_t	ticks;
+	Mach*		machptr[MACHMAX];
 
-	union {
-		Mach	mach;
-		uint8_t	machpage[MACHSZ];
-	};
-
-	union {
-		struct {
-			uint64_t	pmstart;	/* physical memory */
-			uint64_t	pmoccupied;	/* how much is occupied */
-			uint64_t	pmunassigned;	/* how much to keep back  from page pool */
-			uint64_t	pmpaged;	/* how much assigned to page pool */
-
-			uintptr_t	vmstart;	/* base address for malloc */
-			uintptr_t	vmunused;	/* 1st unused va */
-			uintptr_t	vmunmapped;	/* 1st unmapped va in KSEG0 */
-
-			uint64_t	epoch;		/* crude time synchronisation */
-			int		nmach;		/* how many machs */
-			int		nonline;	/* how many machs are online */
-			uint64_t	ticks;		/* since boot (type?) */
-			uint32_t	copymode;	/* 0=copy on write; 1=copy on reference */
-		};
-		uint8_t	syspage[4*KiB];
-	};
-
-	union {
-		Mach*	machptr[MACHMAX];
-		uint8_t	ptrpage[4*KiB];
-	};
-
-	uint8_t	_57344_[2][4*KiB];		/* unused */
+	uint64_t	pmstart;	/* physical memory */
+	uint64_t	pmoccupied;	/* how much is occupied */
+	uint64_t	pmunassigned;	/* how much to keep back  from page pool */
+	uint64_t	pmpaged;	/* how much assigned to page pool */
 };
 
 extern Sys* sys;
+extern uint32_t	MemMin;		/* set by entry.S */
 
 /*
  * KMap
  */
 typedef void KMap;
 
-#define kunmap(k)
 #define VA(k)		(void*)(k)
 
+/*
+ *  routines for things outside the PC model, like power management
+ */
+struct PCArch
+{
+	char*		id;
+	int		(*ident)(void);		/* this should be in the model */
+	void		(*reset)(void);		/* this should be in the model */
+	int		(*serialpower)(int);	/* 1 == on, 0 == off */
+	int		(*modempower)(int);	/* 1 == on, 0 == off */
+
+	void		(*intrinit)(void);
+	int		(*intrenable)(Vctl*);
+	int		(*intrvecno)(int);
+	int		(*intrdisable)(int);
+	void		(*introff)(void);
+	void		(*intron)(void);
+
+	void		(*clockenable)(void);
+	uint64_t	(*fastclock)(uint64_t*);
+	void		(*timerset)(uint64_t);
+};
+
+extern PCArch	*arch;			/* PC architecture */
+
+/* cpuid instruction result register bits */
+enum {
+	/* cx */
+	Monitor	= 1<<3,
+
+	/* dx */
+	Fpuonchip = 1<<0,
+	Vmex	= 1<<1,		/* virtual-mode extensions */
+	Pse	= 1<<3,		/* page size extensions */
+	Tsc	= 1<<4,		/* time-stamp counter */
+	Cpumsr	= 1<<5,		/* model-specific registers, rdmsr/wrmsr */
+	Pae	= 1<<6,		/* physical-addr extensions */
+	Mce	= 1<<7,		/* machine-check exception */
+	Cmpxchg8b = 1<<8,
+	Cpuapic	= 1<<9,
+	Mtrr	= 1<<12,	/* memory-type range regs.  */
+	Pge	= 1<<13,	/* page global extension */
+	Mca	= 1<<14,	/* machine-check architecture */
+	Pat	= 1<<16,	/* page attribute table */
+	Pse2	= 1<<17,	/* more page size extensions */
+	Clflush = 1<<19,
+	Acpif	= 1<<22,	/* therm control msr */
+	Mmx	= 1<<23,
+	Fxsr	= 1<<24,	/* have SSE FXSAVE/FXRSTOR */
+	Sse	= 1<<25,	/* thus sfence instr. */
+	Sse2	= 1<<26,	/* thus mfence & lfence instr.s */
+	Rdrnd	= 1<<30,	/* RDRAND support bit */
+};
+
+/* Informations about active processors for
+ * bootstrap and shutdown.
+ */
 struct
 {
-	Lock;
+	char	machs[MACHMAX];		/* bitmap of active CPUs */
 	int	exiting;		/* shutdown */
 	int	ispanic;		/* shutdown in response to a panic */
 	int	thunderbirdsarego;	/* F.A.B. */
@@ -354,6 +444,8 @@ typedef struct BIOS32ci {		/* BIOS32 Calling Interface */
 	uint32_t	edi;
 } BIOS32ci;
 
+#define	MACHP(n)	(sys->machptr[n])
+
 /*
  * The Mach structures must be available via the per-processor
  * MMU information array machptr, mainly for disambiguation and access to
diff --git a/sys/src/kern/amd64/devarch.c b/sys/src/kern/amd64/devarch.c
index 79b16d4..3c92c43 100644
--- a/sys/src/kern/amd64/devarch.c
+++ b/sys/src/kern/amd64/devarch.c
@@ -3,9 +3,9 @@
 #include "mem.h"
 #include "dat.h"
 #include "fns.h"
-#include "../port/error.h"
-
+#include "io.h"
 #include "ureg.h"
+#include "../port/error.h"
 
 typedef struct IOMap IOMap;
 struct IOMap
@@ -20,11 +20,11 @@ struct IOMap
 static struct
 {
 	Lock;
-	IOMap	*map;
+	IOMap	*m;
 	IOMap	*free;
-	IOMap	maps[32];		// some initial free maps
+	IOMap	maps[32];	/* some initial free maps */
 
-	QLock	ql;			// lock for reading map
+	QLock	ql;		/* lock for reading map */
 } iomap;
 
 enum {
@@ -39,6 +39,18 @@ enum {
 	Qmax = 32,
 };
 
+enum {
+	CR4Osfxsr = 1 << 9,
+	CR4Oxmmex = 1 << 10,
+};
+
+enum {				/* cpuid standard function codes */
+	Highstdfunc = 0,	/* also returns vendor string */
+	Procsig,
+	Proctlbcache,
+	Procserial,
+};
+
 typedef long Rdwrfn(Chan*, void*, long, int64_t);
 
 static Rdwrfn *readfn[Qmax];
@@ -54,6 +66,8 @@ static Dirtab archdir[Qmax] = {
 };
 Lock archwlock;	/* the lock is only for changing archdir */
 int narchdir = Qbase;
+int (*_pcmspecial)(char*, ISAConf*);
+void (*_pcmspecialclose)(int);
 
 /*
  * Add a file to the #P listing.  Once added, you can't delete it.
@@ -68,19 +82,19 @@ addarchfile(char *name, int perm, Rdwrfn *rdfn, Rdwrfn *wrfn)
 	Dirtab d;
 	Dirtab *dp;
 
-	jehanne_memset(&d, 0, sizeof d);
-	jehanne_strcpy(d.name, name);
+	memset(&d, 0, sizeof d);
+	strcpy(d.name, name);
 	d.perm = perm;
 
 	lock(&archwlock);
 	if(narchdir >= Qmax){
 		unlock(&archwlock);
-		jehanne_print("addarchfile: out of entries for %s\n", name);
+		print("addarchfile: out of entries for %s\n", name);
 		return nil;
 	}
 
 	for(i=0; i<narchdir; i++)
-		if(jehanne_strcmp(archdir[i].name, name) == 0){
+		if(strcmp(archdir[i].name, name) == 0){
 			unlock(&archwlock);
 			return nil;
 		}
@@ -107,10 +121,11 @@ ioinit(void)
 	iomap.free = iomap.maps;
 
 	/*
-	 * Someone needs to explain why this was here...
+	 * This is necessary to make the IBM X20 boot.
+	 * Have not tracked down the reason.
+	 * i82557 is at 0x1000, the dummy entry is needed for swappable devs.
 	 */
-	ioalloc(0x0fff, 1, 0, "dummy");	// i82557 is at 0x1000, the dummy
-					// entry is needed for swappable devs.
+	ioalloc(0x0fff, 1, 0, "dummy");
 
 	if ((excluded = getconf("ioexclude")) != nil) {
 		char *s;
@@ -120,14 +135,14 @@ ioinit(void)
 			char *ends;
 			int io_s, io_e;
 
-			io_s = (int)jehanne_strtol(s, &ends, 0);
+			io_s = (int)strtol(s, &ends, 0);
 			if (ends == nil || ends == s || *ends != '-') {
-				jehanne_print("ioinit: cannot parse option string\n");
+				print("ioinit: cannot parse option string\n");
 				break;
 			}
 			s = ++ends;
 
-			io_e = (int)jehanne_strtol(s, &ends, 0);
+			io_e = (int)strtol(s, &ends, 0);
 			if (ends && *ends == ',')
 				*ends++ = '\0';
 			s = ends;
@@ -144,49 +159,48 @@ ioinit(void)
  * as pcmcia and cardbus cards.
  */
 int
-ioreserve(int _1, int size, int align, char *tag)
+ioreserve(int _, int size, int align, char *tag)
 {
-	IOMap *map, **l;
+	IOMap *m, **l;
 	int i, port;
 
 	lock(&iomap);
-	// find a free port above 0x400 and below 0x1000
+	/* find a free port above 0x400 and below 0x1000 */
 	port = 0x400;
-	for(l = &iomap.map; *l; l = &(*l)->next){
-		map = *l;
-		if (map->start < 0x400)
-			continue;
-		i = map->start - port;
+	for(l = &iomap.m; *l; l = &(*l)->next){
+		m = *l;
+		if (m->start < 0x400) continue;
+		i = m->start - port;
 		if(i > size)
 			break;
 		if(align > 0)
 			port = ((port+align-1)/align)*align;
 		else
-			port = map->end;
+			port = m->end;
 	}
 	if(*l == nil){
 		unlock(&iomap);
 		return -1;
 	}
-	map = iomap.free;
-	if(map == nil){
-		jehanne_print("ioalloc: out of maps");
+	m = iomap.free;
+	if(m == nil){
+		print("ioalloc: out of maps");
 		unlock(&iomap);
 		return port;
 	}
-	iomap.free = map->next;
-	map->next = *l;
-	map->start = port;
-	map->end = port + size;
-	map->reserved = 1;
-	jehanne_strncpy(map->tag, tag, sizeof(map->tag));
-	map->tag[sizeof(map->tag)-1] = 0;
-	*l = map;
+	iomap.free = m->next;
+	m->next = *l;
+	m->start = port;
+	m->end = port + size;
+	m->reserved = 1;
+	strncpy(m->tag, tag, sizeof(m->tag)-1);
+	m->tag[sizeof(m->tag)-1] = 0;
+	*l = m;
 
 	archdir[0].qid.vers++;
 
 	unlock(&iomap);
-	return map->start;
+	return m->start;
 }
 
 /*
@@ -196,86 +210,82 @@ ioreserve(int _1, int size, int align, char *tag)
 int
 ioalloc(int port, int size, int align, char *tag)
 {
-	IOMap *map, **l;
+	IOMap *m, **l;
 	int i;
 
 	lock(&iomap);
 	if(port < 0){
-		// find a free port above 0x400 and below 0x1000
+		/* find a free port above 0x400 and below 0x1000 */
 		port = 0x400;
-		for(l = &iomap.map; *l; l = &(*l)->next){
-			map = *l;
-			if (map->start < 0x400)
-				continue;
-			i = map->start - port;
+		for(l = &iomap.m; (m = *l) != nil; l = &m->next){
+			if (m->start < 0x400) continue;
+			i = m->start - port;
 			if(i > size)
 				break;
 			if(align > 0)
 				port = ((port+align-1)/align)*align;
 			else
-				port = map->end;
+				port = m->end;
 		}
-		if(*l == nil){
+		if(m == nil){
 			unlock(&iomap);
 			return -1;
 		}
 	} else {
-		// Only 64KB I/O space on the x86.
+		/* Only 64KB I/O space on the x86. */
 		if((port+size) > 0x10000){
 			unlock(&iomap);
 			return -1;
 		}
-		// see if the space clashes with previously allocated ports
-		for(l = &iomap.map; *l; l = &(*l)->next){
-			map = *l;
-			if(map->end <= port)
+		/* see if the space clashes with previously allocated ports */
+		for(l = &iomap.m; (m = *l) != nil; l = &m->next){
+			if(m->end <= port)
 				continue;
-			if(map->reserved && map->start == port && map->end == port + size) {
-				map->reserved = 0;
+			if(m->reserved && m->start == port && m->end >= port + size) {
+				m->reserved = 0;
 				unlock(&iomap);
-				return map->start;
+				return m->start;
 			}
-			if(map->start >= port+size)
+			if(m->start >= port+size)
 				break;
 			unlock(&iomap);
 			return -1;
 		}
 	}
-	map = iomap.free;
-	if(map == nil){
-		jehanne_print("ioalloc: out of maps");
+	m = iomap.free;
+	if(m == nil){
+		print("ioalloc: out of maps");
 		unlock(&iomap);
 		return port;
 	}
-	iomap.free = map->next;
-	map->next = *l;
-	map->start = port;
-	map->end = port + size;
-	jehanne_strncpy(map->tag, tag, sizeof(map->tag));
-	map->tag[sizeof(map->tag)-1] = 0;
-	*l = map;
+	iomap.free = m->next;
+	m->next = *l;
+	m->start = port;
+	m->end = port + size;
+	strncpy(m->tag, tag, sizeof(m->tag)-1);
+	m->tag[sizeof(m->tag)-1] = 0;
+	*l = m;
 
 	archdir[0].qid.vers++;
 
 	unlock(&iomap);
-	return map->start;
+	return m->start;
 }
 
 void
 iofree(int port)
 {
-	IOMap *map, **l;
+	IOMap *m, **l;
 
 	lock(&iomap);
-	for(l = &iomap.map; *l; l = &(*l)->next){
-		if((*l)->start == port){
-			map = *l;
-			*l = map->next;
-			map->next = iomap.free;
-			iomap.free = map;
+	for(l = &iomap.m; (m = *l) != nil; l = &m->next){
+		if(m->start == port){
+			*l = m->next;
+			m->next = iomap.free;
+			iomap.free = m;
 			break;
 		}
-		if((*l)->start > port)
+		if(m->start > port)
 			break;
 	}
 	archdir[0].qid.vers++;
@@ -285,11 +295,11 @@ iofree(int port)
 int
 iounused(int start, int end)
 {
-	IOMap *map;
+	IOMap *m;
 
-	for(map = iomap.map; map; map = map->next){
-		if(start >= map->start && start < map->end
-		|| start <= map->start && end > map->start)
+	for(m = iomap.m; m != nil; m = m->next){
+		if(start >= m->start && start < m->end
+		|| start <= m->start && end > m->start)
 			return 0;
 	}
 	return 1;
@@ -334,28 +344,22 @@ archopen(Chan* c, unsigned long omode)
 }
 
 static void
-archclose(Chan* _1)
+archclose(Chan* _)
 {
 }
 
-enum
-{
-	Linelen= 31,
-};
-
 static long
 archread(Chan *c, void *a, long n, int64_t offset)
 {
-	char *buf, *p;
-	int port;
+	char buf[32], *p;
+	int port, i;
 	uint16_t *sp;
 	uint32_t *lp;
-	int64_t *vp;
-	IOMap *map;
+	long *vp;
+	IOMap *m;
 	Rdwrfn *fn;
 
 	switch((uint32_t)c->qid.path){
-
 	case Qdir:
 		return devdirread(c, a, n, archdir, narchdir, devgen);
 
@@ -389,40 +393,34 @@ archread(Chan *c, void *a, long n, int64_t offset)
 			error(Ebadarg);
 		vp = a;
 		for(port = offset; port < offset+n; port += 8)
-			*vp++ = rdmsr(port);
+			if(rdmsr(port, vp++) < 0)
+				error(Ebadarg);
 		return n;
 
 	case Qioalloc:
-		break;
+		lock(&iomap);
+		i = 0;
+		for(m = iomap.m; m != nil; m = m->next){
+			i = snprint(buf, sizeof(buf), "%8lux %8lux %-12.12s\n", m->start, m->end-1, m->tag);
+			offset -= i;
+			if(offset < 0)
+				break;
+		}
+		unlock(&iomap);
+		if(offset >= 0)
+			return 0;
+		if(n > -offset)
+			n = -offset;
+		offset += i;
+		memmove(a, buf+offset, n);
+		return n;
 
 	default:
 		if(c->qid.path < narchdir && (fn = readfn[c->qid.path]))
 			return fn(c, a, n, offset);
 		error(Eperm);
-		break;
+		return 0;
 	}
-
-	if((buf = jehanne_malloc(n)) == nil)
-		error(Enomem);
-	p = buf;
-	n = n/Linelen;
-	offset = offset/Linelen;
-
-	lock(&iomap);
-	for(map = iomap.map; n > 0 && map != nil; map = map->next){
-		if(offset-- > 0)
-			continue;
-		jehanne_sprint(p, "%#8lux %#8lux %-12.12s\n", map->start, map->end-1, map->tag);
-		p += Linelen;
-		n--;
-	}
-	unlock(&iomap);
-
-	n = p - buf;
-	jehanne_memmove(a, buf, n);
-	jehanne_free(buf);
-
-	return n;
 }
 
 static long
@@ -432,11 +430,10 @@ archwrite(Chan *c, void *a, long n, int64_t offset)
 	int port;
 	uint16_t *sp;
 	uint32_t *lp;
-	int64_t *vp;
+	long *vp;
 	Rdwrfn *fn;
 
 	switch((uint32_t)c->qid.path){
-
 	case Qiob:
 		p = a;
 		checkport(offset, offset+n);
@@ -467,11 +464,12 @@ archwrite(Chan *c, void *a, long n, int64_t offset)
 			error(Ebadarg);
 		vp = a;
 		for(port = offset; port < offset+n; port += 8)
-			wrmsr(port, *vp++);
+			if(wrmsr(port, *vp++) < 0)
+				error(Ebadarg);
 		return n;
 
 	default:
-		if(c->qid.path < narchdir && (fn = writefn[c->qid.path]))
+		if(c->qid.path < narchdir && (fn = writefn[c->qid.path]) != nil)
 			return fn(c, a, n, offset);
 		error(Eperm);
 		break;
@@ -501,126 +499,677 @@ Dev archdevtab = {
 };
 
 /*
+ *  the following is a generic version of the
+ *  architecture specific stuff
  */
-void
+
+static int
+unimplemented(int _)
+{
+	return 0;
+}
+
+static void
 nop(void)
 {
 }
 
-void (*coherence)(void) = mfence;
-
-static long
-cputyperead(Chan* _1, void *a, long n, int64_t off)
-{
-	char str[32];
-
-	jehanne_snprint(str, sizeof(str), "%s %ud\n", "AMD64", m->cpumhz);
-	return readstr(off, a, n, str);
-}
-
-static long
-numcoresread(Chan* c, void *a, long n, int64_t off)
-{
-	char buf[8];
-	jehanne_snprint(buf, 8, "%d\n", sys->nmach);
-	return readstr(off, a, n, buf);
-}
-
-void
-archinit(void)
-{
-	addarchfile("cputype", 0444, cputyperead, nil);
-	addarchfile("numcores", 0444, numcoresread, nil);
-}
-
 void
 archreset(void)
 {
-	int i;
-
-	/*
-	 * BUG: virtualbox does not reset with the code after this call,
-	 * but this makes the kernel reset correctly everywhere.
-	 */
-	i8042systemreset();
+//	i8042reset();
 
 	/*
+	 * Often the BIOS hangs during restart if a conventional 8042
+	 * warm-boot sequence is tried. The following is Intel specific and
+	 * seems to perform a cold-boot, but at least it comes back.
 	 * And sometimes there is no keyboard...
 	 *
 	 * The reset register (0xcf9) is usually in one of the bridge
 	 * chips. The actual location and sequence could be extracted from
 	 * ACPI but why bother, this is the end of the line anyway.
-	jehanne_print("Takes a licking and keeps on ticking...\n");
 	 */
+	print("Takes a licking and keeps on ticking...\n");
 	*(uint16_t*)KADDR(0x472) = 0x1234;	/* BIOS warm-boot flag */
-	i = inb(0xcf9);					/* ICHx reset control */
-	i &= 0x06;
-	outb(0xcf9, i|0x02);				/* SYS_RST */
-	millidelay(1);
-	outb(0xcf9, i|0x06);				/* RST_CPU transition */
+	outb(0xcf9, 0x02);
+	outb(0xcf9, 0x06);
 
+	print("can't reset\n");
 	for(;;)
-		pause();
+		idle();
 }
 
 /*
- *  return value and speed of timer
+ * On a uniprocessor, you'd think that coherence could be nop,
+ * but it can't.  We still need a barrier when using coherence() in
+ * device drivers.
+ *
+ * On VMware, it's safe (and a huge win) to set this to nop.
+ * Aux/vmware does this via the #P/archctl file.
+ */
+void (*coherence)(void) = nop;
+
+PCArch* arch;
+
+extern PCArch archacpi;
+extern PCArch archmp;
+static PCArch* knownarch[] = {
+	&archacpi,
+	&archmp,
+	nil
+};
+
+PCArch archgeneric = {
+.id=		"generic",
+.ident=		0,
+.reset=		archreset,
+.serialpower=	unimplemented,
+.modempower=	unimplemented,
+
+.intrinit=	i8259init,
+.intrenable=	i8259enable,
+.intrvecno=	i8259vecno,
+.intrdisable=	i8259disable,
+.intron=	i8259on,
+.introff=	i8259off,
+
+.clockenable=	i8253enable,
+.fastclock=	i8253read,
+.timerset=	i8253timerset,
+};
+
+typedef struct X86type X86type;
+struct X86type {
+	int	family;
+	int	model;
+	int	aalcycles;
+	char*	name;
+};
+
+static X86type x86intel[] =
+{
+	{ 4,	0,	22,	"486DX", },	/* known chips */
+	{ 4,	1,	22,	"486DX50", },
+	{ 4,	2,	22,	"486SX", },
+	{ 4,	3,	22,	"486DX2", },
+	{ 4,	4,	22,	"486SL", },
+	{ 4,	5,	22,	"486SX2", },
+	{ 4,	7,	22,	"DX2WB", },	/* P24D */
+	{ 4,	8,	22,	"DX4", },	/* P24C */
+	{ 4,	9,	22,	"DX4WB", },	/* P24CT */
+	{ 5,	0,	23,	"P5", },
+	{ 5,	1,	23,	"P5", },
+	{ 5,	2,	23,	"P54C", },
+	{ 5,	3,	23,	"P24T", },
+	{ 5,	4,	23,	"P55C MMX", },
+	{ 5,	7,	23,	"P54C VRT", },
+	{ 6,	1,	16,	"PentiumPro", },/* trial and error */
+	{ 6,	3,	16,	"PentiumII", },
+	{ 6,	5,	16,	"PentiumII/Xeon", },
+	{ 6,	6,	16,	"Celeron", },
+	{ 6,	7,	16,	"PentiumIII/Xeon", },
+	{ 6,	8,	16,	"PentiumIII/Xeon", },
+	{ 6,	0xB,	16,	"PentiumIII/Xeon", },
+	{ 6,	0xF,	16,	"Xeon5000-series", },
+	{ 6,	0x16,	16,	"Celeron", },
+	{ 6,	0x17,	16,	"Core 2/Xeon", },
+	{ 6,	0x1A,	16,	"Core i7/Xeon", },
+	{ 6,	0x1C,	16,	"Atom", },
+	{ 6,	0x1D,	16,	"Xeon MP", },
+	{ 0xF,	1,	16,	"P4", },	/* P4 */
+	{ 0xF,	2,	16,	"PentiumIV/Xeon", },
+	{ 0xF,	6,	16,	"PentiumIV/Xeon", },
+
+	{ 3,	-1,	32,	"386", },	/* family defaults */
+	{ 4,	-1,	22,	"486", },
+	{ 5,	-1,	23,	"P5", },
+	{ 6,	-1,	16,	"P6", },
+	{ 0xF,	-1,	16,	"P4", },	/* P4 */
+
+	{ -1,	-1,	16,	"unknown", },	/* total default */
+};
+
+/*
+ * The AMD processors all implement the CPUID instruction.
+ * The later ones also return the processor name via functions
+ * 0x80000002, 0x80000003 and 0x80000004 in registers AX, BX, CX
+ * and DX:
+ *	K5	"AMD-K5(tm) Processor"
+ *	K6	"AMD-K6tm w/ multimedia extensions"
+ *	K6 3D	"AMD-K6(tm) 3D processor"
+ *	K6 3D+	?
+ */
+static X86type x86amd[] =
+{
+	{ 5,	0,	23,	"AMD-K5", },	/* guesswork */
+	{ 5,	1,	23,	"AMD-K5", },	/* guesswork */
+	{ 5,	2,	23,	"AMD-K5", },	/* guesswork */
+	{ 5,	3,	23,	"AMD-K5", },	/* guesswork */
+	{ 5,	4,	23,	"AMD Geode GX1", },	/* guesswork */
+	{ 5,	5,	23,	"AMD Geode GX2", },	/* guesswork */
+	{ 5,	6,	11,	"AMD-K6", },	/* trial and error */
+	{ 5,	7,	11,	"AMD-K6", },	/* trial and error */
+	{ 5,	8,	11,	"AMD-K6-2", },	/* trial and error */
+	{ 5,	9,	11,	"AMD-K6-III", },/* trial and error */
+	{ 5,	0xa,	23,	"AMD Geode LX", },	/* guesswork */
+
+	{ 6,	1,	11,	"AMD-Athlon", },/* trial and error */
+	{ 6,	2,	11,	"AMD-Athlon", },/* trial and error */
+
+	{ 0x1F,	9,	11,	"AMD-K10 Opteron G34", },/* guesswork */
+
+	{ 4,	-1,	22,	"Am486", },	/* guesswork */
+	{ 5,	-1,	23,	"AMD-K5/K6", },	/* guesswork */
+	{ 6,	-1,	11,	"AMD-Athlon", },/* guesswork */
+	{ 0xF,	-1,	11,	"AMD-K8", },	/* guesswork */
+	{ 0x1F,	-1,	11,	"AMD-K10", },	/* guesswork */
+
+	{ -1,	-1,	11,	"unknown", },	/* total default */
+};
+
+/*
+ * WinChip 240MHz
+ */
+static X86type x86winchip[] =
+{
+	{5,	4,	23,	"Winchip",},	/* guesswork */
+	{6,	7,	23,	"Via C3 Samuel 2 or Ezra",},
+	{6,	8,	23,	"Via C3 Ezra-T",},
+	{6,	9,	23,	"Via C3 Eden-N",},
+	{ -1,	-1,	23,	"unknown", },	/* total default */
+};
+
+/*
+ * SiS 55x
+ */
+static X86type x86sis[] =
+{
+	{5,	0,	23,	"SiS 55x",},	/* guesswork */
+	{ -1,	-1,	23,	"unknown", },	/* total default */
+};
+
+static X86type *cputype;
+
+static void	simplecycles(uint64_t*);
+void	(*cycles)(uint64_t*) = simplecycles;
+
+static void
+_cycles(uint64_t*t)
+{
+	*t = rdtsc();
+}
+
+static void
+simplecycles(uint64_t*x)
+{
+	*x = m->ticks;
+}
+
+void
+cpuidprint(void)
+{
+	print("cpu%d: %dMHz %s %s (AX %8.8uX CX %8.8uX DX %8.8uX)\n",
+		m->machno, m->cpumhz, m->cpuidid, m->cpuidtype,
+		m->cpuidax, m->cpuidcx, m->cpuiddx);
+}
+
+/*
+ *  figure out:
+ *	- cpu type
+ *	- whether or not we have a TSC (cycle counter)
+ *	- whether or not it supports page size extensions
+ *		(if so turn it on)
+ *	- whether or not it supports machine check exceptions
+ *		(if so turn it on)
+ *	- whether or not it supports the page global flag
+ *		(if so turn it on)
+ */
+int
+cpuidentify(void)
+{
+	char *p;
+	int family, model, nomce;
+	X86type *t, *tab;
+	uintptr_t cr4;
+	uint32_t regs[4];
+	long mca, mct;
+
+	cpuid(Highstdfunc, regs);
+	memmove(m->cpuidid,   &regs[1], BY2WD);	/* bx */
+	memmove(m->cpuidid+4, &regs[3], BY2WD);	/* dx */
+	memmove(m->cpuidid+8, &regs[2], BY2WD);	/* cx */
+	m->cpuidid[12] = '\0';
+
+	cpuid(Procsig, regs);
+	m->cpuidax = regs[0];
+	m->cpuidcx = regs[2];
+	m->cpuiddx = regs[3];
+
+	if(strncmp(m->cpuidid, "AuthenticAMD", 12) == 0 ||
+	   strncmp(m->cpuidid, "Geode by NSC", 12) == 0)
+		tab = x86amd;
+	else if(strncmp(m->cpuidid, "CentaurHauls", 12) == 0)
+		tab = x86winchip;
+	else if(strncmp(m->cpuidid, "SiS SiS SiS ", 12) == 0)
+		tab = x86sis;
+	else
+		tab = x86intel;
+
+	family = X86FAMILY(m->cpuidax);
+	model = X86MODEL(m->cpuidax);
+	for(t=tab; t->name; t++)
+		if((t->family == family && t->model == model)
+		|| (t->family == family && t->model == -1)
+		|| (t->family == -1))
+			break;
+
+	m->cpuidtype = t->name;
+
+	/*
+	 *  if there is one, set tsc to a known value
+	 */
+	if(m->cpuiddx & Tsc){
+		m->havetsc = 1;
+		cycles = _cycles;
+		if(m->cpuiddx & Cpumsr)
+			wrmsr(0x10, 0);
+	}
+
+	/*
+	 *  use i8253 to guess our cpu speed
+	 */
+	guesscpuhz(t->aalcycles);
+
+	/*
+	 * If machine check exception, page size extensions or page global bit
+	 * are supported enable them in CR4 and clear any other set extensions.
+	 * If machine check was enabled clear out any lingering status.
+	 */
+	if(m->cpuiddx & (Pge|Mce|Pse)){
+		cr4 = cr4get();
+		if(m->cpuiddx & Pse)
+			cr4 |= 0x10;		/* page size extensions */
+		if(p = getconf("*nomce"))
+			nomce = strtoul(p, 0, 0);
+		else
+			nomce = 0;
+		if((m->cpuiddx & Mce) != 0 && !nomce){
+			if((m->cpuiddx & Mca) != 0){
+				long cap;
+				int bank;
+
+				cap = 0;
+				rdmsr(0x179, &cap);
+
+				if(cap & 0x100)
+					wrmsr(0x17B, ~0ULL);	/* enable all mca features */
+
+				bank = cap & 0xFF;
+				if(bank > 64)
+					bank = 64;
+
+				/* init MCi .. MC1 (except MC0) */
+				while(--bank > 0){
+					wrmsr(0x400 + bank*4, ~0ULL);
+					wrmsr(0x401 + bank*4, 0);
+				}
+
+				if(family != 6 || model >= 0x1A)
+					wrmsr(0x400, ~0ULL);
+
+				wrmsr(0x401, 0);
+			}
+			else if(family == 5){
+				rdmsr(0x00, &mca);
+				rdmsr(0x01, &mct);
+			}
+			cr4 |= 0x40;		/* machine check enable */
+		}
+
+		/*
+		 * Detect whether the chip supports the global bit
+		 * in page directory and page table entries.  When set
+		 * in a particular entry, it means ``don't bother removing
+		 * this from the TLB when CR3 changes.''
+		 *
+		 * We flag all kernel pages with this bit.  Doing so lessens the
+		 * overhead of switching processes on bare hardware,
+		 * even more so on VMware.  See mmu.c:/^memglobal.
+		 *
+		 * For future reference, should we ever need to do a
+		 * full TLB flush, it can be accomplished by clearing
+		 * the PGE bit in CR4, writing to CR3, and then
+		 * restoring the PGE bit.
+		 */
+		if(m->cpuiddx & Pge){
+			cr4 |= 0x80;		/* page global enable bit */
+			m->havepge = 1;
+		}
+
+		cr4put(cr4);
+
+		if((m->cpuiddx & (Mca|Mce)) == Mce)
+			rdmsr(0x01, &mct);
+	}
+
+	if(m->cpuiddx & Mtrr)
+		mtrrsync();
+
+	if((m->cpuiddx & (Sse|Fxsr)) == (Sse|Fxsr)){			/* have sse fp? */
+		fpsave = fpssesave;
+		fprestore = fpsserestore;
+		cr4put(cr4get() | CR4Osfxsr|CR4Oxmmex);
+	} else {
+		panic("AMD64 without Sse and Fxsr");
+	}
+
+	if(strcmp(m->cpuidid, "GenuineIntel") == 0 && (m->cpuidcx & Rdrnd) != 0)
+		hwrandbuf = rdrandbuf;
+	else
+		hwrandbuf = nil;
+
+	cputype = t;
+	return t->family;
+}
+
+static long
+cputyperead(Chan* _, void *a, long n, int64_t offset)
+{
+	char str[32];
+	uint32_t mhz;
+
+	mhz = (m->cpuhz+999999)/1000000;
+
+	snprint(str, sizeof(str), "%s %lud\n", cputype->name, mhz);
+	return readstr(offset, a, n, str);
+}
+
+static long
+archctlread(Chan* _, void *a, long nn, int64_t offset)
+{
+	int n;
+	char *buf, *p, *ep;
+
+	p = buf = smalloc(READSTR);
+	ep = p + READSTR;
+	p = seprint(p, ep, "cpu %s %lud%s\n",
+		cputype->name, (uint32_t)(m->cpuhz+999999)/1000000,
+		m->havepge ? " pge" : "");
+	p = seprint(p, ep, "pge %s\n", cr4get()&0x80 ? "on" : "off");
+	p = seprint(p, ep, "coherence ");
+	if(coherence == mfence)
+		p = seprint(p, ep, "mfence\n");
+	else if(coherence == nop)
+		p = seprint(p, ep, "nop\n");
+	else
+		p = seprint(p, ep, "0x%p\n", coherence);
+	p = seprint(p, ep, "arch %s\n", arch->id);
+	n = p - buf;
+	n += mtrrprint(p, ep - p);
+	buf[n] = '\0';
+
+	n = readstr(offset, a, nn, buf);
+	free(buf);
+	return n;
+}
+
+enum
+{
+	CMpge,
+	CMcoherence,
+	CMcache,
+};
+
+static Cmdtab archctlmsg[] =
+{
+	CMpge,		"pge",		2,
+	CMcoherence,	"coherence",	2,
+	CMcache,	"cache",	4,
+};
+
+static long
+archctlwrite(Chan* _, void *a, long n, int64_t __)
+{
+	uint64_t base, size;
+	Cmdbuf *cb;
+	Cmdtab *ct;
+	char *ep;
+
+	cb = parsecmd(a, n);
+	if(waserror()){
+		free(cb);
+		nexterror();
+	}
+	ct = lookupcmd(cb, archctlmsg, nelem(archctlmsg));
+	switch(ct->index){
+	case CMpge:
+		if(!m->havepge)
+			error("processor does not support pge");
+		if(strcmp(cb->f[1], "on") == 0)
+			cr4put(cr4get() | 0x80);
+		else if(strcmp(cb->f[1], "off") == 0)
+			cr4put(cr4get() & ~0x80);
+		else
+			cmderror(cb, "invalid pge ctl");
+		break;
+	case CMcoherence:
+		if(strcmp(cb->f[1], "mfence") == 0){
+			if((m->cpuiddx & Sse2) == 0)
+				error("invalid coherence ctl on this cpu family");
+			coherence = mfence;
+		}else if(strcmp(cb->f[1], "nop") == 0){
+			/* only safe on vmware */
+			if(sys->nmach > 1)
+				error("cannot disable coherence on a multiprocessor");
+			coherence = nop;
+		}else
+			cmderror(cb, "invalid coherence ctl");
+		break;
+	case CMcache:
+		base = strtoull(cb->f[1], &ep, 0);
+		if(*ep)
+			error("cache: parse error: base not a number?");
+		size = strtoull(cb->f[2], &ep, 0);
+		if(*ep)
+			error("cache: parse error: size not a number?");
+		ep = mtrr(base, size, cb->f[3]);
+		if(ep != nil)
+			error(ep);
+		break;
+	}
+	free(cb);
+	poperror();
+	return n;
+}
+
+static int32_t
+rmemrw(int isr, void *a, int32_t n, long off)
+{
+	uintptr_t addr = off;
+
+	if(off < 0 || n < 0)
+		error("bad offset/count");
+	if(isr){
+		if(addr >= MB)
+			return 0;
+		if(addr+n > MB)
+			n = MB - addr;
+		memmove(a, KADDR(addr), n);
+	}else{
+		/* allow vga framebuf's write access */
+		if(addr >= MB || addr+n > MB ||
+		    (addr < 0xA0000 || addr+n > 0xB0000+0x10000))
+			error("bad offset/count in write");
+		memmove(KADDR(addr), a, n);
+	}
+	return n;
+}
+
+static long
+rmemread(Chan* _, void *a, long n, int64_t off)
+{
+	return rmemrw(1, a, n, off);
+}
+
+static long
+rmemwrite(Chan* _, void *a, long n, int64_t off)
+{
+	return rmemrw(0, a, n, off);
+}
+
+void
+archinit(void)
+{
+	PCArch **p;
+
+	arch = &archgeneric;
+	for(p = knownarch; *p != nil; p++){
+		if((*p)->ident != nil && (*p)->ident() == 0){
+			arch = *p;
+			break;
+		}
+	}
+	if(arch != &archgeneric){
+		if(arch->id == nil)
+			arch->id = archgeneric.id;
+		if(arch->reset == nil)
+			arch->reset = archgeneric.reset;
+		if(arch->serialpower == nil)
+			arch->serialpower = archgeneric.serialpower;
+		if(arch->modempower == nil)
+			arch->modempower = archgeneric.modempower;
+		if(arch->intrinit == nil)
+			arch->intrinit = archgeneric.intrinit;
+		if(arch->intrenable == nil)
+			arch->intrenable = archgeneric.intrenable;
+	}
+
+	/*
+	 *  Decide whether to use copy-on-reference (386 and mp).
+	 *  We get another chance to set it in mpinit() for a
+	 *  multiprocessor.
+	 */
+	if(X86FAMILY(m->cpuidax) == 3)
+		sys->copymode = 1;
+
+	if(m->cpuiddx & Sse2)
+		coherence = mfence;
+
+	addarchfile("cputype", 0444, cputyperead, nil);
+	addarchfile("archctl", 0664, archctlread, archctlwrite);
+	addarchfile("realmodemem", 0660, rmemread, rmemwrite);
+}
+
+/*
+ *  call either the pcmcia or pccard device setup
+ */
+int
+pcmspecial(char *idstr, ISAConf *isa)
+{
+	return (_pcmspecial != nil)? _pcmspecial(idstr, isa): -1;
+}
+
+/*
+ *  call either the pcmcia or pccard device teardown
+ */
+void
+pcmspecialclose(int a)
+{
+	if (_pcmspecialclose != nil)
+		_pcmspecialclose(a);
+}
+
+/*
+ *  return value and speed of timer set in arch->clockenable
  */
 uint64_t
-fastticks(uint64_t* hz)
+fastticks(uint64_t *hz)
 {
-	if(hz != nil)
-		*hz = m->cpuhz;
-	return rdtsc();
+	return (*arch->fastclock)(hz);
 }
 
 uint32_t
 microseconds(void)
 {
-	return fastticks2us(rdtsc());
+	return fastticks2us((*arch->fastclock)(nil));
 }
 
 /*
  *  set next timer interrupt
  */
 void
-timerset(uint64_t x)
+timerset(Tval x)
 {
-	extern void lapictimerset(uint64_t);
-
-	lapictimerset(x);
+	(*arch->timerset)(x);
 }
-
-void
-cycles(uint64_t* t)
-{
-	*t = rdtsc();
-}
-
-void
-delay(int millisecs)
-{
-	uint64_t r, t;
-
-	if(millisecs <= 0)
-		millisecs = 1;
-	r = rdtsc();
-	for(t = r + m->cpumhz*1000ull*millisecs; r < t; r = rdtsc())
-		;
-}
-
 /*
- *  performance measurement ticks.  must be low overhead.
- *  doesn't have to count over a second.
- */
-uint64_t
-perfticks(void)
+int
+isaconfig(char *class, int ctlrno, ISAConf *isa)
 {
-	uint64_t x;
+	char cc[32], *p;
+	int i;
 
-//	if(m->havetsc)
-		cycles(&x);
-//	else
-//		x = 0;
-	return x;
+	snprint(cc, sizeof cc, "%s%d", class, ctlrno);
+	p = getconf(cc);
+	if(p == nil)
+		return 0;
+
+	isa->type = "";
+	isa->nopt = tokenize(p, isa->opt, NISAOPT);
+	for(i = 0; i < isa->nopt; i++){
+		p = isa->opt[i];
+		if(cistrncmp(p, "type=", 5) == 0)
+			isa->type = p + 5;
+		else if(cistrncmp(p, "port=", 5) == 0)
+			isa->port = strtoul(p+5, &p, 0);
+		else if(cistrncmp(p, "irq=", 4) == 0)
+			isa->irq = strtoul(p+4, &p, 0);
+		else if(cistrncmp(p, "dma=", 4) == 0)
+			isa->dma = strtoul(p+4, &p, 0);
+		else if(cistrncmp(p, "mem=", 4) == 0)
+			isa->mem = strtoul(p+4, &p, 0);
+		else if(cistrncmp(p, "size=", 5) == 0)
+			isa->size = strtoul(p+5, &p, 0);
+		else if(cistrncmp(p, "freq=", 5) == 0)
+			isa->freq = strtoul(p+5, &p, 0);
+	}
+	return 1;
+}
+*/
+void
+dumpmcregs(void)
+{
+	long v, w;
+	int bank;
+
+	if((m->cpuiddx & (Mce|Cpumsr)) != (Mce|Cpumsr))
+		return;
+	if((m->cpuiddx & Mca) == 0){
+		rdmsr(0x00, &v);
+		rdmsr(0x01, &w);
+		iprint("MCA %8.8llux MCT %8.8llux\n", v, w);
+		return;
+	}
+	rdmsr(0x179, &v);
+	rdmsr(0x17A, &w);
+	iprint("MCG CAP %.16llux STATUS %.16llux\n", v, w);
+
+	bank = v & 0xFF;
+	if(bank > 64)
+		bank = 64;
+	while(--bank >= 0){
+		rdmsr(0x401 + bank*4, &v);
+		if((v & (1ull << 63)) == 0)
+			continue;
+		iprint("MC%d STATUS %.16llux", bank, v);
+		if(v & (1ull << 58)){
+			rdmsr(0x402 + bank*4, &w);
+			iprint(" ADDR %.16llux", w);
+		}
+		if(v & (1ull << 59)){
+			rdmsr(0x403 + bank*4, &w);
+			iprint(" MISC %.16llux", w);
+		}
+		iprint("\n");
+	}
 }
diff --git a/sys/src/kern/amd64/devdraw.json b/sys/src/kern/amd64/devdraw.json
index 7780ab5..88d68ce 100644
--- a/sys/src/kern/amd64/devdraw.json
+++ b/sys/src/kern/amd64/devdraw.json
@@ -14,7 +14,8 @@
 		"SourceFiles": [
 			"../port/devdraw.c",
 			"../port/devmouse.c",
-			"../386/vgavesa.c",
+			"../port/swcursor.c",
+			"vgavesa.c",
 			"screen.c",
 			"devvga.c",
 			"mouse.c",
diff --git a/sys/src/kern/386/devether.c b/sys/src/kern/amd64/devether.c
similarity index 99%
rename from sys/src/kern/386/devether.c
rename to sys/src/kern/amd64/devether.c
index 3b5b6ac..63d9591 100644
--- a/sys/src/kern/386/devether.c
+++ b/sys/src/kern/amd64/devether.c
@@ -503,8 +503,6 @@ ethershutdown(void)
 		ether = etherxx[i];
 		if(ether == nil)
 			continue;
-		if(ether->irq >= 0)
-			intrdisable(ether->vector);
 		if(ether->shutdown == nil) {
 			jehanne_print("#l%d: no shutdown function\n", i);
 			continue;
diff --git a/sys/src/kern/amd64/devkbd.c b/sys/src/kern/amd64/devkbd.c
new file mode 100644
index 0000000..63480ee
--- /dev/null
+++ b/sys/src/kern/amd64/devkbd.c
@@ -0,0 +1,447 @@
+/*
+ * keyboard input
+ */
+#include	"u.h"
+#include	"../port/lib.h"
+#include	"mem.h"
+#include	"dat.h"
+#include	"fns.h"
+#include	"io.h"
+#include	"../port/error.h"
+
+enum {
+	Data=		0x60,		/* data port */
+
+	Status=		0x64,		/* status port */
+	 Inready=	0x01,		/*  input character ready */
+	 Outbusy=	0x02,		/*  output busy */
+	 Sysflag=	0x04,		/*  system flag */
+	 Cmddata=	0x08,		/*  cmd==0, data==1 */
+	 Inhibit=	0x10,		/*  keyboard/mouse inhibited */
+	 Minready=	0x20,		/*  mouse character ready */
+	 Rtimeout=	0x40,		/*  general timeout */
+	 Parity=	0x80,
+
+	Cmd=		0x64,		/* command port (write only) */
+};
+
+enum
+{
+	/* controller command byte */
+	Cscs1=		(1<<6),		/* scan code set 1 */
+	Cauxdis=	(1<<5),		/* mouse disable */
+	Ckbddis=	(1<<4),		/* kbd disable */
+	Csf=		(1<<2),		/* system flag */
+	Cauxint=	(1<<1),		/* mouse interrupt enable */
+	Ckbdint=	(1<<0),		/* kbd interrupt enable */
+};
+
+enum {
+	Qdir,
+	Qscancode,
+	Qleds,
+};
+
+static Dirtab kbdtab[] = {
+	".",		{Qdir, 0, QTDIR},	0,	0555,
+	"scancode",	{Qscancode, 0},		0,	0440,
+	"leds",		{Qleds, 0},		0,	0220,
+};
+
+static Lock i8042lock;
+static uint8_t ccc;
+static void (*auxputc)(int, int);
+static int nokbd = 1;			/* flag: no PS/2 keyboard */
+
+static struct {
+	Ref ref;
+	Queue *q;
+} kbd;
+
+/*
+ *  wait for output no longer busy
+ */
+static int
+outready(void)
+{
+	int tries;
+
+	for(tries = 0; (inb(Status) & Outbusy); tries++){
+		if(tries > 500)
+			return -1;
+		delay(2);
+	}
+	return 0;
+}
+
+/*
+ *  wait for input
+ */
+static int
+inready(void)
+{
+	int tries;
+
+	for(tries = 0; !(inb(Status) & Inready); tries++){
+		if(tries > 500)
+			return -1;
+		delay(2);
+	}
+	return 0;
+}
+
+/*
+ *  ask 8042 to reset the machine
+ */
+void
+i8042reset(void)
+{
+	int i, x;
+
+	if(nokbd)
+		return;
+
+	*((uint16_t*)KADDR(0x472)) = 0x1234;	/* BIOS warm-boot flag */
+
+	/*
+	 *  newer reset the machine command
+	 */
+	outready();
+	outb(Cmd, 0xFE);
+	outready();
+
+	/*
+	 *  Pulse it by hand (old somewhat reliable)
+	 */
+	x = 0xDF;
+	for(i = 0; i < 5; i++){
+		x ^= 1;
+		outready();
+		outb(Cmd, 0xD1);
+		outready();
+		outb(Data, x);	/* toggle reset */
+		delay(100);
+	}
+}
+
+int
+i8042auxcmd(int cmd)
+{
+	unsigned int c;
+	int tries;
+
+	c = 0;
+	tries = 0;
+
+	ilock(&i8042lock);
+	do{
+		if(tries++ > 2)
+			break;
+		if(outready() < 0)
+			break;
+		outb(Cmd, 0xD4);
+		if(outready() < 0)
+			break;
+		outb(Data, cmd);
+		if(outready() < 0)
+			break;
+		if(inready() < 0)
+			break;
+		c = inb(Data);
+	} while(c == 0xFE || c == 0);
+	iunlock(&i8042lock);
+
+	if(c != 0xFA){
+		print("i8042: %2.2ux returned to the %2.2ux command (pc=%#p)\n",
+			c, cmd, getcallerpc());
+		return -1;
+	}
+	return 0;
+}
+
+/*
+ * set keyboard's leds for lock states (scroll, numeric, caps).
+ *
+ * at least one keyboard (from Qtronics) also sets its numeric-lock
+ * behaviour to match the led state, though it has no numeric keypad,
+ * and some BIOSes bring the system up with numeric-lock set and no
+ * setting to change that.  this combination steals the keys for these
+ * characters and makes it impossible to generate them: uiolkjm&*().
+ * thus we'd like to be able to force the numeric-lock led (and behaviour) off.
+ */
+static void
+setleds(int leds)
+{
+	static int old = -1;
+
+	if(nokbd || leds == old)
+		return;
+	leds &= 7;
+	ilock(&i8042lock);
+	for(;;){
+		if(outready() < 0)
+			break;
+		outb(Data, 0xed);		/* `reset keyboard lock states' */
+		if(outready() < 0)
+			break;
+		outb(Data, leds);
+		if(outready() < 0)
+			break;
+		old = leds;
+		break;
+	}
+	iunlock(&i8042lock);
+}
+
+/*
+ *  keyboard interrupt
+ */
+static void
+i8042intr(Ureg* _, void* __)
+{
+	int s, c;
+	uint8_t b;
+
+	/*
+	 *  get status
+	 */
+	ilock(&i8042lock);
+	s = inb(Status);
+	if(!(s&Inready)){
+		iunlock(&i8042lock);
+		return;
+	}
+
+	/*
+	 *  get the character
+	 */
+	c = inb(Data);
+	iunlock(&i8042lock);
+
+	/*
+	 *  if it's the aux port...
+	 */
+	if(s & Minready){
+		if(auxputc != nil)
+			auxputc(c, 0);
+		return;
+	}
+
+	b = c & 0xff;
+	qproduce(kbd.q, &b, 1);
+}
+
+void
+i8042auxenable(void (*putc)(int, int))
+{
+	static char err[] = "i8042: aux init failed\n";
+
+	ilock(&i8042lock);
+
+	/* enable kbd/aux xfers and interrupts */
+	ccc &= ~Cauxdis;
+	ccc |= Cauxint;
+
+	if(outready() < 0)
+		print(err);
+	outb(Cmd, 0x60);			/* write control register */
+	if(outready() < 0)
+		print(err);
+	outb(Data, ccc);
+	if(outready() < 0)
+		print(err);
+	outb(Cmd, 0xA8);			/* auxiliary device enable */
+	if(outready() < 0){
+		print(err);
+		iunlock(&i8042lock);
+		return;
+	}
+	auxputc = putc;
+	intrenable(IrqAUX, i8042intr, 0, BUSUNKNOWN, "kbdaux");
+
+	iunlock(&i8042lock);
+}
+
+static void
+kbdpoll(void)
+{
+	if(nokbd || qlen(kbd.q) > 0)
+		return;
+	i8042intr(0, 0);
+}
+
+static void
+kbdshutdown(void)
+{
+	if(nokbd)
+		return;
+	/* disable kbd and aux xfers and interrupts */
+	ccc &= ~(Ckbdint|Cauxint);
+	ccc |= (Cauxdis|Ckbddis);
+	outready();
+	outb(Cmd, 0x60);
+	outready();
+	outb(Data, ccc);
+	outready();
+}
+
+static Chan *
+kbdattach(Chan *c, Chan *ac, char *spec, int flags)
+{
+	return devattach(L'b', spec);
+}
+
+static Walkqid*
+kbdwalk(Chan *c, Chan *nc, char **name, int nname)
+{
+	return devwalk(c, nc, name, nname, kbdtab, nelem(kbdtab), devgen);
+}
+
+static long
+kbdstat(Chan *c, uint8_t *dp, long n)
+{
+	return devstat(c, dp, n, kbdtab, nelem(kbdtab), devgen);
+}
+
+static Chan*
+kbdopen(Chan *c, unsigned long omode)
+{
+	if(!iseve())
+		error(Eperm);
+	if(c->qid.path == Qscancode){
+		if(waserror()){
+			decref(&kbd.ref);
+			nexterror();
+		}
+		if(incref(&kbd.ref) != 1)
+			error(Einuse);
+		c = devopen(c, omode, kbdtab, nelem(kbdtab), devgen);
+		poperror();
+		return c;
+	}
+	return devopen(c, omode, kbdtab, nelem(kbdtab), devgen);
+}
+
+static void
+kbdclose(Chan *c)
+{
+	if((c->flag & COPEN) && c->qid.path == Qscancode)
+		decref(&kbd.ref);
+}
+
+static Block*
+kbdbread(Chan *c, long n, int64_t off)
+{
+	if(c->qid.path == Qscancode){
+		kbdpoll();
+		return qbread(kbd.q, n);
+	}
+	return devbread(c, n, off);
+}
+
+static long
+kbdread(Chan *c, void *a, long n, int64_t _)
+{
+	if(c->qid.path == Qscancode){
+		kbdpoll();
+		return qread(kbd.q, a, n);
+	}
+	if(c->qid.path == Qdir)
+		return devdirread(c, a, n, kbdtab, nelem(kbdtab), devgen);
+	error(Egreg);
+	return 0;
+}
+
+static long
+kbdwrite(Chan *c, void *a, long n, int64_t _)
+{
+	char tmp[8+1], *p;
+
+	if(c->qid.path != Qleds)
+		error(Egreg);
+
+	p = tmp + n;
+	if(n >= sizeof(tmp))
+		p = tmp + sizeof(tmp)-1;
+	memmove(tmp, a, p - tmp);
+	*p = 0;
+
+	setleds(atoi(tmp));
+
+	return n;
+}
+
+static void
+kbdreset(void)
+{
+	static char initfailed[] = "i8042: kbd init failed\n";
+	int c, try;
+
+	kbd.q = qopen(1024, Qcoalesce, 0, 0);
+	if(kbd.q == nil)
+		panic("kbdreset");
+	qnoblock(kbd.q, 1);
+
+	/* wait for a quiescent controller */
+	try = 1000;
+	while(try-- > 0 && (c = inb(Status)) & (Outbusy | Inready)) {
+		if(c & Inready)
+			inb(Data);
+		delay(1);
+	}
+	if (try <= 0) {
+		print(initfailed);
+		return;
+	}
+
+	/* get current controller command byte */
+	outb(Cmd, 0x20);
+	if(inready() < 0){
+		print("i8042: can't read ccc\n");
+		ccc = 0;
+	} else
+		ccc = inb(Data);
+
+	/* enable kbd xfers and interrupts */
+	ccc &= ~Ckbddis;
+	ccc |= Csf | Ckbdint | Cscs1;
+
+	/* disable ps2 mouse */
+	ccc &= ~Cauxint;
+	ccc |= Cauxdis;
+
+	if(outready() < 0) {
+		print(initfailed);
+		return;
+	}
+	outb(Cmd, 0x60);
+	outready();
+	outb(Data, ccc);
+	outready();
+
+	nokbd = 0;
+	ioalloc(Cmd, 1, 0, "i8042.cs");
+	ioalloc(Data, 1, 0, "i8042.data");
+	intrenable(IrqKBD, i8042intr, 0, BUSUNKNOWN, "kbd");
+}
+
+Dev kbddevtab = {
+	L'b',
+	"kbd",
+
+	kbdreset,
+	devinit,
+	kbdshutdown,
+	kbdattach,
+	kbdwalk,
+	kbdstat,
+	kbdopen,
+	devcreate,
+	kbdclose,
+	kbdread,
+	kbdbread,
+	kbdwrite,
+	devbwrite,
+	devremove,
+	devwstat,
+};
diff --git a/sys/src/kern/386/devpmc.c b/sys/src/kern/amd64/devpmc.c
similarity index 100%
rename from sys/src/kern/386/devpmc.c
rename to sys/src/kern/amd64/devpmc.c
diff --git a/sys/src/kern/386/devrtc.c b/sys/src/kern/amd64/devrtc.c
similarity index 100%
rename from sys/src/kern/386/devrtc.c
rename to sys/src/kern/amd64/devrtc.c
diff --git a/sys/src/kern/amd64/devvga.c b/sys/src/kern/amd64/devvga.c
index 65d1f9e..8c669eb 100644
--- a/sys/src/kern/amd64/devvga.c
+++ b/sys/src/kern/amd64/devvga.c
@@ -24,9 +24,6 @@
 #include <cursor.h>
 #include "screen.h"
 
-#define RMBUF ((void*)(KZERO + 0x9000))	// see 9/386/vgavesa.c
-#define LORMBUF (0x9000)
-
 enum {
 	Qdir,
 	Qvgabios,
@@ -45,8 +42,6 @@ static Dirtab vgadir[] = {
 
 enum {
 	CMactualsize,
-	CMblank,
-	CMblanktime,
 	CMdrawinit,
 	CMhwaccel,
 	CMhwblank,
@@ -57,13 +52,12 @@ enum {
 	CMsize,
 	CMtextmode,
 	CMtype,
-	CMunblank,
+	CMsoftscreen,
+	CMpcidev,
 };
 
 static Cmdtab vgactlmsg[] = {
 	CMactualsize,	"actualsize",	2,
-	CMblank,	"blank",	1,
-	CMblanktime,	"blanktime",	2,
 	CMdrawinit,	"drawinit",	1,
 	CMhwaccel,	"hwaccel",	2,
 	CMhwblank,	"hwblank",	2,
@@ -74,66 +68,39 @@ static Cmdtab vgactlmsg[] = {
 	CMsize,		"size",		3,
 	CMtextmode,	"textmode",	1,
 	CMtype,		"type",		2,
-	CMunblank,	"unblank",	1,
+	CMsoftscreen,	"softscreen",	2,
+	CMpcidev,	"pcidev",	2,
 };
 
-static long
-rmemrw(int isr, void *a, long n, int64_t off)
-{
-	if(off < 0 || n < 0)
-		error("bad offset/count");
-	if(isr){
-		if(off >= MB)
-			return 0;
-		if(off+n >= MB)
-			n = MB - off;
-		jehanne_memmove(a, KADDR((uintptr_t)off), n);
-	}else{
-		/* realmode buf page ok, allow vga framebuf's access */
-		if(off >= MB)
-			error("Offset > MB");
-		if (off+n > MB)
-			error("off+n > MB");
-		if (off < LORMBUF)
-			error("off < LORMBUF");
-		if (off+n > LORMBUF+PGSZ)
-			error("off+n > LORMBUF+BY2PG");
-		if (off < 0xA0000)
-			error("off < 0xa0000");
-		if (off+n > 0xB0000+0x10000)
-			error("off+n > 0xb0000+0x10000");
-		jehanne_memmove(KADDR((uintptr_t)off), a, n);
-	}
-	return n;
-}
-
-static long
-rmemread(Chan*_, void *a, long n, int64_t off)
-{
-	return rmemrw(1, a, n, off);
-}
-
-static long
-rmemwrite(Chan*_, void *a, long n, int64_t off)
-{
-	return rmemrw(0, a, n, off);
-}
-
 static void
 vgareset(void)
 {
+	Pcidev *pci;
+	VGAscr *scr;
+
 	/* reserve the 'standard' vga registers */
 	if(ioalloc(0x2b0, 0x2df-0x2b0+1, 0, "vga") < 0)
 		panic("vga ports already allocated");
 	if(ioalloc(0x3c0, 0x3da-0x3c0+1, 0, "vga") < 0)
 		panic("vga ports already allocated");
-	addarchfile("realmodemem", 0660, rmemread, rmemwrite);
+
+	/* find graphics card pci device */
+	scr = &vgascreen[0];
+	scr->pci = pci = nil;
+	while((pci = pcimatch(pci, 0, 0)) != nil){
+		if(pci->ccrb == Pcibcdisp){
+			scr->pci = pci;
+			break;
+		}
+	}
+
+	sys->monitor = 1;
 }
 
 static Chan*
 vgaattach(Chan *c, Chan *ac, char *spec, int flags)
 {
-	if(*spec && jehanne_strcmp(spec, "0"))
+	if(*spec && strcmp(spec, "0"))
 		error(Eio);
 	return devattach('v', spec);
 }
@@ -159,7 +126,7 @@ vgaopen(Chan* c, unsigned long omode)
 	scr = &vgascreen[0];
 	if ((uint32_t)c->qid.path == Qvgaovlctl) {
 		if (scr->dev && scr->dev->ovlctl)
-			scr->dev->ovlctl(scr, c, openctl, jehanne_strlen(openctl));
+			scr->dev->ovlctl(scr, c, openctl, strlen(openctl));
 		else
 			error(Enonexist);
 	}
@@ -176,10 +143,10 @@ vgaclose(Chan* c)
 	if((uint32_t)c->qid.path == Qvgaovlctl)
 		if(scr->dev && scr->dev->ovlctl){
 			if(waserror()){
-				jehanne_print("ovlctl error: %s\n", up->errstr);
+				print("ovlctl error: %s\n", up->errstr);
 				return;
 			}
-			scr->dev->ovlctl(scr, c, closectl, jehanne_strlen(closectl));
+			scr->dev->ovlctl(scr, c, closectl, strlen(closectl));
 			poperror();
 		}
 }
@@ -187,8 +154,7 @@ vgaclose(Chan* c)
 static long
 vgaread(Chan* c, void* a, long n, int64_t off)
 {
-	int len;
-	char *p, *s;
+	char *p, *s, *e;
 	VGAscr *scr;
 	uint32_t offset = off;
 	char chbuf[30];
@@ -203,50 +169,41 @@ vgaread(Chan* c, void* a, long n, int64_t off)
 			return 0;
 		if(offset+n >= 0x100000)
 			n = 0x100000 - offset;
-		jehanne_memmove(a, (unsigned char*)KADDR(0)+offset, n);
+		memmove(a, (uint8_t*)KADDR(0)+offset, n);
 		return n;
 
 	case Qvgactl:
 		scr = &vgascreen[0];
 
-		p = jehanne_malloc(READSTR);
-		if(p == nil)
-			error(Enomem);
+		s = smalloc(READSTR);
 		if(waserror()){
-			jehanne_free(p);
+			free(s);
 			nexterror();
 		}
-
-		len = 0;
-
-		if(scr->dev)
-			s = scr->dev->name;
-		else
-			s = "cga";
-		len += jehanne_snprint(p+len, READSTR-len, "type %s\n", s);
-
-		if(scr->gscreen) {
-			len += jehanne_snprint(p+len, READSTR-len, "size %dx%dx%d %s\n",
+		p = s, e = s+READSTR;
+		p = seprint(p, e, "type %s\n",
+			scr->dev != nil ? scr->dev->name : "cga");
+		if(scr->gscreen != nil) {
+			p = seprint(p, e, "size %dx%dx%d %s\n",
 				scr->gscreen->r.max.x, scr->gscreen->r.max.y,
 				scr->gscreen->depth, chantostr(chbuf, scr->gscreen->chan));
-
 			if(Dx(scr->gscreen->r) != Dx(physgscreenr)
 			|| Dy(scr->gscreen->r) != Dy(physgscreenr))
-				len += jehanne_snprint(p+len, READSTR-len, "actualsize %dx%d\n",
+				p = seprint(p, e, "actualsize %dx%d\n",
 					physgscreenr.max.x, physgscreenr.max.y);
 		}
-
-		len += jehanne_snprint(p+len, READSTR-len, "blank time %lud idle %d state %s\n",
-			blanktime, drawidletime(), scr->isblank ? "off" : "on");
-		len += jehanne_snprint(p+len, READSTR-len, "hwaccel %s\n", hwaccel ? "on" : "off");
-		len += jehanne_snprint(p+len, READSTR-len, "hwblank %s\n", hwblank ? "on" : "off");
-		len += jehanne_snprint(p+len, READSTR-len, "panning %s\n", panning ? "on" : "off");
-		len += jehanne_snprint(p+len, READSTR-len, "addr p 0x%lux v 0x%p size 0x%ux\n", scr->paddr, scr->vaddr, scr->apsize);
-		USED(len);
-
-		n = readstr(offset, a, n, p);
+		p = seprint(p, e, "hwgc %s\n",
+			scr->cur != nil ? scr->cur->name : "off");
+		p = seprint(p, e, "hwaccel %s\n", hwaccel ? "on" : "off");
+		p = seprint(p, e, "hwblank %s\n", hwblank ? "on" : "off");
+		p = seprint(p, e, "panning %s\n", panning ? "on" : "off");
+		p = seprint(p, e, "addr p %#p v %#p size %#ux\n",
+			scr->paddr, scr->vaddr, scr->apsize);
+		p = seprint(p, e, "softscreen %s\n", scr->softscreen ? "on" : "off");
+		USED(p);
+		n = readstr(offset, a, n, s);
 		poperror();
-		jehanne_free(p);
+		free(s);
 
 		return n;
 
@@ -263,6 +220,8 @@ vgaread(Chan* c, void* a, long n, int64_t off)
 	return 0;
 }
 
+//static char Ebusy[] = "vga already configured";
+
 static void
 vgactl(Cmdbuf *cb)
 {
@@ -278,47 +237,69 @@ vgactl(Cmdbuf *cb)
 	ct = lookupcmd(cb, vgactlmsg, nelem(vgactlmsg));
 	switch(ct->index){
 	case CMhwgc:
-		if(jehanne_strcmp(cb->f[1], "off") == 0){
-			lock(&cursor.l);
+		if(scr->gscreen == nil)
+			error("hwgc: no gscreen");
+
+		if(strcmp(cb->f[1], "off") == 0){
+			lock(&cursor);
 			if(scr->cur){
 				if(scr->cur->disable)
 					scr->cur->disable(scr);
 				scr->cur = nil;
 			}
-			unlock(&cursor.l);
+			unlock(&cursor);
 			return;
 		}
-		if(jehanne_strcmp(cb->f[1], "soft") == 0){
-			lock(&cursor.l);
+		if(strcmp(cb->f[1], "soft") == 0){
+			lock(&cursor);
 			swcursorinit();
 			if(scr->cur && scr->cur->disable)
 				scr->cur->disable(scr);
 			scr->cur = &swcursor;
 			if(scr->cur->enable)
 				scr->cur->enable(scr);
-			unlock(&cursor.l);
+			unlock(&cursor);
 			return;
 		}
 		for(i = 0; vgacur[i]; i++){
-			if(jehanne_strcmp(cb->f[1], vgacur[i]->name))
+			if(strcmp(cb->f[1], vgacur[i]->name))
 				continue;
-			lock(&cursor.l);
+			lock(&cursor);
 			if(scr->cur && scr->cur->disable)
 				scr->cur->disable(scr);
 			scr->cur = vgacur[i];
 			if(scr->cur->enable)
 				scr->cur->enable(scr);
-			unlock(&cursor.l);
+			unlock(&cursor);
 			return;
 		}
 		break;
 
+	case CMpcidev:
+		if(cb->nf == 2){
+			Pcidev *p;
+
+			if((p = pcimatchtbdf(strtoul(cb->f[1], 0, 16))) != nil)
+				scr->pci = p;
+		} else
+			error(Ebadarg);
+		return;
+
 	case CMtype:
 		for(i = 0; vgadev[i]; i++){
-			if(jehanne_strcmp(cb->f[1], vgadev[i]->name))
+			if(strcmp(cb->f[1], vgadev[i]->name))
 				continue;
-			if(scr->dev && scr->dev->disable)
-				scr->dev->disable(scr);
+			if(scr->dev){
+				qlock(&drawlock);
+				scr->fill = nil;
+				scr->scroll = nil;
+				scr->blank = nil;
+				hwblank = 0;
+				hwaccel = 0;
+				qunlock(&drawlock);
+				if(scr->dev->disable)
+					scr->dev->disable(scr);
+			}
 			scr->dev = vgadev[i];
 			if(scr->dev->enable)
 				scr->dev->enable(scr);
@@ -327,23 +308,24 @@ vgactl(Cmdbuf *cb)
 		break;
 
 	case CMtextmode:
-		cgainit();
+		screen_init();
+		bootscreenconf(nil);
 		return;
 
 	case CMsize:
-		x = jehanne_strtoul(cb->f[1], &p, 0);
+		x = strtoul(cb->f[1], &p, 0);
 		if(x == 0 || x > 10240)
 			error(Ebadarg);
 		if(*p)
 			p++;
 
-		y = jehanne_strtoul(p, &p, 0);
+		y = strtoul(p, &p, 0);
 		if(y == 0 || y > 10240)
 			error(Ebadarg);
 		if(*p)
 			p++;
 
-		z = jehanne_strtoul(p, &p, 0);
+		z = strtoul(p, &p, 0);
 
 		chanstr = cb->f[2];
 		if((chan = strtochan(chanstr)) == 0)
@@ -352,26 +334,24 @@ vgactl(Cmdbuf *cb)
 		if(chantodepth(chan) != z)
 			error("depth, channel do not match");
 
-		cursoroff(1);
+		cursoroff();
 		deletescreenimage();
 		if(screensize(x, y, z, chan))
 			error(Egreg);
-		vgascreenwin(scr);
-		resetscreenimage();
-		cursoron(1);
+		bootscreenconf(scr);
 		return;
 
 	case CMactualsize:
 		if(scr->gscreen == nil)
 			error("set the screen size first");
 
-		x = jehanne_strtoul(cb->f[1], &p, 0);
+		x = strtoul(cb->f[1], &p, 0);
 		if(x == 0 || x > 2048)
 			error(Ebadarg);
 		if(*p)
 			p++;
 
-		y = jehanne_strtoul(p, nil, 0);
+		y = strtoul(p, nil, 0);
 		if(y == 0 || y > 2048)
 			error(Ebadarg);
 
@@ -383,51 +363,57 @@ vgactl(Cmdbuf *cb)
 		return;
 
 	case CMpalettedepth:
-		x = jehanne_strtoul(cb->f[1], &p, 0);
+		x = strtoul(cb->f[1], &p, 0);
 		if(x != 8 && x != 6)
 			error(Ebadarg);
 
 		scr->palettedepth = x;
 		return;
 
+	case CMsoftscreen:
+		if(strcmp(cb->f[1], "on") == 0)
+			scr->softscreen = 1;
+		else if(strcmp(cb->f[1], "off") == 0)
+			scr->softscreen = 0;
+		else
+			break;
+		if(scr->gscreen == nil)
+			return;
+		x = scr->gscreen->r.max.x;
+		y = scr->gscreen->r.max.y;
+		z = scr->gscreen->depth;
+		chan = scr->gscreen->chan;
+		cursoroff();
+		deletescreenimage();
+		if(screensize(x, y, z, chan))
+			error(Egreg);
+		/* no break */
 	case CMdrawinit:
 		if(scr->gscreen == nil)
 			error("drawinit: no gscreen");
 		if(scr->dev && scr->dev->drawinit)
 			scr->dev->drawinit(scr);
+		hwblank = scr->blank != nil;
+		hwaccel = scr->fill != nil || scr->scroll != nil;
+		vgascreenwin(scr);
+		resetscreenimage();
+		cursoron();
 		return;
 
 	case CMlinear:
 		if(cb->nf!=2 && cb->nf!=3)
 			error(Ebadarg);
-		size = jehanne_strtoul(cb->f[1], 0, 0);
+		size = strtoul(cb->f[1], 0, 0);
 		if(cb->nf == 2)
 			align = 0;
 		else
-			align = jehanne_strtoul(cb->f[2], 0, 0);
+			align = strtoul(cb->f[2], 0, 0);
 		if(screenaperture(size, align) < 0)
 			error("not enough free address space");
 		return;
-/*
-	case CMmemset:
-		jehanne_memset((void*)jehanne_strtoul(cb->f[1], 0, 0), jehanne_atoi(cb->f[2]), jehanne_atoi(cb->f[3]));
-		return;
-*/
-
-	case CMblank:
-		drawblankscreen(1);
-		return;
-
-	case CMunblank:
-		drawblankscreen(0);
-		return;
-
-	case CMblanktime:
-		blanktime = jehanne_strtoul(cb->f[1], 0, 0);
-		return;
 
 	case CMpanning:
-		if(jehanne_strcmp(cb->f[1], "on") == 0){
+		if(strcmp(cb->f[1], "on") == 0){
 			if(scr == nil || scr->cur == nil)
 				error("set screen first");
 			if(!scr->cur->doespanning)
@@ -435,7 +421,7 @@ vgactl(Cmdbuf *cb)
 			scr->gscreen->clipr = scr->gscreen->r;
 			panning = 1;
 		}
-		else if(jehanne_strcmp(cb->f[1], "off") == 0){
+		else if(strcmp(cb->f[1], "off") == 0){
 			scr->gscreen->clipr = physgscreenr;
 			panning = 0;
 		}else
@@ -443,18 +429,18 @@ vgactl(Cmdbuf *cb)
 		return;
 
 	case CMhwaccel:
-		if(jehanne_strcmp(cb->f[1], "on") == 0)
+		if(strcmp(cb->f[1], "on") == 0)
 			hwaccel = 1;
-		else if(jehanne_strcmp(cb->f[1], "off") == 0)
+		else if(strcmp(cb->f[1], "off") == 0)
 			hwaccel = 0;
 		else
 			break;
 		return;
 
 	case CMhwblank:
-		if(jehanne_strcmp(cb->f[1], "on") == 0)
+		if(strcmp(cb->f[1], "on") == 0)
 			hwblank = 1;
-		else if(jehanne_strcmp(cb->f[1], "off") == 0)
+		else if(strcmp(cb->f[1], "off") == 0)
 			hwblank = 0;
 		else
 			break;
@@ -483,12 +469,12 @@ vgawrite(Chan* c, void* a, long n, int64_t off)
 			error(Ebadarg);
 		cb = parsecmd(a, n);
 		if(waserror()){
-			jehanne_free(cb);
+			free(cb);
 			nexterror();
 		}
 		vgactl(cb);
 		poperror();
-		jehanne_free(cb);
+		free(cb);
 		return n;
 
 	case Qvgaovl:
diff --git a/sys/src/kern/amd64/ec.c b/sys/src/kern/amd64/ec.c
new file mode 100644
index 0000000..a48a667
--- /dev/null
+++ b/sys/src/kern/amd64/ec.c
@@ -0,0 +1,174 @@
+/*
+ * embedded controller (usually at ports 0x66/0x62)
+ */
+#include	"u.h"
+#include	"../port/lib.h"
+#include	"mem.h"
+#include	"dat.h"
+#include	"fns.h"
+#include	"io.h"
+#include	"../port/error.h"
+
+enum {
+	/* registers */
+	EC_SC	= 0,
+	EC_DATA,
+
+	/* Embedded Controller Status, EC_SC (R) */
+	OBF	= 1<<0,
+	IBF	= 1<<1,
+	CMD	= 1<<3,
+	BURST	= 1<<4,
+	SCI_EVT	= 1<<5,
+	SMI_EVT	= 1<<6,
+
+	/* Embedded Controller Command Set */
+	RD_EC	= 0x80,
+	WR_EC	= 0x81,
+	BE_EC	= 0x82,
+	BD_EC	= 0x83,
+	QR_EC	= 0x84,
+};
+
+static struct {
+	Lock;
+	int	init;
+	int	port[2];	/* EC_SC and EC_DATA */
+} ec;
+
+static uint8_t
+ecrr(int reg)
+{
+	return inb(ec.port[reg]);
+}
+static void
+ecwr(int reg, uint8_t val)
+{
+	outb(ec.port[reg], val);
+}
+
+static int
+ecwait(uint8_t mask, uint8_t val)
+{
+	int i, s;
+
+	s = 0;
+	for(i=0; i<1000; i++){
+		s = ecrr(EC_SC);
+		if((s & mask) == val)
+			return 0;
+		delay(1);
+	}
+	print("ec: wait timeout status=%x pc=%#p\n", s, getcallerpc());
+	return -1;
+}
+
+int
+ecread(uint8_t addr)
+{
+	int r;
+
+	r = -1;
+	lock(&ec);
+	if(!ec.init)
+		goto out;
+	if(ecwait(IBF, 0))
+		goto out;
+	ecwr(EC_SC, RD_EC);
+	if(ecwait(IBF, 0))
+		goto out;
+	ecwr(EC_DATA, addr);
+	if(ecwait(OBF, OBF))
+		goto out;
+	r = ecrr(EC_DATA);
+	ecwait(OBF, 0);
+out:
+	unlock(&ec);
+	return r;
+}
+
+int
+ecwrite(uint8_t addr, uint8_t val)
+{
+	int r;
+
+	r = -1;
+	lock(&ec);
+	if(!ec.init)
+		goto out;
+	if(ecwait(IBF, 0))
+		goto out;
+	ecwr(EC_SC, WR_EC);
+	if(ecwait(IBF, 0))
+		goto out;
+	ecwr(EC_DATA, addr);
+	if(ecwait(IBF, 0))
+		goto out;
+	ecwr(EC_DATA, val);
+	if(ecwait(IBF, 0))
+		goto out;
+	r = 0;
+out:
+	unlock(&ec);
+	return r;
+}
+
+static long
+ecarchread(Chan* _, void *a, long n, int64_t off)
+{
+	int port, v;
+	uint8_t *p;
+
+	if(off < 0 || off >= 256)
+		return 0;
+	if(off+n > 256)
+		n = 256 - off;
+	p = a;
+	for(port = off; port < off+n; port++){
+		if((v = ecread(port)) < 0)
+			error(Eio);
+		*p++ = v;
+	}
+	return n;
+}
+
+static long
+ecarchwrite(Chan* _, void *a, long n, int64_t off)
+{
+	int port;
+	uint8_t *p;
+
+	if(off < 0 || off+n > 256)
+		error(Ebadarg);
+	p = a;
+	for(port = off; port < off+n; port++)
+		if(ecwrite(port, *p++) < 0)
+			error(Eio);
+	return n;
+}
+
+int
+ecinit(int cmdport, int dataport)
+{
+	print("ec: cmd %X, data %X\n", cmdport, dataport);
+
+	if(ioalloc(cmdport, 1, 0, "ec.sc") < 0){
+		print("ec: cant allocate cmd port %X\n", cmdport);
+		return -1;
+	}
+	if(ioalloc(dataport, 1, 0, "ec.data") < 0){
+		print("ec: cant allocate data port %X\n", dataport);
+		iofree(cmdport);
+		return -1;
+	}
+
+	lock(&ec);
+	ec.port[EC_SC] = cmdport;
+	ec.port[EC_DATA] = dataport;
+	ec.init = 1;
+	unlock(&ec);
+
+	addarchfile("ec", 0660, ecarchread, ecarchwrite);
+
+	return 0;
+}
diff --git a/sys/src/kern/amd64/entry.S b/sys/src/kern/amd64/entry.S
index a892225..4e7a6cb 100644
--- a/sys/src/kern/amd64/entry.S
+++ b/sys/src/kern/amd64/entry.S
@@ -1,189 +1,145 @@
+/*
+ * This file is part of Jehanne.
+ *
+ * Copyright (C) 2017 Giacomo Tesio <giacomo@tesio.it>
+ *
+ * Jehanne is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 2 of the License.
+ *
+ * Jehanne is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with Jehanne.  If not, see <http://www.gnu.org/licenses/>.
+ */
 #include "mem.h"
 #include "amd64.h"
 #ifndef __ASSEMBLER__
 #define __ASSEMBLER__
 #endif
+#include "multiboot.h"
 
 .code32
 
-/* do we enter in 16-bit mode? If so, take the code from coreboot that goes from
- * 16->32
+/* This code (up to _start64v) is linked and loaded at physical address
+ * 0x00100000 (1MB), which is the start of extended memory. (See kernel.ld)
  */
-/*
- * Enter here in 32-bit protected mode. Welcome to 1982.
- * Make sure the GDT is set as it should be:
- *	disable interrupts;
- *	load the GDT with the table in _gdt32p;
- *	load all the data segments
- *	load the code segment via a far jump.
+
+/* boottext must be text: http://sourceware.org/binutils/docs/as/Section.html
  */
-#define MULTIBOOT_PAGE_ALIGN  (1<<0)
-#define MULTIBOOT_MEMORY_INFO (1<<1)
-#define MULTIBOOT_HEADER_MAGIC (0x1BADB002)
-#define MULTIBOOT_HEADER_FLAGS (MULTIBOOT_MEMORY_INFO | MULTIBOOT_PAGE_ALIGN)
-#define CHECKSUM (-(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS))
-
-# The kernel bootstrap (this code) is linked and loaded at physical address
-# 0x00100000 (1MB), which is the start of extended memory.  (See kernel.ld)
-
-# Flagging boottext to be text.  Check out:
-# http://sourceware.org/binutils/docs/as/Section.html
 .section .boottext, "awx"
 
-.code32
 .align 4
-_protected:
-multiboot_header:
-.long MULTIBOOT_HEADER_MAGIC
-.long MULTIBOOT_HEADER_FLAGS
-.long CHECKSUM
+#define MBFLAGS (MULTIBOOT_MEMORY_INFO | MULTIBOOT_PAGE_ALIGN)
+_multibootheader:
+	.long	MULTIBOOT_HEADER_MAGIC
+	.long	MBFLAGS
+	.long	(-(MULTIBOOT_HEADER_MAGIC + MBFLAGS))	/* checksum */
+
+.align 16
+.globl _boot_registers
+_boot_registers:
+_ax:
+	.quad 0
+_bx:
+	.quad 0
+_cx:
+	.quad 0
+_dx:
+	.quad 0
+_si:
+	.quad 0
+_di:
+	.quad 0
+_bp:
+	.quad 0
+_r8:
+	.quad 0
+_r9:
+	.quad 0
+_r10:
+	.quad 0
+_r11:
+	.quad 0
+_r12:
+	.quad 0
+_r13:
+	.quad 0
+_r14:
+	.quad 0
+_r15:
+	.quad 0
+_type:
+	.quad 0
+_error:
+	.quad 0
+_ip:
+	.quad 0
+_cs:
+	.quad 0
+_flags:
+	.quad 0
+_sp:
+	.quad 0
+_ss:
+	.quad 0
 
 .globl _start
 _start:
 	cli
-	jmp 1f
+	lgdt	%cs:_gdtptr32p
+	ljmp	$0x18, $_protected
 
+_protected:
+	/* save initial registers (at least those available so far) */
+	movl	%eax, _ax
+	movl	%ebx, _bx
+	movl	%ecx, _cx
+	movl	%edx, _dx
+	movl	%ebp, _bp
+	movl	%esp, _sp
+	movl	%esi, _si
+	movl	%edi, _di
 
-	/* This is the GDT for the ROM stage part of coreboot. It
-	 * is different from the RAM stage GDT which is defined in
-	 * c_start.S
-	 */
-
-.align	4
-.globl gdtptr
-gdt:
-gdtptr:
-	.word	gdt_end - gdt -1 /* compute the table limit */
-	.long	gdt		 /* we know the offset */
-	.word	0
-
-	/* selgdt 0x08, flat code segment */
-	.word	0xffff, 0x0000
-	.byte	0x00, 0x9b, 0xcf, 0x00 /* G=1 and 0x0f, So we get 4Gbytes for limit */
-
-	/* selgdt 0x10,flat data segment */
-	.word	0xffff, 0x0000
-	.byte	0x00, 0x93, 0xcf, 0x00
-
-	/* long mode code segment. */
-	.quad	0x0020980000000000		/* Long mode CS */
-
-gdt_end:
-
-
-/*
- *	When we come here we are in protected mode. We expand
- *	the stack and copies the data segment from ROM to the
- *	memory.
- *
- *	After that, we call the chipset bootstrap routine that
- *	does what is left of the chipset initialization.
- *
- *	NOTE aligned to 4 so that we are sure that the prefetch
- *	cache will be reloaded.
- */
-1:
-.align	4
-.globl protected_start
-protected_start:
-
-	lgdt	%cs:gdtptr
-	ljmp	$8, $__protected_start
-
-__protected_start:
-	/* Save the BIST value */
-	movl	%eax, %ebp
-	movw	$0x10, %ax
+	movl	$SELECTOR(2, SELGDT, 0), %eax
 	movw	%ax, %ds
 	movw	%ax, %es
-	movw	%ax, %ss
 	movw	%ax, %fs
 	movw	%ax, %gs
+	movw	%ax, %ss
 
-	/* Restore the BIST value to %eax */
-	movl	%ebp, %eax
+	jmp	_warp64
 
-entry32:
-1:
-	movb	$0x30, %al
-	movw $0x30, %dx
-	outb %dx
-// This gets us into a reasonable mode. We can skip the plan 9 gdt code.
-	call 1f
-1:
-	popl	%ebp
-	/* when you execute this instruction, bp has the value
-	 * of 1f.
-	 * So add the length of this instruction and the
-	 * 5 bytes of the jmp that follows it.
-	 * It will then point to start of header.
-	 */
-	addl $12, %ebp
-	/* Now make it point to gdt32p (gdt, 32 bits, physical)
-	 */
-	addl $14, %ebp
-	jmp _endofheader
+.align 16
+_gdt:
+	/* null descriptor */
+	.long	0
+	.long	0
 
-_startofheader:
-	.byte	0x90				/* NOP */
-	.byte	0x90				/* NOP */
+	/* (KESEG) 64 bit long mode exec segment */
+	.long	0xFFFF
+	.long	SEGL|SEGG|SEGP|(0xF<<16)|SEGPL(0)|SEGEXEC|SEGR
 
-_multibootheader:	/* must be 4-byte aligned */
-	.long	0x1badb002			/* magic */
-	.long	0x00000003			/* flags */
-	.long	-(0x1badb002 + 0x00000003)	/* checksum */
+	/* 32 bit data segment descriptor for 4 gigabytes (PL 0) */
+	.long	0xFFFF
+	.long	SEGG|SEGB|(0xF<<16)|SEGP|SEGPL(0)|SEGDATA|SEGW
 
-_gdt32p:
-	.quad	0x0000000000000000		/* NULL descriptor */
-	.quad	0x00cf9a000000ffff		/* CS */
-	.quad	0x00cf92000000ffff		/* DS */
-	.quad	0x0020980000000000		/* Long mode CS */
+	/* 32 bit exec segment descriptor for 4 gigabytes (PL 0) */
+	.long	0xFFFF
+	.long	SEGG|SEGD|(0xF<<16)|SEGP|SEGPL(0)|SEGEXEC|SEGR
 
+.align 4
 _gdtptr32p:
 	.word	4*8-1
-	.long	_gdt32p
-
-_gdt64p:
-	.quad	0x0000000000000000		/* NULL descriptor */
-	.quad	0x0020980000000000		/* CS */
+	.long	_gdt
 
+.align 4
 _gdtptr64p:
-	.word	2*8-1
-	.quad	_gdt64p
-
-
-_endofheader:
-	pushl %eax				/* possible passed-in magic */
-
-/*
- * Make the basic page tables for CPU0 to map 0-4MiB physical
- * to KZERO, and include an identity map for the switch from protected
- * to paging mode. There`s an assumption here that the creation and later
- * removal of the identity map will not interfere with the KZERO mappings;
- * the conditions for clearing the identity map are
- *	clear PML4 entry when (KZER0 & 0x0000ff8000000000) != 0;
- *	clear PDP entry when (KZER0 & 0x0000007fc0000000) != 0;
- *	don`t clear PD entry when (KZER0 & 0x000000003fe00000) == 0;
- * the code below assumes these conditions are met.
- *
- * Assume a recent processor with Page Size Extensions
- * and use two 2MiB entries.
- */
-/*
- * The layout is decribed in data.h:
- *	_protected:	start of kernel text
- *	- 4*KiB		unused
- *	- 4*KiB		unused
- *	- 4*KiB		ptrpage
- *	- 4*KiB		syspage
- *	- MACHSZ	m
- *	- 4*KiB		vsvmpage for gdt, tss
- *	- PTSZ		PT for PMAPADDR		unused - assumes in KZERO PD
- *	- PTSZ		PD
- *	- PTSZ		PDP
- *	- PTSZ		PML4
- *	- MACHSTKSZ	stack
- */
+	.word	4*8-1
+	.quad	_gdt
 
 /*
  * Macros for accessing page table entries; change the
@@ -195,45 +151,55 @@ _endofheader:
 #define PTO(v)		((PTLX((v), 0))<<3)
 
 _warp64:
-	movl	$_protected-(MACHSTKSZ+4*PTSZ+5*(4*KiB)+MACHSZ), %esi
+	movl	$((CPU0END-CPU0PML4)>>2), %ecx
+	movl	$(CPU0PML4-KZERO), %esi
 
 	movl	%esi, %edi
 	xorl	%eax, %eax
-	movl	$((MACHSTKSZ+4*PTSZ+5*(4*KiB)+MACHSZ)>>2), %ecx
 
 	cld
-	rep;	stosl				/* stack, P*, vsvm, m, sys */
+	rep;	stosl
 
-	movl	%esi, %eax			/* sys-KZERO */
-	addl	$(MACHSTKSZ), %eax		/* PML4 */
-	movl	%eax, %cr3			/* load the mmu */
+	movl	%esi, %eax				/* PML4 */
 	movl	%eax, %edx
-	addl	$(PTSZ|PteRW|PteP), %edx	/* PDP at PML4 + PTSZ */
-	movl	%edx, PML4O(0)(%eax)		/* PML4E for identity map */
-	movl	%edx, PML4O(KZERO)(%eax)	/* PML4E for KZERO, PMAPADDR */
+	addl	$(PTSZ|PTEWRITE|PTEVALID), %edx		/* PDP at PML4 + PTSZ */
+	movl	%edx, PML4O(0)(%eax)			/* PML4E for double-map */
+	movl	%edx, PML4O(KZERO)(%eax)		/* PML4E for KZERO */
 
-	addl	$PTSZ, %eax			/* PDP at PML4 + PTSZ */
-	addl	$PTSZ, %edx			/* PD at PML4 + 2*PTSZ */
-	movl	%edx, PDPO(0)(%eax)		/* PDPE for identity map */
-	movl	%edx, PDPO(KZERO)(%eax)		/* PDPE for KZERO, PMAPADDR */
+	addl	$PTSZ, %eax				/* PDP at PML4 + PTSZ */
+	addl	$PTSZ, %edx				/* PD0 at PML4 + 2*PTSZ */
+	movl	%edx, PDPO(0)(%eax)			/* PDPE for double-map */
+	movl	%edx, PDPO(KZERO)(%eax)			/* PDPE for KZERO */
 
-	addl	$PTSZ, %eax			/* PD at PML4 + 2*PTSZ */
-	movl	$(PtePS|PteRW|PteP), %edx
-	movl	%edx, PDO(0)(%eax)		/* PDE for identity 0-[24]MiB */
+	/*
+	 * add PDPE for KZERO+1GB early as Vmware
+	 * hangs when modifying kernel PDP
+	 */
+	addl	$PTSZ, %edx				/* PD1 */
+	movl	%edx, PDPO(KZERO+GiB)(%eax)
 
-	movl	%eax, %ecx
-	addl	$PDO(KZERO), %ecx
+	addl	$PTSZ, %eax				/* PD0 at PML4 + 2*PTSZ */
+	movl	$(PTESIZE|PTEGLOBAL|PTEWRITE|PTEVALID), %edx
+	movl	%edx, PDO(0)(%eax)			/* PDE for double-map */
+
+	/*
+	 * map from KZERO to end using 2MB pages
+	 */
+	addl	$PDO(KZERO), %eax
+	movl	$end-KZERO, %ecx
+
+	addl    $(16*MiB), %ecx				/* qemu puts multiboot data after the kernel, including initrd */
+
+	addl	$(PGLSZ(1)-1), %ecx
+	andl	$(~(PGLSZ(1)-1)), %ecx
+	movl	%ecx, MemMin-KZERO			/* see memory.c */
+	shr	$(PTSHFT+PGSHIFT), %ecx
 
 memloop:
-	movl	%edx, 0(%ecx)
+	movl	%edx, (%eax)
 	addl	$PGLSZ(1), %edx
-	addl	$8, %ecx
-	cmpl	$(32*MiB), %edx
-	JL	memloop
-
-	movl	%eax, %edx			/* PD at PML4 + 2*PTSZ */
-	addl	$(PTSZ|PteRW|PteP), %edx	/* PT at PML4 + 3*PTSZ */
-	movl	%edx, PDO(PMAPADDR)(%eax)	/* PDE for PMAPADDR */
+	addl	$8, %eax
+	loop	memloop
 
 /*
  * Enable and activate Long Mode. From the manual:
@@ -245,6 +211,9 @@ memloop:
  * It`s all in 32-bit mode until the jump is made.
  */
 lme:
+	movl	%esi, %cr3			/* load the mmu */
+	jmp	1f
+1:
 	movl	%cr4, %eax
 	andl	$~Pse, %eax			/* Page Size */
 	orl	$(Pge|Pae), %eax		/* Page Global, Phys. Address */
@@ -260,7 +229,8 @@ lme:
 	orl	$(Pg|Wp), %edx			/* Paging Enable */
 	movl	%edx, %cr0
 
-	ljmp $0x18, $_identity
+	ljmp 	$0x8, $_identity
+
 
 /*
  * Long mode. Welcome to 2003.
@@ -270,69 +240,60 @@ lme:
 .code64
 
 _identity:
+	/* save initial registers */
+	movq	%r8, _r8
+	movq	%r9, _r9
+	movq	%r10, _r10
+	movq	%r11, _r11
+	movq	%r12, _r12
+	movq	%r13, _r13
+	movq	%r14, _r14
+	movq	%r15, _r15
+
 	movq	$_start64v, %rax
 	jmp	*%rax
+
 .section .text
-_gdt64v:
-	.quad	0x0000000000000000		/* NULL descriptor */
-	.quad	0x0020980000000000		/* CS */
 
+.align 4
+.globl _gdtptr64v
 _gdtptr64v:
-	.word	2*8-1
-	.quad	_gdt64v
+	.word	4*8-1
+	.quad	_gdt+KZERO
+	.word	0
 
-// At this point, we are safe to use kernel addresses, as we are in
-// kernel virtual address space.
+.align 4
 _start64v:
 	movq	$_gdtptr64v, %rax
 	lgdt	(%rax)
 
-	xorq	%rdx, %rdx
-	movw	%dx, %ds			/* not used in long mode */
-	movw	%dx, %es			/* not used in long mode */
-	movw	%dx, %fs
-	movw	%dx, %gs
-	movw	%dx, %ss			/* not used in long mode */
+	xorq	%rax, %rax
+	movw	%ax, %ds			/* not used in long mode */
+	movw	%ax, %es			/* not used in long mode */
+	movw	%ax, %fs
+	movw	%ax, %gs
+	movw	%ax, %ss			/* not used in long mode */
 
-	movq	%rsi, %rsi			/* sys-KZERO */
-	movq	%rsi, %rax
-	addq	$KZERO, %rax
-	movq	%rax, sys			/* sys */
+	lldt	%ax
 
-	addq	$(MACHSTKSZ), %rax		/* PML4 and top of stack */
-	movq	%rax, %rsp			/* set stack */
+	movq	$(CPU0MACH+MACHSIZE), %rsp
+	movq	$CPU0MACH, %r15			/* m = CPU0MACH */
+	movq	%rax, %r14			/* up = 0; */
 
-_zap0pml4:
-	cmpq	$PML4O(KZERO), %rdx		/* KZER0 & 0x0000ff8000000000 */
-	je	_zap0pdp
-	movq	%rdx, PML4O(0)(%rax) 		/* zap identity map PML4E */
-_zap0pdp:
-	addq	$PTSZ, %rax			/* PDP at PML4 + PTSZ */
-	cmpq	$PDPO(KZERO), %rdx 		/* KZER0 & 0x0000007fc0000000 */
-	je	_zap0pd
-	movq	%rdx, PDPO(0)(%rax)		/* zap identity map PDPE */
-_zap0pd:
-	addq	$PTSZ, %rax			/* PD at PML4 + 2*PTSZ */
-	cmpq	$PDO(KZERO), %rdx		/* KZER0 & 0x000000003fe00000 */
-	je	_zap0done
-	movq	%rdx, PDO(0)(%rax)		/* zap identity map PDE */
-_zap0done:
-	addq	$(MACHSTKSZ), %rsi		/* PML4-KZERO */
-	movq	%rsi, %cr3			/* flush TLB */
+_clearbss:
+	movq	$edata, %rdi
+	movq	$end, %rcx
+	addq	$(PGSZ-1), %rdi
+	andq	$(~(PGSZ-1)), %rdi
+	subq	%rdi, %rcx			/* end-edata bytes */
+	shrq	$2, %rcx			/* end-edata doublewords */
 
-	addq	$(2*PTSZ+4*KiB), %rax		/* PD+PT+vsvm */
-	movq	%rax, %r15
-	movq	%rdx, %r14
-	movq	$0, (%rax) 			/* m->machno = 0 */
+	cld
+	rep;	stosl
 
-	pushq	%rdx				/* clear flags */
+	pushq	%rax
 	popfq
 
-	movq	%rbx, %rbx			/* push multiboot args */
-	movq	%rbx, %rsi
-	movq	%rax, %rax
-	movq	%rax, %rdi			/* multiboot magic */
-	xorq	%rbp, %rbp			/* stack trace ends here */
 	call	main
 
 .globl ndnr
diff --git a/sys/src/kern/386/ether8139.c b/sys/src/kern/amd64/ether8139.c
similarity index 99%
rename from sys/src/kern/386/ether8139.c
rename to sys/src/kern/amd64/ether8139.c
index cf02a99..42f3be2 100644
--- a/sys/src/kern/386/ether8139.c
+++ b/sys/src/kern/amd64/ether8139.c
@@ -746,7 +746,7 @@ rtl8139match(Ether* edev, int id)
 
 		if(pcigetpms(p) > 0){
 			pcisetpms(p, 0);
-	
+
 			for(i = 0; i < 6; i++)
 				pcicfgw32(p, PciBAR0+i*4, p->mem[i].bar);
 			pcicfgw8(p, PciINTL, p->intl);
diff --git a/sys/src/kern/386/ether8169.c b/sys/src/kern/amd64/ether8169.c
similarity index 100%
rename from sys/src/kern/386/ether8169.c
rename to sys/src/kern/amd64/ether8169.c
diff --git a/sys/src/kern/386/ether82557.c b/sys/src/kern/amd64/ether82557.c
similarity index 100%
rename from sys/src/kern/386/ether82557.c
rename to sys/src/kern/amd64/ether82557.c
diff --git a/sys/src/kern/386/ether82563.c b/sys/src/kern/amd64/ether82563.c
similarity index 99%
rename from sys/src/kern/386/ether82563.c
rename to sys/src/kern/amd64/ether82563.c
index 9f1f4a6..8df9f8c 100644
--- a/sys/src/kern/386/ether82563.c
+++ b/sys/src/kern/amd64/ether82563.c
@@ -434,7 +434,7 @@ enum {
 	i82575,
 	i82576,
 	i82577,
-	i82577m,	
+	i82577m,
 	i82578,
 	i82578m,
 	i82579,
@@ -1974,7 +1974,7 @@ didtype(int d)
 	case 0x150f:		/* fiber */
 	case 0x1510:		/* backplane */
 	case 0x1511:		/* sfp */
-	case 0x1516:		
+	case 0x1516:
 		return i82580;
 	case 0x1506:		/* v */
 		return i82583;
diff --git a/sys/src/kern/386/ether82598.c b/sys/src/kern/amd64/ether82598.c
similarity index 100%
rename from sys/src/kern/386/ether82598.c
rename to sys/src/kern/amd64/ether82598.c
diff --git a/sys/src/kern/386/etherbcm.c b/sys/src/kern/amd64/etherbcm.c
similarity index 99%
rename from sys/src/kern/386/etherbcm.c
rename to sys/src/kern/amd64/etherbcm.c
index 2b555b1..fc6c96a 100644
--- a/sys/src/kern/386/etherbcm.c
+++ b/sys/src/kern/amd64/etherbcm.c
@@ -91,7 +91,7 @@ enum {
 	MACPortMII		= 1<<2,
 	MACEnable		= 1<<23 | 1<<22 | 1<<21 | 1 << 15 | 1 << 14 | 1<<12 | 1<<11,
 	MACHalfDuplex		= 1<<1,
-	
+
 	MACEventStatus		= 0x404,
 	MACEventEnable	= 0x408,
 	MACAddress		= 0x410,
@@ -105,7 +105,7 @@ enum {
 	TxMACLengths		= 0x464,
 	MACHash		= 0x470,
 	RxRules			= 0x480,
-	
+
 	RxRulesConf		= 0x500,
 	LowWaterMax		= 0x504,
 	LowWaterMaxMask	= ~0xFFFF,
@@ -120,13 +120,13 @@ enum {
 	SendBDSelectorMode	= 0x1400,
 	SendBDInitiatorMode	= 0x1800,
 	SendBDCompletionMode	= 0x1C00,
-	
+
 	RxListPlacementMode	= 0x2000,
 	RxListPlacement		= 0x2010,
 	RxListPlacementConf	= 0x2014,
 	RxStats			= 1<<0,
 	RxListPlacementMask	= 0x2018,
-	
+
 	RxDataBDInitiatorMode	= 0x2400,
 	RxBDHostAddr		= 0x2450,
 	RxBDFlags		= 0x2458,
@@ -134,7 +134,7 @@ enum {
 	RxDataCompletionMode	= 0x2800,
 	RxBDInitiatorMode	= 0x2C00,
 	RxBDRepl		= 0x2C18,
-	
+
 	RxBDCompletionMode	= 0x3000,
 	HostCoalMode		= 0x3C00,
 	HostCoalRxTicks		= 0x3C08,
@@ -147,27 +147,27 @@ enum {
 	FlowAttention		= 0x3C48,
 
 	MemArbiterMode		= 0x4000,
-	
+
 	BufferManMode		= 0x4400,
-	
+
 	MBUFLowWater		= 0x4414,
 	MBUFHighWater		= 0x4418,
-	
+
 	ReadDMAMode		= 0x4800,
 	ReadDMAStatus		= 0x4804,
 	WriteDMAMode		= 0x4C00,
 	WriteDMAStatus		= 0x4C04,
-	
+
 	RISCState		= 0x5004,
 	FTQReset		= 0x5C00,
 	MSIMode		= 0x6000,
-	
+
 	ModeControl		= 0x6800,
 	ByteWordSwap		= 1<<4 | 1<<5 | 1<<2, // | 1<<1,
 	HostStackUp		= 1<<16,
 	HostSendBDs		= 1<<17,
 	InterruptOnMAC		= 1<<26,
-	
+
 	MiscConf		= 0x6804,
 	CoreClockBlocksReset	= 1<<0,
 	GPHYPwrdnOverride	= 1<<26,
@@ -177,7 +177,7 @@ enum {
 	MiscLocalControl		= 0x6808,
 	InterruptOnAttn		= 1<<3,
 	AutoSEEPROM		= 1<<24,
-	
+
 	SwArbitration		= 0x7020,
 	SwArbitSet1		= 1<<1,
 	SwArbitWon1		= 1<<9,
@@ -186,11 +186,11 @@ enum {
 	PhyAuxControl		= 0x18,
 	PhyIntStatus		= 0x1A,
 	PhyIntMask		= 0x1B,
-	
+
 	Updated			= 1<<0,
 	LinkStateChange		= 1<<1,
 	Error			= 1<<2,
-	
+
 	PacketEnd		= 1<<2,
 	FrameError		= 1<<10,
 };
@@ -389,7 +389,7 @@ replenish(Ctlr *ctlr)
 	uint32_t incr;
 	uint32_t *next;
 	Block *bp;
-	
+
 	incr = (ctlr->recvprodi + 1) & (RxProdRingLen - 1);
 	if(incr == (ctlr->status[2] >> 16))
 		return -1;
@@ -419,7 +419,7 @@ bcmreceive(Ether *edev)
 	uint32_t *pkt;
 	Ctlr *ctlr;
 	Block *bp;
-	
+
 	ctlr = edev->ctlr;
 	for(; pkt = currentrecvret(ctlr); replenish(ctlr), consumerecvret(ctlr)) {
 		bp = ctlr->rxs[pkt[7]];
@@ -444,7 +444,7 @@ static void
 bcmtransclean(Ether *edev)
 {
 	Ctlr *ctlr;
-	
+
 	ctlr = edev->ctlr;
 	ilock(&ctlr->txlock);
 	while(ctlr->sendcleani != (ctlr->status[4] >> 16)) {
@@ -462,7 +462,7 @@ bcmtransmit(Ether *edev)
 	uint32_t *next;
 	Ctlr *ctlr;
 	Block *bp;
-	
+
 	ctlr = edev->ctlr;
 	ilock(&ctlr->txlock);
 	for(;;){
@@ -491,7 +491,7 @@ static void
 bcmerror(Ether *edev)
 {
 	Ctlr *ctlr;
-	
+
 	ctlr = edev->ctlr;
 	if(csr32(ctlr, FlowAttention)) {
 		if(csr32(ctlr, FlowAttention) & 0xf8ff8080)
@@ -518,7 +518,7 @@ bcminterrupt(Ureg*, void *arg)
 	uint32_t status, tag, dummy;
 	Ether *edev;
 	Ctlr *ctlr;
-	
+
 	edev = arg;
 	ctlr = edev->ctlr;
 	ilock(&ctlr->imlock);
@@ -579,7 +579,7 @@ bcminit(Ether *edev)
 	uint32_t i;
 	uint32_t j;
 	Ctlr *ctlr;
-	
+
 	ctlr = edev->ctlr;
 	dprint("bcm: reset\n");
 	/* initialization procedure according to the datasheet */
@@ -748,7 +748,7 @@ didtype(Pcidev *p)
 {
 	if(p->vid != 0x14e4)
 		return -1;
-	
+
 	switch(p->did){
 	default:
 		return -1;
@@ -825,7 +825,7 @@ static void
 bcmpromiscuous(void* arg, int on)
 {
 	Ctlr *ctlr;
-	
+
 	ctlr = ((Ether*)arg)->ctlr;
 	if(on)
 		csr32(ctlr, RxMACMode) |= 1<<8;
@@ -848,7 +848,7 @@ bcmpnp(Ether* edev)
 		bcmpci();
 		done = 1;
 	}
-	
+
 redux:
 	for(ctlr = bcmhead; ; ctlr = ctlr->next) {
 		if(ctlr == nil)
diff --git a/sys/src/kern/386/etherigbe.c b/sys/src/kern/amd64/etherigbe.c
similarity index 99%
rename from sys/src/kern/386/etherigbe.c
rename to sys/src/kern/amd64/etherigbe.c
index 5b158e9..f3316e0 100644
--- a/sys/src/kern/386/etherigbe.c
+++ b/sys/src/kern/amd64/etherigbe.c
@@ -1958,7 +1958,7 @@ igbepci(void)
 		case 0x08:
 		case 0x10:
 			break;
- 		}
+		}
 		ctlr = jehanne_malloc(sizeof(Ctlr));
 		if(ctlr == nil){
 			jehanne_print("igbe: can't allocate memory\n");
@@ -2038,4 +2038,3 @@ etherigbelink(void)
 	addethercard("i82543", igbepnp);
 	addethercard("igbe", igbepnp);
 }
-
diff --git a/sys/src/kern/386/etherm10g.c b/sys/src/kern/amd64/etherm10g.c
similarity index 100%
rename from sys/src/kern/386/etherm10g.c
rename to sys/src/kern/amd64/etherm10g.c
diff --git a/sys/src/kern/386/etherm10g2k.i b/sys/src/kern/amd64/etherm10g2k.i
similarity index 66%
rename from sys/src/kern/386/etherm10g2k.i
rename to sys/src/kern/amd64/etherm10g2k.i
index a12ed3d..cf0c0f3 100644
--- a/sys/src/kern/386/etherm10g2k.i
+++ b/sys/src/kern/amd64/etherm10g2k.i
@@ -1,11174 +1,11174 @@
 static char fw2k[] ={
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0xb8, 0x88, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
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-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
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-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
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-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
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-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
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-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
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 };
diff --git a/sys/src/kern/386/etherm10g4k.i b/sys/src/kern/amd64/etherm10g4k.i
similarity index 66%
rename from sys/src/kern/386/etherm10g4k.i
rename to sys/src/kern/amd64/etherm10g4k.i
index b755e81..611aab3 100644
--- a/sys/src/kern/386/etherm10g4k.i
+++ b/sys/src/kern/amd64/etherm10g4k.i
@@ -1,10871 +1,10871 @@
 static char fw4k[] ={
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+	0x80, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0xc0, 0x18, 0x00, 0x80, 0x00, 0x00,
+	0x80, 0x00, 0xd0, 0x00, 0x40, 0x00, 0x00, 0x00, 0x80, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x80, 0x00, 0xc0, 0x18, 0x00, 0x80, 0x00, 0x00, 0x80, 0x00, 0xd0, 0x00, 0x40, 0x00, 0x00, 0x00,
+	0x80, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0xc0, 0x18, 0x00, 0x80, 0x00, 0x00,
+	0x80, 0x00, 0xd0, 0x00, 0x40, 0x00, 0x00, 0x00, 0x80, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x80, 0x00, 0xc0, 0x18, 0x00, 0x80, 0x00, 0x00, 0x80, 0x00, 0xd0, 0x00, 0x40, 0x00, 0x00, 0x00,
+	0x80, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0xc0, 0x18, 0x00, 0x80, 0x00, 0x00,
+	0x80, 0x00, 0xd0, 0x00, 0x40, 0x00, 0x00, 0x00, 0x80, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x80, 0x00, 0xc0, 0x18, 0x00, 0x80, 0x00, 0x00, 0x80, 0x00, 0xd0, 0x00, 0x40, 0x00, 0x00, 0x00,
+	0x80, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0xc0, 0x18, 0x00, 0x80, 0x00, 0x00,
+	0x80, 0x00, 0xd0, 0x00, 0x40, 0x00, 0x00, 0x00, 0x80, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x80, 0x00, 0xc0, 0x18, 0x00, 0x80, 0x00, 0x00, 0x80, 0x00, 0xd0, 0x00, 0x40, 0x00, 0x00, 0x00,
+	0x80, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0xc0, 0x18, 0x00, 0x80, 0x00, 0x00,
+	0x80, 0x00, 0xd0, 0x00, 0x40, 0x00, 0x00, 0x00, 0x80, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x80, 0x00, 0xc0, 0x18, 0x00, 0x80, 0x00, 0x00, 0x80, 0x00, 0xd0, 0x00, 0x40, 0x00, 0x00, 0x00,
+	0x80, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0xc0, 0x18, 0x00, 0x80, 0x00, 0x00,
+	0x80, 0x00, 0xd0, 0x00, 0x40, 0x00, 0x00, 0x00, 0x80, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x80, 0x00, 0xc0, 0x18, 0x00, 0x80, 0x00, 0x00, 0x80, 0x00, 0xd0, 0x00, 0x40, 0x00, 0x00, 0x00,
+	0x80, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0xc0, 0x18, 0x00, 0x80, 0x00, 0x00,
+	0x80, 0x00, 0xd0, 0x00, 0x40, 0x00, 0x00, 0x00, 0x80, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x80, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x80, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x80, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x80, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x80, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x80, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x80, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x80, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x80, 0x00, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x80, 0x00, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x80, 0x00, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x80, 0x00, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x80, 0x00, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x80, 0x00, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x80, 0x00, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x80, 0x00, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x01, 0x01, 0x01, 0x00, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x01, 0x00, 0x01, 0x00, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x40, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x00, 0x14, 0xc1,
+	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfc, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x86, 0x14, 0x00, 0x00, 0x86, 0x20,
+	0x00, 0x00, 0x86, 0x2c, 0x00, 0x00, 0x86, 0x2f, 0x00, 0x00, 0x86, 0x3b, 0x00, 0x00, 0x86, 0x45,
+	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0xf8, 0xe0, 0x00, 0x00, 0xfa, 0x18,
+	0x00, 0x00, 0xf9, 0x7c, 0x00, 0x00, 0xfa, 0xb4, 0x00, 0x00, 0xfb, 0x48, 0x00, 0x00, 0xfd, 0xf0,
+	0x00, 0x00, 0xfc, 0x9c, 0x00, 0x00, 0xff, 0x44, 0xe0, 0x01, 0x0e, 0x70, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0xac, 0x45, 0x54, 0x48, 0x20, 0x31, 0x2e, 0x34, 0x2e, 0x32, 0x36, 0x20, 0x2d,
+	0x2d, 0x20, 0x32, 0x30, 0x30, 0x37, 0x2f, 0x31, 0x30, 0x2f, 0x33, 0x30, 0x20, 0x32, 0x33, 0x3a,
+	0x35, 0x39, 0x3a, 0x35, 0x37, 0x20, 0x6d, 0x79, 0x72, 0x69, 0x31, 0x30, 0x67, 0x65, 0x20, 0x66,
+	0x69, 0x72, 0x6d, 0x77, 0x61, 0x72, 0x65, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00,
+	0x00, 0x1d, 0xfe, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x00, 0x02, 0x97, 0xc0, 0x00, 0x00, 0x00, 0x28,
+	0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x58, 0x48, 0x00, 0x01, 0x55, 0x58, 0x00, 0x01, 0x50, 0xe0,
+	0x00, 0x01, 0x4b, 0x14, 0x00, 0x01, 0x43, 0xf4, 0x00, 0x01, 0x75, 0x80, 0x00, 0x01, 0x72, 0x78,
+	0x00, 0x01, 0x6d, 0xe8, 0x00, 0x01, 0x68, 0x04, 0x00, 0x01, 0x60, 0xcc, 0x00, 0x01, 0x75, 0x80,
+	0x00, 0x01, 0x72, 0x78, 0x00, 0x01, 0x6d, 0xe8, 0x00, 0x01, 0x68, 0x04, 0x00, 0x01, 0x7e, 0x18,
+	0x00, 0x01, 0x75, 0x80, 0x00, 0x01, 0x98, 0xe0, 0x00, 0x01, 0x94, 0x30, 0x00, 0x01, 0x8e, 0x30,
+	0x00, 0x01, 0x86, 0xbc, 0x00, 0x01, 0x75, 0x80, 0x00, 0x01, 0xa3, 0x80, 0x00, 0x01, 0x9e, 0xbc,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00,
 };
diff --git a/sys/src/kern/386/ethermii.c b/sys/src/kern/amd64/ethermii.c
similarity index 100%
rename from sys/src/kern/386/ethermii.c
rename to sys/src/kern/amd64/ethermii.c
diff --git a/sys/src/kern/386/ethermii.h b/sys/src/kern/amd64/ethermii.h
similarity index 100%
rename from sys/src/kern/386/ethermii.h
rename to sys/src/kern/amd64/ethermii.h
diff --git a/sys/src/kern/386/fis.c b/sys/src/kern/amd64/fis.c
similarity index 99%
rename from sys/src/kern/386/fis.c
rename to sys/src/kern/amd64/fis.c
index d845352..4e4d610 100644
--- a/sys/src/kern/386/fis.c
+++ b/sys/src/kern/amd64/fis.c
@@ -390,7 +390,7 @@ atapirwfis(Sfis *f, uint8_t *c, uint8_t *cdb, int cdblen, int ndata)
 		c[Ffeat] = 1;	/* dma */
 	else
 		c[Ffeat] = 0;	/* features (exp); */
-	c[Flba0] = 0;	
+	c[Flba0] = 0;
 	c[Flba8] = ndata;
 	c[Flba16] = ndata >> 8;
 	c[Fdev] = Ataobs;
diff --git a/sys/src/kern/386/fis.h b/sys/src/kern/amd64/fis.h
similarity index 100%
rename from sys/src/kern/386/fis.h
rename to sys/src/kern/amd64/fis.h
diff --git a/sys/src/kern/amd64/fns.h b/sys/src/kern/amd64/fns.h
index 9a2486f..1b1563e 100644
--- a/sys/src/kern/amd64/fns.h
+++ b/sys/src/kern/amd64/fns.h
@@ -31,7 +31,6 @@ void	mouseenable(void);
 int	mousecmd(int);
 
 void	aamloop(int);
-void		acpiinit(int);
 Dirtab*	addarchfile(char*, int,
 		    long(*)(Chan*,void*,long,int64_t),
 		    long(*)(Chan*,void*,long,int64_t));
@@ -47,36 +46,49 @@ uint64_t	asmalloc(uint64_t, uint64_t, int, int);
 void	asminit(void);
 void	asmmapinit(uint64_t, uint64_t, int);
 void 	asmmodinit(uint32_t, uint32_t, char*);
-void	cgaconsputs(char*, int);
-void	cgainit(void);
-void	cgapost(int);
+void	screen_init(void);
+uintptr_t cankaddr(uintptr_t pa);
 void	(*coherence)(void);
+void	cpuid(int, uint32_t regs[]);
+int	cpuidentify(void);
+void	cpuidprint(void);
 int		corecolor(int);
-uint32_t	cpuid(uint32_t, uint32_t, uint32_t[4]);
+void	(*cycles)(uint64_t*);
 int	dbgprint(char*, ...);
 void	delay(int);
+int	ecinit(int cmdport, int dataport);
+int	ecread(uint8_t addr);
+int	ecwrite(uint8_t addr, uint8_t val);
 #define	evenaddr(x)				/* x86 doesn't care */
 int	e820(void);
-int	fpudevprocio(Proc*, void*, int32_t, uintptr_t, int);
-void	fpuinit(void);
-void	fpunoted(void);
-void	fpunotify(Ureg*);
-void	fpuprocrestore(Proc*);
-void	fpuprocsave(Proc*);
-void	fpusysprocsetup(Proc*);
-void	fpusysrfork(Ureg*);
-void	fpusysrforkchild(Proc*, Proc*);
+void	fpclear(void);
+void	fpinit(void);
+void	fpoff(void);
+void	(*fprestore)(FPsave*);
+void	(*fpsave)(FPsave*);
+void	fpsserestore(FPsave*);
+void	fpssesave(FPsave*);
+void	fpprocfork(Proc *p);
+void	fpprocsetup(Proc* p);
 char*	getconf(char*);
+void	guesscpuhz(int);
 void	_halt(void);
 void	halt(void);
 void	hpetinit(uint32_t, uint32_t, uintmem, int);
-/*int	i8042auxcmd(int);
-int	i8042auxcmds(uint8_t*, int);
-void	i8042auxenable(void (*)(int, int));*/
-void	i8042systemreset(void);
-Uart*	i8250console(char*);
+int	i8042auxcmd(int);
+void	i8042auxenable(void (*)(int, int));
+void	i8042reset(void);
+void	i8250console(void);
 void*	i8250alloc(int, int, int);
 int64_t	i8254hz(uint32_t[2][4]);
+
+void	i8253enable(void);
+void	i8253init(void);
+void	i8253reset(void);
+uint64_t	i8253read(uint64_t*);
+void	i8253timerset(uint64_t);
+
+void	idle(void);
 void	idlehands(void);
 void	idthandlers(void);
 int	inb(int);
@@ -85,7 +97,7 @@ uint16_t	ins(int);
 void	inss(int, void*, int);
 uint32_t	inl(int);
 void	insl(int, void*, int);
-int	intrdisable(void*);
+int	intrdisable(int irq, void (*f)(Ureg *, void *), void *a, int tbdf, char *name);
 void*	intrenable(int, void (*)(Ureg*, void*), void*, int, char*);
 void	invlpg(uintptr_t va);
 void	iofree(int);
@@ -96,16 +108,20 @@ int	ioreserve(int, int, int, char*);
 int	iprint(char*, ...);
 int	isaconfig(char*, int, ISAConf*);
 int	isdmaok(void*, usize, int);
-void	keybenable(void);		// 386/i8042.c
-void	keybinit(void);			// 386/i8042.c
+void	keybenable(void);		// i8042.c
+void	keybinit(void);			// i8042.c
 void	kexit(Ureg*);
+KMap*	kmap(uintptr_t pa);
+void	kunmap(KMap*);
 #define	kmapinval()
 void	lfence(void);
 void	links(void);
+#define	lockgetpc(l) (l->pc)
 int	machdom(Mach*);
 void	machinit(void);
 void	mach0init(void);
 void	mapraminit(uint64_t, uint64_t);
+void	mathinit(void);
 void	memdebug(void);
 void	meminit(void);
 int		memcolor(uintmem addr, uintmem *sizep);
@@ -113,14 +129,18 @@ void	memmaprange(uintptr_t, uintmem, uintmem, PTE (*alloc)(usize), PTE);
 void	memreserve(uintmem, uintmem);
 void	mfence(void);
 void	mmudump(Proc*);
-void	mmuflushtlb(uint64_t);
+#define mmuflushtlb() cr3put(cr3get())
 void	mmuinit(void);
 #define	mmucachectl(pg, why)	USED(pg, why)	/* x86 doesn't need it */
 uint64_t	mmuphysaddr(uintptr_t);
-int	mmuwalk(uintptr_t, int, PTE**, uint64_t (*)(usize));
-int	multiboot(uint32_t, uint32_t, int);
+uintptr_t*	mmuwalk(uintptr_t* table, uintptr_t va, int level, int create);
+char*	mtrr(unsigned long, unsigned long, char *);
+void	mtrrclock(void);
+int	mtrrprint(char *, long);
+void	mtrrsync(void);
+int	multiboot(int);
+void	mwait(void*);
 uint32_t	mwait32(void*, uint32_t);
-uint64_t	mwait64(void*, uint64_t);
 void	ndnr(void);
 uint8_t	nvramread(int);
 void	nvramwrite(int, uint8_t);
@@ -131,6 +151,7 @@ void	outs(int, uint16_t);
 void	outss(int, void*, int);
 void	outl(int, uint32_t);
 void	outsl(int, void*, int);
+void	patwc(void *a, int n);
 void	pause(void);
 int	pciscan(int, Pcidev**);
 uint32_t	pcibarsize(Pcidev*, int);
@@ -156,7 +177,9 @@ void	pcisetmwi(Pcidev*);
 int	pcisetpms(Pcidev*, int);
 uintmem	pcixcfgspace(int);
 void*	pcixcfgaddr(Pcidev*, int);
+void	pmap(uintptr_t *pml4, uintptr_t pa, uintptr_t va, long size);
 void	printcpufreq(void);
+void*	rampage(void);
 int	screenprint(char*, ...);			/* debugging */
 void	sfence(void);
 void	spldone(void);
@@ -170,11 +193,15 @@ void*	sysexecregs(uintptr_t, uint32_t);
 uintptr_t	sysexecstack(uintptr_t, int);
 void	sysprocsetup(Proc*);
 void	tssrsp0(uint64_t);
+uint64_t	tscticks(uint64_t *hz);
 void	trapenable(int, void (*)(Ureg*, void*), void*, char*);
 void	trapinit(void);
+void	trapinit0(void);
 int	userureg(Ureg*);
-void*	vmap(uintmem, usize);
-void	vsvminit(int);
+uintptr_t	upaalloc(int size, int align);
+void		upafree(uintptr_t pa, int size);
+void		upareserve(uintptr_t pa, int size);
+void*	vmap(uintptr_t, usize);
 void	vunmap(void*, usize);
 
 extern Mreg cr0get(void);
@@ -186,13 +213,18 @@ extern Mreg cr4get(void);
 extern void cr4put(Mreg);
 extern void gdtget(void*);
 extern void gdtput(int, uint64_t, uint16_t);
+extern void lgdt(void*);
 extern void idtput(int, uint64_t);
-extern uint64_t rdmsr(uint32_t);
+extern void lidt(void*);
+extern int rdmsr(uint32_t reg, long* value);
 extern uint64_t rdtsc(void);
 extern void trput(uint64_t);
-extern void wrmsr(uint32_t, uint64_t);
+extern void wbinvd(void);
+extern int wrmsr(uint32_t, uint64_t);
 int	xaddb(void*);
 
+#define	userureg(ur)	(((ur)->cs & 3) == 3)
+
 extern int islo(void);
 extern void spldone(void);
 extern Mreg splhi(void);
@@ -222,8 +254,10 @@ void	sysrforkret(void);
 #define PTR2UINT(p)	((uintptr_t)(p))
 #define UINT2PTR(i)	((void*)(i))
 
-void*	KADDR(uintmem);
-uintptr_t	PADDR(void*);
+uintptr_t	mmu_physical_address(void*);
+void*		mmu_kernel_address(uintptr_t);
+#define	KADDR(a)	mmu_kernel_address(a)
+#define PADDR(a)	mmu_physical_address((void*)(a))
 
 #define BIOSSEG(a)	KADDR(((uint32_t)(a))<<4)
 
@@ -235,10 +269,13 @@ extern void millidelay(int);
 /*
  * i8259.c
  */
-extern int i8259init(int);
-extern int i8259irqdisable(int);
-extern int i8259irqenable(int);
+extern void i8259init(void);
+extern int i8259disable(int);
+extern int i8259enable(Vctl* v);
 extern int i8259isr(int);
+extern void i8259on(void);
+extern void i8259off(void);
+extern int i8259vecno(int irq);
 
 /*
  * sipi.c
@@ -250,6 +287,9 @@ void	basefree(void*, usize);
 void	physallocinit(void);
 void	uartpush(void);
 
+void	rdrandbuf(void*, uint32_t);
+
+
 /* horror */
 static inline void __clobber_callee_regs(void)
 {
diff --git a/sys/src/kern/amd64/fpu.c b/sys/src/kern/amd64/fpu.c
index c6a070b..57b8fd3 100644
--- a/sys/src/kern/amd64/fpu.c
+++ b/sys/src/kern/amd64/fpu.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2016 Giacomo Tesio <giacomo@tesio.it>
+ * Copyright (C) 2016-2017 Giacomo Tesio <giacomo@tesio.it>
  *
  * This file is part of the UCB release of Plan 9. It is subject to the license
  * terms in the LICENSE file found in the top-level directory of this
@@ -12,7 +12,7 @@
 /*
  * SIMD Floating Point.
  * Assembler support to get at the individual instructions
- * is in l64fpu.s.
+ * is in l64fpu.S.
  * There are opportunities to be lazier about saving and
  * restoring the state and allocating the storage needed.
  */
@@ -21,6 +21,7 @@
 #include "mem.h"
 #include "dat.h"
 #include "fns.h"
+#include "io.h"
 
 #include "amd64.h"
 #include "ureg.h"
@@ -87,368 +88,116 @@ extern void _fwait(void);
 extern void _ldmxcsr(uint32_t*);
 extern void _stts(void);
 
-int
-fpudevprocio(Proc* proc, void* a, int32_t n, uintptr_t offset, int write)
+void
+fpclear(void)
 {
-	uint8_t *p;
+	_clts();
+	_fnclex();
+	_stts();
+}
+
+void
+fpssesave(FPsave *fps)
+{
+	Fxsave *fx = (Fxsave*)ROUND(((uintptr_t)fps), FPalign);
+
+	_fxsave(fx);
+	_stts();
+	if(fx != (Fxsave*)fps)
+		memmove((Fxsave*)fps, fx, sizeof(Fxsave));
+}
+void
+fpsserestore(FPsave *fps)
+{
+	Fxsave *fx = (Fxsave*)ROUND(((uintptr_t)fps), FPalign);
+
+	if(fx != (Fxsave*)fps)
+		memmove(fx, (Fxsave*)fps, sizeof(Fxsave));
+	_clts();
+	_fxrstor(fx);
+}
+
+static char* mathmsg[] =
+{
+	nil,	/* handled below */
+	"denormalized operand",
+	"division by zero",
+	"numeric overflow",
+	"numeric underflow",
+	"precision loss",
+};
+
+static void
+mathnote(unsigned int status, uintptr_t pc)
+{
+	char *msg, note[ERRMAX];
+	int i;
 
 	/*
-	 * Called from procdevtab.read and procdevtab.write
-	 * allow user process access to the FPU registers.
-	 * This is the only FPU routine which is called directly
-	 * from the port code; it would be nice to have dynamic
-	 * creation of entries in the device file trees...
+	 * Some attention should probably be paid here to the
+	 * exception masks and error summary.
 	 */
-	if(offset >= sizeof(Fxsave))
-		return 0;
-	if((p = proc->FPU.fpusave) == nil)
-		return 0;
-	switch(write){
-	default:
-		if(offset+n > sizeof(Fxsave))
-			n = sizeof(Fxsave) - offset;
-		jehanne_memmove(p+offset, a, n);
-		break;
-	case 0:
-		if(offset+n > sizeof(Fxsave))
-			n = sizeof(Fxsave) - offset;
-		jehanne_memmove(a, p+offset, n);
+	msg = "unknown exception";
+	for(i = 1; i <= 5; i++){
+		if(!((1<<i) & status))
+			continue;
+		msg = mathmsg[i];
 		break;
 	}
-
-	return n;
-}
-
-void
-fpunotify(Ureg* u)
-{
-	/*
-	 * Called when a note is about to be delivered to a
-	 * user process, usually at the end of a system call.
-	 * Note handlers are not allowed to use the FPU so
-	 * the state is marked (after saving if necessary) and
-	 * checked in the Device Not Available handler.
-	 */
-	if(up->FPU.fpustate == Busy){
-		_fxsave(up->FPU.fpusave);
-		_stts();
-		up->FPU.fpustate = Idle;
-	}
-	up->FPU.fpustate |= Hold;
-}
-
-void
-fpunoted(void)
-{
-	/*
-	 * Called from sysnoted() via the machine-dependent
-	 * noted() routine.
-	 * Clear the flag set above in fpunotify().
-	 */
-	up->FPU.fpustate &= ~Hold;
-}
-
-void
-fpusysrfork(Ureg* u)
-{
-	/*
-	 * Called early in the non-interruptible path of
-	 * sysrfork() via the machine-dependent syscall() routine.
-	 * Save the state so that it can be easily copied
-	 * to the child process later.
-	 */
-	if(up->FPU.fpustate != Busy)
-		return;
-
-	_fxsave(up->FPU.fpusave);
-	_stts();
-	up->FPU.fpustate = Idle;
-}
-
-void
-fpusysrforkchild(Proc* child, Proc* parent)
-{
-	/*
-	 * Called later in sysrfork() via the machine-dependent
-	 * sysrforkchild() routine.
-	 * Copy the parent FPU state to the child.
-	 */
-	child->FPU.fpustate = parent->FPU.fpustate;
-	child->FPU.fpusave = (void*)((PTR2UINT(up->FPU.fxsave) + 15) & ~15);
-	if(child->FPU.fpustate == Init)
-		return;
-
-	jehanne_memmove(child->FPU.fpusave, parent->FPU.fpusave, sizeof(Fxsave));
-}
-
-void
-fpuprocsave(Proc* p)
-{
-	/*
-	 * Called from sched() and sleep() via the machine-dependent
-	 * procsave() routine.
-	 * About to go in to the scheduler.
-	 * If the process wasn't using the FPU
-	 * there's nothing to do.
-	 */
-	if(p->FPU.fpustate != Busy)
-		return;
-
-	/*
-	 * The process is dead so clear and disable the FPU
-	 * and set the state for whoever gets this proc struct
-	 * next.
-	 */
-	if(p->state == Moribund){
-		_clts();
-		_fnclex();
-		_stts();
-		p->FPU.fpustate = Init;
-		return;
-	}
-
-	/*
-	 * Save the FPU state without handling pending
-	 * unmasked exceptions and disable. Postnote() can't
-	 * be called here as sleep() already has up->rlock,
-	 * so the handling of pending exceptions is delayed
-	 * until the process runs again and generates a
-	 * Device Not Available exception fault to activate
-	 * the FPU.
-	 */
-	_fxsave(p->FPU.fpusave);
-	_stts();
-	p->FPU.fpustate = Idle;
-}
-
-void
-fpuprocrestore(Proc* p)
-{
-	/*
-	 * The process has been rescheduled and is about to run.
-	 * Nothing to do here right now. If the process tries to use
-	 * the FPU again it will cause a Device Not Available
-	 * exception and the state will then be restored.
-	 */
-	USED(p);
-}
-
-void
-fpusysprocsetup(Proc* p)
-{
-	/*
-	 * Disable the FPU.
-	 * Called from sysexec() via sysprocsetup() to
-	 * set the FPU for the new process.
-	 */
-	if(p->FPU.fpustate != Init){
-		_clts();
-		_fnclex();
-		_stts();
-		p->FPU.fpustate = Init;
-	}
-}
-
-void
-acfpusysprocsetup(Proc *p)
-{
-	if(p->FPU.fpustate == Init){
-		/* The FPU is initialized in the TC but we must initialize
-		 * it in the AC.
-		 */
-		p->FPU.fpustate = Idle;
-		fpusysprocsetup(p);
-	}
-}
-
-static char*
-fpunote(void)
-{
-	uint16_t fsw;
-	Fxsave *fpusave;
-	char *cm;
-
-	/*
-	 * The Sff bit is sticky, meaning it should be explicitly
-	 * cleared or there's no way to tell if the exception was an
-	 * invalid operation or a stack fault.
-	 */
-	fpusave = up->FPU.fpusave;
-	fsw = (fpusave->fsw & ~fpusave->fcw) & (Sff|P|U|O|Z|D|I);
-	if(fsw & I){
-		if(fsw & Sff){
-			if(fsw & C1)
-				cm = "Stack Overflow";
+	if(status & 0x01){
+		if(status & 0x40){
+			if(status & 0x200)
+				msg = "stack overflow";
 			else
-				cm = "Stack Underflow";
-		}
-		else
-			cm = "Invalid Operation";
+				msg = "stack underflow";
+		}else
+			msg = "invalid operation";
 	}
-	else if(fsw & D)
-		cm = "Denormal Operand";
-	else if(fsw & Z)
-		cm = "Divide-By-Zero";
-	else if(fsw & O)
-		cm = "Numeric Overflow";
-	else if(fsw & U)
-		cm = "Numeric Underflow";
-	else if(fsw & P)
-		cm = "Precision";
-	else
-		cm =  "Unknown";
-
-	jehanne_snprint(up->genbuf, sizeof(up->genbuf),
-		"sys: fp: %s Exception ipo=%#llux fsw=%#ux",
-		cm, fpusave->rip, fsw);
-	return up->genbuf;
+	snprint(note, sizeof note, "sys: fp: %s fppc=%#p status=0x%lux",
+		msg, pc, status);
+	postnote(up, 1, note, NDebug);
 }
 
-char*
-xfpuxf(Ureg* ureg, void* v)
+/*
+ *  math coprocessor error
+ */
+static void
+matherror(Ureg* _, void* __)
 {
-	uint32_t mxcsr;
-	Fxsave *fpusave;
-	char *cm;
-
-	/*
-	 * #XF - SIMD Floating Point Exception (Vector 18).
-	 */
-
 	/*
 	 * Save FPU state to check out the error.
 	 */
-	fpusave = up->FPU.fpusave;
-	_fxsave(fpusave);
-	_stts();
-	up->FPU.fpustate = Idle;
-
-	if(ureg->ip & KZERO)
-		panic("#MF: ip=%#p", ureg->ip);
-
-	/*
-	 * Notify the user process.
-	 * The path here is similar to the x87 path described
-	 * in fpupostnote above but without the fpupostnote()
-	 * call.
-	 */
-	mxcsr = fpusave->mxcsr;
-	if((mxcsr & (Im|I)) == I)
-		cm = "Invalid Operation";
-	else if((mxcsr & (Dm|D)) == D)
-		cm = "Denormal Operand";
-	else if((mxcsr & (Zm|Z)) == Z)
-		cm = "Divide-By-Zero";
-	else if((mxcsr & (Om|O)) == O)
-		cm = "Numeric Overflow";
-	else if((mxcsr & (Um|U)) == U)
-		cm = "Numeric Underflow";
-	else if((mxcsr & (Pm|P)) == P)
-		cm = "Precision";
-	else
-		cm =  "Unknown";
-
-	jehanne_snprint(up->genbuf, sizeof(up->genbuf),
-		"sys: fp: %s Exception mxcsr=%#ux", cm, mxcsr);
-	return up->genbuf;
+	fpsave(&up->fpsave);
+	up->fpstate = FPinactive;
+	mathnote(up->fpsave.fsw, up->fpsave.rip);
 }
 
-void
-fpuxf(Ureg *ureg, void *p)
+/*
+ *  SIMD error
+ */
+static void
+simderror(Ureg *ureg, void* _)
 {
-	char *n;
-
-	n = xfpuxf(ureg, p);
-	if(n != nil)
-		postnote(up, 1, n, NDebug);
+	fpsave(&up->fpsave);
+	up->fpstate = FPinactive;
+	mathnote(up->fpsave.mxcsr & 0x3f, ureg->ip);
 }
 
-char*
-acfpuxf(Ureg *ureg, void *p)
+/*
+ *  math coprocessor emulation fault
+ */
+static void
+mathemu(Ureg *ureg, void* _)
 {
-	return xfpuxf(ureg, p);
-}
+	unsigned int status, control;
 
-static char*
-xfpumf(Ureg* ureg, void* v)
-{
-	Fxsave *fpusave;
-
-	/*
-	 * #MF - x87 Floating Point Exception Pending (Vector 16).
-	 */
-
-	/*
-	 * Save FPU state to check out the error.
-	 */
-	fpusave = up->FPU.fpusave;
-	_fxsave(fpusave);
-	_stts();
-	up->FPU.fpustate = Idle;
-
-	if(ureg->ip & KZERO)
-		panic("#MF: ip=%#p rip=%#p", ureg->ip, fpusave->rip);
-
-	/*
-	 * Notify the user process.
-	 * The path here is
-	 *	call trap->fpumf->fpupostnote->postnote
-	 *	return ->fpupostnote->fpumf->trap
-	 *	call notify->fpunotify
-	 *	return ->notify
-	 * then either
-	 *	call pexit
-	 * or
-	 *	return ->trap
-	 *	return ->user note handler
-	 */
-	return fpunote();
-}
-
-void
-fpumf(Ureg *ureg, void *p)
-{
-	char *n;
-
-	n = xfpumf(ureg, p);
-	if(n != nil)
-		postnote(up, 1, n, NDebug);
-}
-
-char*
-acfpumf(Ureg *ureg, void *p)
-{
-	return xfpumf(ureg, p);
-}
-
-static char*
-xfpunm(Ureg* ureg, void* v)
-{
-	Fxsave *fpusave;
-
-	/*
-	 * #NM - Device Not Available (Vector 7).
-	 */
-	if(up == nil)
-		panic("#NM: fpu in kernel: ip %#p\n", ureg->ip);
-
-	/*
-	 * Someone tried to use the FPU in a note handler.
-	 * That's a no-no.
-	 */
-	if(up->FPU.fpustate & Hold)
-		return "sys: floating point in note handler";
-
-	if(ureg->ip & KZERO)
-		panic("#NM: proc %d %s state %d ip %#p\n",
-			up->pid, up->text, up->FPU.fpustate, ureg->ip);
-
-	switch(up->FPU.fpustate){
-	case Busy:
-	default:
-		panic("#NM: state %d ip %#p\n", up->FPU.fpustate, ureg->ip);
-		break;
-	case Init:
+	if(up->fpstate & FPillegal){
+		/* someone did floating point in a note handler */
+		postnote(up, 1, "sys: floating point in note handler", NDebug);
+		return;
+	}
+	switch(up->fpstate){
+	case FPinit:
 		/*
 		 * A process tries to use the FPU for the
 		 * first time and generates a 'device not available'
@@ -460,87 +209,78 @@ xfpunm(Ureg* ureg, void* v)
 		_clts();
 		_fninit();
 		_fwait();
-		_fldcw(&m->FPU.fcw);
-		_ldmxcsr(&m->FPU.mxcsr);
-		up->FPU.fpusave = (void*)((PTR2UINT(up->FPU.fxsave) + 15) & ~15);
-		up->FPU.fpustate = Busy;
+		up->fpsave.fcw = 0x0232;
+		_fldcw(&up->fpsave.fcw);
+		up->fpsave.mxcsr = 0x1900;
+		_ldmxcsr(&up->fpsave.mxcsr);
+		up->fpstate = FPactive;
 		break;
-	case Idle:
+	case FPinactive:
 		/*
 		 * Before restoring the state, check for any pending
 		 * exceptions, there's no way to restore the state without
 		 * generating an unmasked exception.
+		 * More attention should probably be paid here to the
+		 * exception masks and error summary.
 		 */
-		fpusave = up->FPU.fpusave;
-		if((fpusave->fsw & ~fpusave->fcw) & (Sff|P|U|O|Z|D|I))
-			return fpunote();
-
-		/*
-		 * Sff is sticky.
-		 */
-		fpusave->fcw &= ~Sff;
-		_clts();
-		_fxrstor(fpusave);
-		up->FPU.fpustate = Busy;
+		status = up->fpsave.fsw;
+		control = up->fpsave.fcw;
+		if((status & ~control) & 0x07F){
+			mathnote(status, up->fpsave.rip);
+			break;
+		}
+		fprestore(&up->fpsave);
+		up->fpstate = FPactive;
+		break;
+	case FPactive:
+		panic("math emu pid %ld %s pc %#p",
+			up->pid, up->text, ureg->ip);
 		break;
 	}
-	return nil;
 }
 
 void
-fpunm(Ureg *ureg, void *p)
+fpprocsetup(Proc* p)
 {
-	char *n;
-
-	n = xfpunm(ureg, p);
-	if(n != nil)
-		postnote(up, 1, n, NDebug);
-}
-
-char*
-acfpunm(Ureg *ureg, void *p)
-{
-	return xfpunm(ureg, p);
-}
-
-void
-fpuinit(void)
-{
-	uint64_t r;
-	Fxsave *fxsave;
-	uint8_t buf[sizeof(Fxsave)+15];
-
-	/*
-	 * It's assumed there is an integrated FPU, so Em is cleared;
-	 */
-	r = cr0get();
-	r &= ~(Ts|Em);
-	r |= Ne|Mp;
-	cr0put(r);
-
-	r = cr4get();
-	r |= Osxmmexcpt|Osfxsr;
-	cr4put(r);
-
-	_fninit();
-	fxsave = (Fxsave*)((PTR2UINT(buf) + 15) & ~15);
-	jehanne_memset(fxsave, 0, sizeof(Fxsave));
-	_fxsave(fxsave);
-	m->FPU.fcw = RCn|PCd|P|U|D;
-	if(fxsave->mxcsrmask == 0)
-		m->FPU.mxcsrmask = 0x0000FFBF;
-	else
-		m->FPU.mxcsrmask = fxsave->mxcsrmask;
-	m->FPU.mxcsr = (Rn|Pm|Um|Dm) & m->FPU.mxcsrmask;
+	p->fpstate = FPinit;
 	_stts();
-
-	if(m->machno != 0)
-		return;
-
-	/*
-	 * Set up the exception handlers.
-	 */
-	trapenable(IdtNM, fpunm, 0, "#NM");
-	trapenable(IdtMF, fpumf, 0, "#MF");
-	trapenable(IdtXF, fpuxf, 0, "#XF");
+}
+
+void
+fpprocfork(Proc *p)
+{
+	int s;
+
+	/* save floating point state */
+	s = splhi();
+	switch(up->fpstate & ~FPillegal){
+	case FPactive:
+		fpsave(&up->fpsave);
+		up->fpstate = FPinactive;
+	case FPinactive:
+		p->fpsave = up->fpsave;
+		p->fpstate = FPinactive;
+	}
+	splx(s);
+
+}
+
+/*
+ *  math coprocessor segment overrun
+ */
+static void
+mathover(Ureg* _, void* __)
+{
+	pexit("math overrun", 0);
+}
+
+void
+mathinit(void)
+{
+	trapenable(VectorCERR, matherror, 0, "matherror");
+	if(X86FAMILY(m->cpuidax) == 3)
+		intrenable(IrqIRQ13, matherror, 0, BUSUNKNOWN, "matherror");
+	trapenable(VectorCNA, mathemu, 0, "mathemu");
+	trapenable(VectorCSO, mathover, 0, "mathover");
+	trapenable(VectorSIMD, simderror, 0, "simderror");
 }
diff --git a/sys/src/kern/amd64/i8253.c b/sys/src/kern/amd64/i8253.c
new file mode 100644
index 0000000..8699bb4
--- /dev/null
+++ b/sys/src/kern/amd64/i8253.c
@@ -0,0 +1,317 @@
+#include "u.h"
+#include "../port/lib.h"
+#include "mem.h"
+#include "dat.h"
+#include "fns.h"
+#include "io.h"
+
+/*
+ *  8253 timer
+ */
+enum
+{
+	T0cntr=	0x40,		/* counter ports */
+	T1cntr=	0x41,		/* ... */
+	T2cntr=	0x42,		/* ... */
+	Tmode=	0x43,		/* mode port (control word register) */
+	T2ctl=	0x61,		/* counter 2 control port */
+
+	/* commands */
+	Latch0=	0x00,		/* latch counter 0's value */
+	Load0l=	0x10,		/* load counter 0's lsb */
+	Load0m=	0x20,		/* load counter 0's msb */
+	Load0=	0x30,		/* load counter 0 with 2 bytes */
+
+	Latch1=	0x40,		/* latch counter 1's value */
+	Load1l=	0x50,		/* load counter 1's lsb */
+	Load1m=	0x60,		/* load counter 1's msb */
+	Load1=	0x70,		/* load counter 1 with 2 bytes */
+
+	Latch2=	0x80,		/* latch counter 2's value */
+	Load2l=	0x90,		/* load counter 2's lsb */
+	Load2m=	0xa0,		/* load counter 2's msb */
+	Load2=	0xb0,		/* load counter 2 with 2 bytes */
+
+	/* 8254 read-back command: everything > pc-at has an 8254 */
+	Rdback=	0xc0,		/* readback counters & status */
+	Rdnstat=0x10,		/* don't read status */
+	Rdncnt=	0x20,		/* don't read counter value */
+	Rd0cntr=0x02,		/* read back for which counter */
+	Rd1cntr=0x04,
+	Rd2cntr=0x08,
+
+	/* modes */
+	ModeMsk=0xe,
+	Square=	0x6,		/* periodic square wave */
+	Trigger=0x0,		/* interrupt on terminal count */
+	Sstrobe=0x8,		/* software triggered strobe */
+
+	/* T2ctl bits */
+	T2gate=	(1<<0),		/* enable T2 counting */
+	T2spkr=	(1<<1),		/* connect T2 out to speaker */
+	T2out=	(1<<5),		/* output of T2 */
+
+	Freq=	1193182,	/* Real clock frequency */
+	Tickshift=8,		/* extra accuracy */
+	MaxPeriod=Freq/HZ,
+	MinPeriod=Freq/(100*HZ),
+};
+
+typedef struct I8253 I8253;
+struct I8253
+{
+	Lock;
+	uint32_t	period;		/* current clock period */
+
+	uint16_t	last;		/* last value of clock 1 */
+	uint64_t	ticks;		/* cumulative ticks of counter 1 */
+
+	uint32_t	periodset;
+};
+static I8253 i8253;
+
+void
+i8253reset(void)
+{
+	int loops, x;
+
+	ilock(&i8253);
+
+	i8253.last = 0;
+	i8253.period = Freq/HZ;
+
+	/*
+	 *  enable a 1/HZ interrupt for providing scheduling interrupts
+	 */
+	outb(Tmode, Load0|Square);
+	outb(T0cntr, (Freq/HZ));	/* low byte */
+	outb(T0cntr, (Freq/HZ)>>8);	/* high byte */
+
+	/*
+	 *  enable a longer period counter to use as a clock
+	 */
+	outb(Tmode, Load2|Square);
+	outb(T2cntr, 0);		/* low byte */
+	outb(T2cntr, 0);		/* high byte */
+	x = inb(T2ctl);
+	x |= T2gate;
+	outb(T2ctl, x);
+
+	/*
+	 * Introduce a little delay to make sure the count is
+	 * latched and the timer is counting down; with a fast
+	 * enough processor this may not be the case.
+	 * The i8254 (which this probably is) has a read-back
+	 * command which can be used to make sure the counting
+	 * register has been written into the counting element.
+	 */
+	x = (Freq/HZ);
+	for(loops = 0; loops < 100000 && x >= (Freq/HZ); loops++){
+		outb(Tmode, Latch0);
+		x = inb(T0cntr);
+		x |= inb(T0cntr)<<8;
+	}
+
+	iunlock(&i8253);
+}
+
+void
+i8253init(void)
+{
+	ioalloc(T0cntr, 4, 0, "i8253");
+	ioalloc(T2ctl, 1, 0, "i8253.cntr2ctl");
+
+	i8253reset();
+}
+
+void
+guesscpuhz(int aalcycles)
+{
+	int loops, x, y;
+	uint64_t a, b, cpufreq;
+
+	if(m->machno != 0){
+		m->cpuhz = MACHP(0)->cpuhz;
+		m->cpumhz = MACHP(0)->cpumhz;
+		m->loopconst = MACHP(0)->loopconst;
+		return;
+	}
+
+	ilock(&i8253);
+	for(loops = 1000;;loops += 1000) {
+		/*
+		 *  measure time for the loop
+		 *
+		 *			MOVL	loops,CX
+		 *	aaml1:	 	AAM
+		 *			LOOP	aaml1
+		 *
+		 *  the time for the loop should be independent of external
+		 *  cache and memory system since it fits in the execution
+		 *  prefetch buffer.
+		 *
+		 */
+		outb(Tmode, Latch2);
+		cycles(&a);
+		x = inb(T2cntr);
+		x |= inb(T2cntr)<<8;
+		aamloop(loops);
+		outb(Tmode, Latch2);
+		cycles(&b);
+		y = inb(T2cntr);
+		y |= inb(T2cntr)<<8;
+
+		x -= y;
+		if(x < 0)
+			x += 0x10000;
+
+		if(x >= MaxPeriod || loops >= 1000000)
+			break;
+	}
+	iunlock(&i8253);
+
+	/* avoid division by zero on vmware 7 */
+	if(x == 0)
+		x = 1;
+
+	/*
+	 *  figure out clock frequency and a loop multiplier for delay().
+	 *  n.b. counter goes up by 2*Freq
+	 */
+	cpufreq = (long)loops*((aalcycles*2*Freq)/x);
+	m->loopconst = (cpufreq/1000)/aalcycles;	/* AAM+LOOP's for 1 ms */
+
+	/* a == b means virtualbox has confused us */
+	if(m->havetsc && b > a){
+		b -= a;
+		b *= 2*Freq;
+		b /= x;
+		m->cyclefreq = b;
+		cpufreq = b;
+	}
+	m->cpuhz = cpufreq;
+
+	/*
+	 *  round to the nearest megahz
+	 */
+	m->cpumhz = (cpufreq+500000)/1000000L;
+	if(m->cpumhz == 0)
+		m->cpumhz = 1;
+}
+
+void
+i8253timerset(uint64_t next)
+{
+	int period;
+	uint32_t want;
+	uint32_t now;
+
+	want = next>>Tickshift;
+	now = i8253.ticks;	/* assuming whomever called us just did fastticks() */
+
+	period = want - now;
+	if(period < MinPeriod)
+		period = MinPeriod;
+	else if(period > MaxPeriod)
+		period = MaxPeriod;
+
+	/* hysteresis */
+	if(i8253.period != period){
+		ilock(&i8253);
+		/* load new value */
+		outb(Tmode, Load0|Square);
+		outb(T0cntr, period);		/* low byte */
+		outb(T0cntr, period >> 8);	/* high byte */
+
+		/* remember period */
+		i8253.period = period;
+		i8253.periodset++;
+		iunlock(&i8253);
+	}
+}
+
+static void
+i8253clock(Ureg* ureg, void* _)
+{
+	timerintr(ureg, 0);
+}
+
+void
+i8253enable(void)
+{
+	intrenable(IrqCLOCK, i8253clock, 0, BUSUNKNOWN, "clock");
+}
+
+/*
+ *  return the total ticks of counter 2.  We shift by
+ *  8 to give timesync more wriggle room for interpretation
+ *  of the frequency
+ */
+uint64_t
+i8253read(uint64_t *hz)
+{
+	uint16_t y, x;
+	uint64_t ticks;
+
+	if(hz)
+		*hz = Freq<<Tickshift;
+
+	ilock(&i8253);
+	outb(Tmode, Latch2);
+	y = inb(T2cntr);
+	y |= inb(T2cntr)<<8;
+
+	if(y < i8253.last)
+		x = i8253.last - y;
+	else {
+		x = i8253.last + (0x10000 - y);
+		if (x > 3*MaxPeriod) {
+			outb(Tmode, Load2|Square);
+			outb(T2cntr, 0);		/* low byte */
+			outb(T2cntr, 0);		/* high byte */
+			y = 0xFFFF;
+			x = i8253.period;
+		}
+	}
+	i8253.last = y;
+	i8253.ticks += x>>1;
+	ticks = i8253.ticks;
+	iunlock(&i8253);
+
+	return ticks<<Tickshift;
+}
+
+void
+delay(int millisecs)
+{
+	millisecs *= m->loopconst;
+	if(millisecs <= 0)
+		millisecs = 1;
+	aamloop(millisecs);
+}
+
+void
+microdelay(int microsecs)
+{
+	microsecs *= m->loopconst;
+	microsecs /= 1000;
+	if(microsecs <= 0)
+		microsecs = 1;
+	aamloop(microsecs);
+}
+
+/*
+ *  performance measurement ticks.  must be low overhead.
+ *  doesn't have to count over a second.
+ */
+uint64_t
+perfticks(void)
+{
+	uint64_t x;
+
+	if(m->havetsc)
+		cycles(&x);
+	else
+		x = 0;
+	return x;
+}
diff --git a/sys/src/kern/amd64/i8259.c b/sys/src/kern/amd64/i8259.c
index 39a1b14..619e054 100644
--- a/sys/src/kern/amd64/i8259.c
+++ b/sys/src/kern/amd64/i8259.c
@@ -3,131 +3,102 @@
 #include "mem.h"
 #include "dat.h"
 #include "fns.h"
-
 #include "io.h"
 
 /*
- * 8259 Interrupt Controller and compatibles.
+ *  8259 interrupt controllers
  */
-enum {					/* I/O ports */
-	Cntrl1		= 0x20,
-	Cntrl2		= 0xa0,
+enum
+{
+	Int0ctl=	0x20,		/* control port (ICW1, OCW2, OCW3) */
+	Int0aux=	0x21,		/* everything else (ICW2, ICW3, ICW4, OCW1) */
+	Int1ctl=	0xA0,		/* control port */
+	Int1aux=	0xA1,		/* everything else (ICW2, ICW3, ICW4, OCW1) */
 
-	Icw1		= 0,		/* Initialisation Command Word 1 */
-	Icw2		= 1,
-	Icw3		= 1,
-	Icw4		= 1,
+	Icw1=		0x10,		/* select bit in ctl register */
+	Ocw2=		0x00,
+	Ocw3=		0x08,
 
-	Ocw1		= 1,		/* Operational Control Word 1 */
-	Ocw2		= 0,
-	Ocw3		= 0,
+	EOI=		0x20,		/* non-specific end of interrupt */
 
-	Imr		= Ocw1,		/* Interrupt Mask Register */
-	Isr		= Ocw3,		/* In-Service Register */
-	Irr		= Ocw3,		/* Interrupt Request Register */
-
-	Elcr1		= 0x4d0,	/* Edge/Level Control Register */
-	Elcr2		= 0x4d1,
-};
-
-enum {					/* Icw1 */
-	Ic4		= 0x01,		/* there will be an Icw4 */
-	Icw1sel		= 0x10,		/* Icw/Ocw select */
-};
-
-enum {					/* Icw3 */
-	Cascaded	= 0x04,		/* Cntrl1 - Cascaded Mode Enable */
-	SlaveIRQ2	= 0x02,		/* Cntrl2 - Slave Identification Code */
-};
-
-enum {					/* Icw4 */
-	Microprocessor	= 0x01,		/* 80x86-based system */
-};
-
-enum {					/* Ocw2 */
-	Ocw2sel		= 0x00,		/* Ocw2 select */
-	Eoi		= 0x20,		/* Non-spcific EOI command */
-};
-
-enum {					/* Ocw3 */
-	Irrread		= 0x02,		/* Read IRQ register */
-	Isrread		= 0x03,		/* Read IS register */
-	Ocw3sel		= 0x08,		/* Ocw3 select */
+	Elcr1=		0x4D0,		/* Edge/Level Triggered Register */
+	Elcr2=		0x4D1,
 };
 
 static Lock i8259lock;
-static int i8259mask = ~0;		/* mask of disabled interrupts */
-static int i8259elcr;			/* mask of level interrupts */
+static int i8259mask = 0xFFFF;		/* disabled interrupts */
+int i8259elcr;				/* mask of level-triggered interrupts */
 
-int
-i8259init(int vectorbase)
+void
+i8259init(void)
 {
-	int elcr;
-
-	vectorbase &= ~0x07;
+	int x;
 
+	ioalloc(Int0ctl, 2, 0, "i8259.0");
+	ioalloc(Int1ctl, 2, 0, "i8259.1");
 	ilock(&i8259lock);
 
 	/*
-	 * Boilerplate to initialise the pair of 8259 controllers,
-	 * see one of the Intel bridge datasheets for details,
-	 * e.g. 82371AB (PIIX4). The default settings are 80x86 mode,
-	 * edge-sensitive detection, normal EOI, non-buffered and
-	 * cascade mode. Cntrl1 is connected as the master and Cntrl2
-	 * as the slave; IRQ2 is used to cascade the two controllers.
+	 *  Set up the first 8259 interrupt processor.
+	 *  Make 8259 interrupts start at CPU vector VectorPIC.
+	 *  Set the 8259 as master with edge triggered
+	 *  input with fully nested interrupts.
 	 */
-	outb(Cntrl1+Icw1, Icw1sel|Ic4);
-	outb(Cntrl1+Icw2, vectorbase);
-	outb(Cntrl1+Icw3, Cascaded);
-	outb(Cntrl1+Icw4, Microprocessor);
-
-	outb(Cntrl2+Icw1, Icw1sel|Ic4);
-	outb(Cntrl2+Icw2, vectorbase+8);
-	outb(Cntrl2+Icw3, SlaveIRQ2);
-	outb(Cntrl2+Icw4, Microprocessor);
+	outb(Int0ctl, (1<<4)|(0<<3)|(1<<0));	/* ICW1 - master, edge triggered,
+						   ICW4 will be sent */
+	outb(Int0aux, VectorPIC);		/* ICW2 - interrupt vector offset */
+	outb(Int0aux, 0x04);			/* ICW3 - have slave on level 2 */
+	outb(Int0aux, 0x01);			/* ICW4 - 8086 mode, not buffered */
 
 	/*
-	 * Set the interrupt masks, allowing interrupts
-	 * to pass from Cntrl2 to Cntrl1 on IRQ2.
+	 *  Set up the second 8259 interrupt processor.
+	 *  Make 8259 interrupts start at CPU vector VectorPIC+8.
+	 *  Set the 8259 as slave with edge triggered
+	 *  input with fully nested interrupts.
 	 */
-	i8259mask &= ~(1<<2);
-	outb(Cntrl2+Imr, (i8259mask>>8) & 0xff);
-	outb(Cntrl1+Imr, i8259mask & 0xff);
-
-	outb(Cntrl1+Ocw2, Ocw2sel|Eoi);
-	outb(Cntrl2+Ocw2, Ocw2sel|Eoi);
+	outb(Int1ctl, (1<<4)|(0<<3)|(1<<0));	/* ICW1 - master, edge triggered,
+						   ICW4 will be sent */
+	outb(Int1aux, VectorPIC+8);		/* ICW2 - interrupt vector offset */
+	outb(Int1aux, 0x02);			/* ICW3 - I am a slave on level 2 */
+	outb(Int1aux, 0x01);			/* ICW4 - 8086 mode, not buffered */
+	outb(Int1aux, (i8259mask>>8) & 0xFF);
 
 	/*
-	 * Set Ocw3 to return the ISR when read for i8259isr()
-	 * (after initialisation status read is set to return the IRR).
+	 *  pass #2 8259 interrupts to #1
+	 */
+	i8259mask &= ~0x04;
+	outb(Int0aux, i8259mask & 0xFF);
+
+	/*
+	 * Set Ocw3 to return the ISR when ctl read.
+	 * After initialisation status read is set to IRR.
 	 * Read IRR first to possibly deassert an outstanding
 	 * interrupt.
 	 */
-	inb(Cntrl1+Irr);
-	outb(Cntrl1+Ocw3, Ocw3sel|Isrread);
-	inb(Cntrl2+Irr);
-	outb(Cntrl2+Ocw3, Ocw3sel|Isrread);
+	inb(Int0ctl);
+	outb(Int0ctl, Ocw3|0x03);
+	inb(Int1ctl);
+	outb(Int1ctl, Ocw3|0x03);
 
 	/*
-	 * Check for Edge/Level Control register.
+	 * Check for Edge/Level register.
 	 * This check may not work for all chipsets.
 	 * First try a non-intrusive test - the bits for
 	 * IRQs 13, 8, 2, 1 and 0 must be edge (0). If
 	 * that's OK try a R/W test.
 	 */
-	elcr = (inb(Elcr2)<<8)|inb(Elcr1);
-	if(!(elcr & 0x2107)){
+	x = (inb(Elcr2)<<8)|inb(Elcr1);
+	if(!(x & 0x2107)){
 		outb(Elcr1, 0);
 		if(inb(Elcr1) == 0){
 			outb(Elcr1, 0x20);
 			if(inb(Elcr1) == 0x20)
-				i8259elcr = elcr;
-			outb(Elcr1, elcr & 0xff);
+				i8259elcr = x;
+			outb(Elcr1, x & 0xFF);
+			print("ELCR: %4.4uX\n", i8259elcr);
 		}
 	}
 	iunlock(&i8259lock);
-
-	return vectorbase;
 }
 
 int
@@ -135,25 +106,108 @@ i8259isr(int vno)
 {
 	int irq, isr;
 
-	if(vno < IdtPIC || vno > IdtPIC+15)
+	if(vno < VectorPIC || vno > VectorPIC+MaxIrqPIC)
 		return 0;
-	irq = vno-IdtPIC;
+	irq = vno-VectorPIC;
 
 	/*
-	 * Collect the interrupt status,
-	 * acknowledge the interrupt and return whether
-	 * the acknowledged interrupt was the correct
-	 * one (this could be better but it's not really
-	 * used).
+	 *  tell the 8259 that we're done with the
+	 *  highest level interrupt (interrupts are still
+	 *  off at this point)
 	 */
 	ilock(&i8259lock);
-	isr = inb(Cntrl1+Isr);
-	outb(Cntrl1+Ocw2, Ocw2sel|Eoi);
+	isr = inb(Int0ctl);
+	outb(Int0ctl, EOI);
 	if(irq >= 8){
-		isr |= inb(Cntrl2+Isr)<<8;
-		outb(Cntrl2+Ocw2, Ocw2sel|Eoi);
+		isr |= inb(Int1ctl)<<8;
+		outb(Int1ctl, EOI);
 	}
 	iunlock(&i8259lock);
 
 	return isr & (1<<irq);
 }
+
+int
+i8259enable(Vctl* v)
+{
+	int irq, irqbit;
+
+	/*
+	 * Given an IRQ, enable the corresponding interrupt in the i8259
+	 * and return the vector to be used. The i8259 is set to use a fixed
+	 * range of vectors starting at VectorPIC.
+	 */
+	irq = v->irq;
+	if(irq < 0 || irq > MaxIrqPIC){
+		print("i8259enable: irq %d out of range\n", irq);
+		return -1;
+	}
+	irqbit = 1<<irq;
+
+	ilock(&i8259lock);
+	if(!(i8259mask & irqbit) && !(i8259elcr & irqbit)){
+		print("i8259enable: irq %d shared but not level\n", irq);
+		iunlock(&i8259lock);
+		return -1;
+	}
+	i8259mask &= ~irqbit;
+	if(irq < 8)
+		outb(Int0aux, i8259mask & 0xFF);
+	else
+		outb(Int1aux, (i8259mask>>8) & 0xFF);
+
+	if(i8259elcr & irqbit)
+		v->eoi = i8259isr;
+	else
+		v->isr = i8259isr;
+	iunlock(&i8259lock);
+
+	return VectorPIC+irq;
+}
+
+int
+i8259vecno(int irq)
+{
+	return VectorPIC+irq;
+}
+
+int
+i8259disable(int irq)
+{
+	int irqbit;
+
+	/*
+	 * Given an IRQ, disable the corresponding interrupt
+	 * in the 8259.
+	 */
+	if(irq < 0 || irq > MaxIrqPIC){
+		print("i8259disable: irq %d out of range\n", irq);
+		return -1;
+	}
+	irqbit = 1<<irq;
+
+	ilock(&i8259lock);
+	if(!(i8259mask & irqbit)){
+		i8259mask |= irqbit;
+		if(irq < 8)
+			outb(Int0aux, i8259mask & 0xFF);
+		else
+			outb(Int1aux, (i8259mask>>8) & 0xFF);
+	}
+	iunlock(&i8259lock);
+	return 0;
+}
+
+void
+i8259on(void)
+{
+	outb(Int0aux, i8259mask&0xFF);
+	outb(Int1aux, (i8259mask>>8)&0xFF);
+}
+
+void
+i8259off(void)
+{
+	outb(Int0aux, 0xFF);
+	outb(Int1aux, 0xFF);
+}
diff --git a/sys/src/kern/amd64/io.h b/sys/src/kern/amd64/io.h
index 2f1df74..2fe703b 100644
--- a/sys/src/kern/amd64/io.h
+++ b/sys/src/kern/amd64/io.h
@@ -7,6 +7,11 @@
  * in the LICENSE file.
  */
 
+#define X86STEPPING(x)	((x) & 0x0F)
+/* incorporates extended-model and -family bits */
+#define X86MODEL(x)	((((x)>>4) & 0x0F) | (((x)>>16) & 0x0F)<<4)
+#define X86FAMILY(x)	((((x)>>8) & 0x0F) | (((x)>>20) & 0xFF)<<4)
+
 enum {
 	VectorNMI	= 2,		/* non-maskable interrupt */
 	VectorBPT	= 3,		/* breakpoint */
@@ -14,9 +19,14 @@ enum {
 	VectorCNA	= 7,		/* coprocessor not available */
 	Vector2F	= 8,		/* double fault */
 	VectorCSO	= 9,		/* coprocessor segment overrun */
+	VectorSNP	= 11,		/* segment not present */
+	VectorGPF	= 13,		/* general protection fault */
 	VectorPF	= 14,		/* page fault */
 	Vector15	= 15,		/* reserved */
 	VectorCERR	= 16,		/* coprocessor error */
+	VectorAC	= 17,		/* alignment check */
+	VectorMC	= 18,		/* machine check */
+	VectorSIMD	= 19,		/* simd error */
 
 	VectorPIC	= 32,		/* external i8259 interrupts */
 	IrqCLOCK	= 0,
@@ -33,13 +43,13 @@ enum {
 	IrqATA1		= 15,
 	MaxIrqPIC	= 15,
 
-	VectorLAPIC	= VectorPIC+16,	/* local APIC interrupts */
-	IrqLINT0	= VectorLAPIC+0,
+	VectorLAPIC	= VectorPIC+16,		/* local APIC interrupts */
+	IrqLINT0	= VectorLAPIC+0,	/* LINT[01] must be offsets 0 and 1 */
 	IrqLINT1	= VectorLAPIC+1,
 	IrqTIMER	= VectorLAPIC+2,
 	IrqERROR	= VectorLAPIC+3,
 	IrqPCINT	= VectorLAPIC+4,
-	IrqSPURIOUS	= VectorLAPIC+15,
+	IrqSPURIOUS	= VectorLAPIC+15,	/* must have bits [3-0] == 0x0F */
 	MaxIrqLAPIC	= VectorLAPIC+15,
 
 	VectorSYSCALL	= 64,
@@ -69,20 +79,15 @@ enum {
 typedef struct Vctl {
 	Vctl*	next;			/* handlers on this vector */
 
-	int	isintr;			/* interrupt or fault/trap */
-	int	affinity;			/* processor affinity (-1 for none) */
-
-	int	irq;
-	void	(*f)(Ureg*, void*);	/* handler to call */
-	void*	a;			/* argument to call it with */
-	int	tbdf;
 	char	name[KNAMELEN];		/* of driver */
-	char	*type;
-
+	int	isintr;			/* interrupt or fault/trap */
+	int	irq;
+	int	tbdf;
 	int	(*isr)(int);		/* get isr bit for this irq */
 	int	(*eoi)(int);		/* eoi */
-	int	(*mask)(Vctl*, int);	/* interrupt enable returns masked vector */
-	int	vno;
+
+	void	(*f)(Ureg*, void*);	/* handler to call */
+	void*	a;			/* argument to call it with */
 } Vctl;
 
 enum {
@@ -139,8 +144,7 @@ enum {					/* type 0 and type 1 pre-defined header */
 	PciBAR0		= 0x10,		/* base address */
 	PciBAR1		= 0x14,
 
-	PciCP		= 0x34,		/* capabilities pointer */
-
+	PciCAP		= 0x34,		/* capabilities pointer */
 	PciINTL		= 0x3C,		/* interrupt line */
 	PciINTP		= 0x3D,		/* interrupt pin */
 };
@@ -197,7 +201,7 @@ enum {
 enum {					/* type 0 pre-defined header */
 	PciCIS		= 0x28,		/* cardbus CIS pointer */
 	PciSVID		= 0x2C,		/* subsystem vendor ID */
-	PciSID		= 0x2E,		/* cardbus CIS pointer */
+	PciSID		= 0x2E,		/* subsystem ID */
 	PciEBAR0	= 0x30,		/* expansion ROM base address */
 	PciMGNT		= 0x3E,		/* burst period length */
 	PciMLT		= 0x3F,		/* maximum latency between bursts */
@@ -274,8 +278,6 @@ struct Pcidev
 	int		tbdf;		/* type+bus+device+function */
 	uint16_t	vid;		/* vendor ID */
 	uint16_t	did;		/* device ID */
-	uint16_t	svid;		/* subsystem vid */
-	uint16_t	sdid;		/* subsystem did */
 
 	uint16_t	pcr;
 
@@ -308,7 +310,12 @@ struct Pcidev
 	} ioa, mema;
 
 	int	pmrb;			/* power management register block */
-	void*	xcfg;			/* PCIe configuration block */
+};
+
+enum {
+	/* vendor ids */
+	Vintel	= 0x8086,
+	Vmyricom= 0x14c1,
 };
 
 #define PCIWINDOW	0
@@ -319,4 +326,110 @@ struct Pcidev
 #define	PCIWADDRL(va)	((uint32_t)PCIWADDR64(va))
 #define	PCIWADDRH(va)	((uint32_t)(PCIWADDR64(va)>>32))
 
-#pragma	varargck	type	"T"	int
+/* SMBus transactions */
+enum
+{
+	SMBquick,		/* sends address only */
+
+	/* write */
+	SMBsend,		/* sends address and cmd */
+	SMBbytewrite,		/* sends address and cmd and 1 byte */
+	SMBwordwrite,		/* sends address and cmd and 2 bytes */
+
+	/* read */
+	SMBrecv,		/* sends address, recvs 1 byte */
+	SMBbyteread,		/* sends address and cmd, recv's byte */
+	SMBwordread,		/* sends address and cmd, recv's 2 bytes */
+};
+
+typedef struct SMBus SMBus;
+struct SMBus {
+	QLock;		/* mutex */
+	Rendez	r;	/* rendezvous point for completion interrupts */
+	void	*arg;	/* implementation dependent */
+	uint32_t	base;	/* port or memory base of smbus */
+	int	busy;
+	void	(*transact)(SMBus*, int, int, int, uint8_t*);
+};
+
+/*
+ * PCMCIA support code.
+ */
+
+typedef struct PCMslot		PCMslot;
+typedef struct PCMconftab	PCMconftab;
+
+/*
+ * Map between ISA memory space and PCMCIA card memory space.
+ */
+struct PCMmap {
+	uint32_t	ca;			/* card address */
+	uint32_t	cea;			/* card end address */
+	uint32_t	isa;			/* ISA address */
+	int	len;			/* length of the ISA area */
+	int	attr;			/* attribute memory */
+	int	ref;
+};
+
+/* configuration table entry */
+struct PCMconftab
+{
+	int	index;
+	uint16_t	irqs;		/* legal irqs */
+	uint8_t	irqtype;
+	uint8_t	bit16;		/* true for 16 bit access */
+	struct {
+		uint32_t	start;
+		uint32_t	len;
+	} io[16];
+	int	nio;
+	uint8_t	vpp1;
+	uint8_t	vpp2;
+	uint8_t	memwait;
+	uint32_t	maxwait;
+	uint32_t	readywait;
+	uint32_t	otherwait;
+};
+
+/* a card slot */
+struct PCMslot
+{
+	Lock;
+	int	ref;
+
+	void	*cp;		/* controller for this slot */
+	long	memlen;		/* memory length */
+	uint8_t	base;		/* index register base */
+	uint8_t	slotno;		/* slot number */
+
+	/* status */
+	uint8_t	special;	/* in use for a special device */
+	uint8_t	already;	/* already inited */
+	uint8_t	occupied;
+	uint8_t	battery;
+	uint8_t	wrprot;
+	uint8_t	powered;
+	uint8_t	configed;
+	uint8_t	enabled;
+	uint8_t	busy;
+
+	/* cis info */
+	uint32_t	msec;		/* time of last slotinfo call */
+	char	verstr[512];	/* version string */
+	int	ncfg;		/* number of configurations */
+	struct {
+		uint16_t	cpresent;	/* config registers present */
+		uint32_t	caddr;		/* relative address of config registers */
+	} cfg[8];
+	int	nctab;		/* number of config table entries */
+	PCMconftab	ctab[8];
+	PCMconftab	*def;	/* default conftab */
+
+	/* memory maps */
+	Lock	mlock;		/* lock down the maps */
+	int	time;
+	PCMmap	mmap[4];	/* maps, last is always for the kernel */
+};
+
+#pragma varargck	type	"T"	int
+#pragma varargck	type	"T"	uint
diff --git a/sys/src/kern/amd64/ioapic.c b/sys/src/kern/amd64/ioapic.c
deleted file mode 100644
index 891c5d3..0000000
--- a/sys/src/kern/amd64/ioapic.c
+++ /dev/null
@@ -1,595 +0,0 @@
-#include "u.h"
-#include "../port/lib.h"
-#include "mem.h"
-#include "dat.h"
-#include "fns.h"
-
-#include "apic.h"
-#include "io.h"
-#include "adr.h"
-
-typedef struct Rbus Rbus;
-typedef struct Rdt Rdt;
-
-struct Rbus {
-	Rbus	*next;
-	int	bustype;
-	int	devno;
-	Rdt	*rdt;
-};
-
-struct Rdt {
-	IOapic	*apic;
-	int	intin;
-	uint32_t	lo;
-
-	int	ref;				/* could map to multiple busses */
-	int	enabled;				/* times enabled */
-};
-
-enum {						/* IOAPIC registers */
-	Ioregsel	= 0x00,			/* indirect register address */
-	Iowin	= 0x04,			/* indirect register data */
-	Ioipa		= 0x08,			/* IRQ Pin Assertion */
-	Ioeoi		= 0x10,			/* EOI */
-
-	IOapicid	= 0x00,			/* Identification */
-	IOapicver	= 0x01,			/* Version */
-	IOapicarb	= 0x02,			/* Arbitration */
-	Ioabcfg	= 0x03,			/* Boot Configuration */
-	Ioredtbl	= 0x10,			/* Redirection Table */
-};
-
-static Rdt rdtarray[Nrdt];
-static int nrdtarray;
-static int gsib;
-static Rbus* rdtbus[Nbus];
-static Rdt* rdtvecno[IdtMAX+1];
-static int dfpolicy = 1;	/* round-robin */
-
-static Lock idtnolock;
-static int idtno = IdtIOAPIC;
-
-static	IOapic	xioapic[Napic];
-static	int	isabusno = -1;
-
-/* BOTCH: no need for this concept; we've got the bustype */
-static void
-ioapicisabus(int busno)
-{
-	if(isabusno != -1){
-		if(busno == isabusno)
-			return;
-		jehanne_print("ioapic: isabus redefined: %d ↛ %d\n", isabusno, busno);
-//		return;
-	}
-	DBG("ioapic: isa busno %d\n", busno);
-	isabusno = busno;
-}
-
-IOapic*
-ioapiclookup(uint32_t id)
-{
-	IOapic *a;
-
-	if(id > nelem(xioapic))
-		return nil;
-	a = xioapic + id;
-	if(a->useable)
-		return a;
-	return nil;
-}
-
-int
-gsitoapicid(int gsi, uint32_t *intin)
-{
-	int i;
-	IOapic *a;
-
-	for(i=0; i<Napic; i++){
-		a = xioapic + i;
-		if(!a->useable)
-			continue;
-		if(gsi >= a->gsib && gsi < a->gsib+a->nrdt){
-			if(intin != nil)
-				*intin = gsi - a->gsib;
-			return a - xioapic;
-		}
-	}
-//	jehanne_print("gsitoapicid: no ioapic found for gsi %d\n", gsi);
-	return -1;
-}
-
-static void
-rtblget(IOapic* apic, int sel, uint32_t* hi, uint32_t* lo)
-{
-	sel = Ioredtbl + 2*sel;
-
-	apic->addr[Ioregsel] = sel+1;
-	*hi = apic->addr[Iowin];
-	apic->addr[Ioregsel] = sel;
-	*lo = apic->addr[Iowin];
-}
-
-static void
-rtblput(IOapic* apic, int sel, uint32_t hi, uint32_t lo)
-{
-	sel = Ioredtbl + 2*sel;
-
-	apic->addr[Ioregsel] = sel+1;
-	apic->addr[Iowin] = hi;
-	apic->addr[Ioregsel] = sel;
-	apic->addr[Iowin] = lo;
-}
-
-Rdt*
-rdtlookup(IOapic *apic, int intin)
-{
-	int i;
-	Rdt *r;
-
-	for(i = 0; i < nrdtarray; i++){
-		r = rdtarray + i;
-		if(apic == r->apic && intin == r->intin)
-			return r;
-	}
-	return nil;
-}
-
-void
-ioapicintrinit(int bustype, int busno, int apicno, int intin, int devno, uint32_t lo)
-{
-	Rbus *rbus;
-	Rdt *rdt;
-	IOapic *apic;
-
-	if(busno >= Nbus || apicno >= Napic || nrdtarray >= Nrdt)
-		return;
-
-	if(bustype == BusISA)
-		ioapicisabus(busno);
-
-	apic = &xioapic[apicno];
-	if(!apic->useable || intin >= apic->nrdt)
-		panic("ioapic: intrinit: usable %d nrdt %d: bus %d apic %d intin %d dev %d lo %.8ux\n",
-			apic->useable, apic->nrdt, busno, apicno, intin, devno, lo);
-
-	rdt = rdtlookup(apic, intin);
-	if(rdt == nil){
-		if(nrdtarray == nelem(rdtarray)){
-			jehanne_print("ioapic: intrinit: rdtarray too small\n");
-			return;
-		}
-		rdt = &rdtarray[nrdtarray++];
-		rdt->apic = apic;
-		rdt->intin = intin;
-		rdt->lo = lo;
-	}else{
-		if(lo != rdt->lo){
-			if(bustype == BusISA && intin < 16 && lo == (Im|IPhigh|TMedge)){
-				DBG("override: isa %d %.8ux\n", intin, rdt->lo);
-				return;	/* expected; default was overridden*/
-			}
-			jehanne_print("multiple irq botch type %d bus %d %d/%d/%d lo %.8ux vs %.8ux\n",
-				bustype, busno, apicno, intin, devno, lo, rdt->lo);
-			return;
-		}
-		DBG("dup rdt %d %d %d %d %.8ux\n", busno, apicno, intin, devno, lo);
-	}
-	rdt->ref++;
-	rbus = jehanne_malloc(sizeof(*rbus));
-	rbus->rdt = rdt;
-	rbus->bustype = bustype;
-	rbus->devno = devno;
-	rbus->next = rdtbus[busno];
-	rdtbus[busno] = rbus;
-}
-
-/*
- * deal with ioapics at the same physical address.  seen on
- * certain supermicro atom systems.  the hope is that only
- * one will be used, and it will be the second one initialized.
- * (the pc kernel ignores this issue.)  it could be that mp and
- * acpi have different numbering?
- */
-static IOapic*
-dupaddr(uintmem pa)
-{
-	int i;
-	IOapic *p;
-
-	for(i = 0; i < nelem(xioapic); i++){
-		p = xioapic + i;
-		if(p->paddr == pa)
-			return p;
-	}
-	return nil;
-}
-
-IOapic*
-ioapicinit(int id, int ibase, uintmem pa)
-{
-	IOapic *apic, *p;
-
-	/*
-	 * Mark the IOAPIC useable if it has a good ID
-	 * and the registers can be mapped.
-	 */
-	if(id >= Napic)
-		return nil;
-	if((apic = xioapic+id)->useable)
-		return apic;
-
-	if((p = dupaddr(pa)) != nil){
-		jehanne_print("ioapic%d: same pa as apic%ld\n", id, p-xioapic);
-		if(ibase != -1)
-			return nil;		/* mp irqs reference mp apic#s */
-		apic->addr = p->addr;
-	}
-	else{
-		//adrmapck(pa, 1024, Ammio, Mfree, Cnone);	/* not in adr? */	/* TO DO */
-		if((apic->addr = vmap(pa, 1024)) == nil){
-			jehanne_print("ioapic%d: can't vmap %#P\n", id, pa);
-			return nil;
-		}
-	}
-	apic->useable = 1;
-	apic->paddr = pa;
-
-	/*
-	 * Initialise the I/O APIC.
-	 * The MultiProcessor Specification says it is the
-	 * responsibility of the O/S to set the APIC ID.
-	 */
-	lock(apic);
-	apic->addr[Ioregsel] = IOapicver;
-	apic->nrdt = ((apic->addr[Iowin]>>16) & 0xff) + 1;
-	if(ibase != -1)
-		apic->gsib = ibase;
-	else{
-		apic->gsib = gsib;
-		gsib += apic->nrdt;
-	}
-	apic->addr[Ioregsel] = IOapicid;
-	apic->addr[Iowin] = id<<24;
-	unlock(apic);
-
-	return apic;
-}
-
-void
-iordtdump(void)
-{
-	int i;
-	Rbus *rbus;
-	Rdt *rdt;
-
-	if(!DBGFLG)
-		return;
-	for(i = 0; i < Nbus; i++){
-		if((rbus = rdtbus[i]) == nil)
-			continue;
-		jehanne_print("iointr bus %d:\n", i);
-		for(; rbus != nil; rbus = rbus->next){
-			rdt = rbus->rdt;
-			jehanne_print(" apic %ld devno %#ux (%d %d) intin %d lo %#ux ref %d\n",
-				rdt->apic-xioapic, rbus->devno, rbus->devno>>2,
-				rbus->devno & 0x03, rdt->intin, rdt->lo, rdt->ref);
-		}
-	}
-}
-
-void
-ioapicdump(void)
-{
-	int i, n;
-	IOapic *apic;
-	uint32_t hi, lo;
-
-	if(!DBGFLG)
-		return;
-	for(i = 0; i < Napic; i++){
-		apic = &xioapic[i];
-		if(!apic->useable || apic->addr == 0)
-			continue;
-		jehanne_print("ioapic %d addr %#p nrdt %d ibase %d\n",
-			i, apic->addr, apic->nrdt, apic->gsib);
-		for(n = 0; n < apic->nrdt; n++){
-			lock(apic);
-			rtblget(apic, n, &hi, &lo);
-			unlock(apic);
-			jehanne_print(" rdt %2.2d %#8.8ux %#8.8ux\n", n, hi, lo);
-		}
-	}
-}
-
-static char*
-ioapicprint(char *p, char *e, IOapic *a, int i)
-{
-	char *s;
-
-	s = "ioapic";
-	p = jehanne_seprint(p, e, "%-8s ", s);
-	p = jehanne_seprint(p, e, "%8ux ", i);
-	p = jehanne_seprint(p, e, "%6d ", a->gsib);
-	p = jehanne_seprint(p, e, "%6d ", a->gsib+a->nrdt-1);
-	p = jehanne_seprint(p, e, "%#P ", a->paddr);
-	p = jehanne_seprint(p, e, "\n");
-	return p;
-}
-
-static long
-ioapicread(Chan* _1, void *a, long n, int64_t off)
-{
-	char *s, *e, *p;
-	long i, r;
-
-	s = jehanne_malloc(READSTR);
-	e = s+READSTR;
-	p = s;
-
-	for(i = 0; i < nelem(xioapic); i++)
-		if(xioapic[i].useable)
-			p = ioapicprint(p, e, xioapic + i, i);
-	r = -1;
-	if(!waserror()){
-		r = readstr(off, a, n, s);
-		poperror();
-	}
-	jehanne_free(s);
-	return r;
-}
-
-void
-ioapiconline(void)
-{
-	int i;
-	IOapic *apic;
-
-	addarchfile("ioapic", 0444, ioapicread, nil);
-	for(apic = xioapic; apic < &xioapic[Napic]; apic++){
-		if(!apic->useable || apic->addr == nil)
-			continue;
-		for(i = 0; i < apic->nrdt; i++){
-			lock(apic);
-			rtblput(apic, i, 0, Im);
-			unlock(apic);
-		}
-	}
-	jehanne_print("init ioapic dump\n");
-	ioapicdump();
-}
-
-static int
-ioapicintrdd(uint32_t* hi, uint32_t* lo)
-{
-	Lapic *lapic;
-	Mach *mach;
-	int i;
-	static int df;
-
-	/*
-	 * Set delivery mode (lo) and destination field (hi)
-	 *
-	 * Currently, assign each interrupt to a different CPU
-	 * using physical mode delivery.  Using the topology
-	 * (packages/cores/threads) could be helpful.
-	 */
-	switch(dfpolicy){
-	case 0:
-		i = sys->machptr[0]->apicno;
-		break;
-	default:	/* round-robin */
-		for(;;){
-			i = df;
-			if(++df >= Napic)
-				df = 0;
-			if((lapic = lapiclookup(i)) != nil &&
-			   (mach = sys->machptr[lapic->machno]) != nil &&
-			   mach->online)
-				break;
-		}
-		break;
-	}
-	*hi = i<<24;
-	*lo |= Pm|MTf;
-	return i;
-}
-
-int
-nextvec(void)
-{
-	uint32_t vecno;
-
-	lock(&idtnolock);
-	vecno = idtno;
-	idtno = (idtno+8) % IdtMAX;
-	if(idtno < IdtIOAPIC)
-		idtno += IdtIOAPIC;
-	unlock(&idtnolock);
-
-	return vecno;
-}
-
-static int
-msimask(Vctl *v, int mask)
-{
-	Pcidev *p;
-
-	p = pcimatchtbdf(v->tbdf);
-	if(p == nil)
-		return -1;
-	return pcimsimask(p, mask);
-}
-
-static int
-intrenablemsi(Vctl* v, Pcidev *p)
-{
-	uint32_t vno, lo, hi;
-	uint64_t msivec;
-
-	vno = nextvec();
-
-	lo = IPlow | TMedge | vno;
-	v->affinity = ioapicintrdd(&hi, &lo);
-
-	if(lo & Lm)
-		lo |= MTlp;
-
-	msivec = (uint64_t)hi<<32 | lo;
-	if(pcimsienable(p, msivec) == -1)
-		return -1;
-	v->isr = lapicisr;
-	v->eoi = lapiceoi;
-	v->vno = vno;
-	v->type = "msi";
-	v->mask = msimask;
-
-	DBG("msiirq: %T: enabling %.16llux %s irq %d vno %d\n", p->tbdf, msivec, v->name, v->irq, vno);
-	return vno;
-}
-
-int
-disablemsi(Vctl* _1, Pcidev *p)
-{
-	if(p == nil)
-		return -1;
-	return pcimsimask(p, 1);
-}
-
-int
-ioapicintrenable(Vctl* v)
-{
-	Rbus *rbus;
-	Rdt *rdt;
-	uint32_t hi, lo;
-	int bustype, busno, devno, vecno;
-
-	if(v->tbdf == BUSUNKNOWN){
-		if(v->irq >= IdtLINT0 && v->irq <= IdtMAX){
-			if(v->irq != IdtSPURIOUS)
-				v->isr = lapiceoi;
-			v->type = "lapic";
-			return v->irq;
-		}
-		else{
-			/*
-			 * Legacy ISA.
-			 * Make a busno and devno using the
-			 * ISA bus number and the irq.
-			 */
-			if(isabusno == -1)
-				panic("no ISA bus allocated");
-			busno = isabusno;
-			devno = v->irq;
-			bustype = BusISA;
-		}
-	}
-	else if((bustype = BUSTYPE(v->tbdf)) == BusPCI){
-		/*
-		 * PCI.
-		 * Make a devno from BUSDNO(tbdf) and pcidev->intp.
-		 */
-		Pcidev *pcidev;
-
-		busno = BUSBNO(v->tbdf);
-		if((pcidev = pcimatchtbdf(v->tbdf)) == nil)
-			panic("no PCI dev for tbdf %T", v->tbdf);
-		if((vecno = intrenablemsi(v, pcidev)) != -1)
-			return vecno;
-		disablemsi(v, pcidev);
-		if((devno = pcicfgr8(pcidev, PciINTP)) == 0)
-			panic("no INTP for tbdf %T", v->tbdf);
-		devno = BUSDNO(v->tbdf)<<2|(devno-1);
-		DBG("ioapicintrenable: tbdf %T busno %d devno %d\n",
-			v->tbdf, busno, devno);
-	}
-	else{
-		SET(busno, devno);
-		panic("unknown tbdf %T", v->tbdf);
-	}
-	rdt = nil;
-	for(rbus = rdtbus[busno]; rbus != nil; rbus = rbus->next)
-		if(rbus->devno == devno && rbus->bustype == bustype){
-			rdt = rbus->rdt;
-			break;
-		}
-	if(rdt == nil){
-		/*
-		 * PCI devices defaulted to ISA (ACPI).
-		 */
-		if((busno = isabusno) == -1)
-			return -1;
-		devno = v->irq;
-		for(rbus = rdtbus[busno]; rbus != nil; rbus = rbus->next)
-			if(rbus->devno == devno){
-				rdt = rbus->rdt;
-				break;
-			}
-		DBG("isa: tbdf %T busno %d devno %d %#p\n",
-			v->tbdf, busno, devno, rdt);
-	}
-	if(rdt == nil)
-		return -1;
-
-	/*
-	 * Assume this is a low-frequency event so just lock
-	 * the whole IOAPIC to initialise the RDT entry
-	 * rather than putting a Lock in each entry.
-	 */
-	lock(rdt->apic);
-	DBG("%T: %ld/%d/%d (%d)\n", v->tbdf, rdt->apic - xioapic, rbus->devno, rdt->intin, devno);
-	if((rdt->lo & 0xff) == 0){
-		vecno = nextvec();
-		rdt->lo |= vecno;
-		rdtvecno[vecno] = rdt;
-	}else
-		DBG("%T: mutiple irq bus %d dev %d\n", v->tbdf, busno, devno);
-
-	rdt->enabled++;
-	lo = (rdt->lo & ~Im);
-	v->affinity = ioapicintrdd(&hi, &lo);
-	rtblput(rdt->apic, rdt->intin, hi, lo);
-	vecno = lo & 0xff;
-	unlock(rdt->apic);
-
-	DBG("busno %d devno %d hi %#.8ux lo %#.8ux vecno %d\n",
-		busno, devno, hi, lo, vecno);
-	v->isr = lapicisr;
-	v->eoi = lapiceoi;
-	v->vno = vecno;
-	v->type = "ioapic";
-
-	return vecno;
-}
-
-int
-ioapicintrdisable(int vecno)
-{
-	Rdt *rdt;
-
-	/*
-	 * FOV. Oh dear. This isn't very good.
-	 * Fortunately rdtvecno[vecno] is static
-	 * once assigned.
-	 * Must do better.
-	 *
-	 * What about any pending interrupts?
-	 */
-	if(vecno < 0 || vecno > IdtMAX){
-		panic("ioapicintrdisable: vecno %d out of range", vecno);
-		return -1;
-	}
-	if((rdt = rdtvecno[vecno]) == nil){
-		panic("ioapicintrdisable: vecno %d has no rdt", vecno);
-		return -1;
-	}
-
-	lock(rdt->apic);
-	rdt->enabled--;
-	if(rdt->enabled == 0)
-		rtblput(rdt->apic, rdt->intin, 0, rdt->lo);
-	unlock(rdt->apic);
-
-	return 0;
-}
diff --git a/sys/src/kern/386/kbd.c b/sys/src/kern/amd64/kbd.c
similarity index 100%
rename from sys/src/kern/386/kbd.c
rename to sys/src/kern/amd64/kbd.c
diff --git a/sys/src/kern/amd64/kernel.ld b/sys/src/kern/amd64/kernel.ld
index 1c13023..b5bb1d5 100644
--- a/sys/src/kern/amd64/kernel.ld
+++ b/sys/src/kern/amd64/kernel.ld
@@ -10,7 +10,7 @@ ENTRY(_start)
 /* start the kernel at 0x110000. 
  * That way we can use lower ram for critical structures
  */
-KERN_LOAD_ADDR = 0xfffffffff0000000;
+KERN_LOAD_ADDR = 0xffffffff80000000;
 
 SECTIONS
 {
diff --git a/sys/src/kern/amd64/l64idt.S b/sys/src/kern/amd64/l64idt.S
index ed1399d..b3e4deb 100644
--- a/sys/src/kern/amd64/l64idt.S
+++ b/sys/src/kern/amd64/l64idt.S
@@ -2,6 +2,7 @@
  * Interrupt/exception handling.
  */
 #include "amd64.h"
+#include "mem.h"
 
 .code64
 
@@ -81,7 +82,7 @@ _intrcommon:
 	xchgq	%rax, 0(%rsp)
 	// 0(%rsp) now has the vno
 	subq	$16, %rsp				/* R1[45] */
-	cmpw	$SSEL(SiCS, SsTIGDT|SsRPL0), 40(%rsp) 	/* old CS */
+	cmpw	$KESEL, 40(%rsp) 	/* old CS */
 	je	_intrnested
 
 	movq	%r14, 0(%rsp)
@@ -131,7 +132,7 @@ _intrr:
 	popq	%r12
 	popq	%r13
 
-	cmpw	$SSEL(SiCS, SsTIGDT|SsRPL0), 40(%rsp) 	/* old CS */
+	cmpw	$KESEL, 40(%rsp) 	/* old CS */
 	je	_iretnested
 
 	swapgs
diff --git a/sys/src/kern/amd64/l64sipi.S b/sys/src/kern/amd64/l64sipi.S
index 42a7698..b132ede 100644
--- a/sys/src/kern/amd64/l64sipi.S
+++ b/sys/src/kern/amd64/l64sipi.S
@@ -11,9 +11,6 @@
  *   CS base set to startup memory address;
  *   CS limit set to 64KiB;
  *   CPL and IP set to 0.
- * Parameters are passed to this code via a vector in low memory
- * indexed by the APIC number of the processor. The layout, size,
- * and location have to be kept in sync with the setup in sipi.s.
  */
 #include "mem.h"
 #include "amd64.h"
@@ -22,190 +19,126 @@
 #endif
 
 .section .text
-
-/*
- * Real mode. Welcome to 1978.
- * Load a basic GDT, turn on protected mode and make
- * inter-segment jump to the protected mode code.
- */
 .code16
-.align 4096
-.globl sipihandler
-sipihandler:
-_real:
-	ljmp	$0x0, $_endofheader
 
-_startofheader:
-	NOP; NOP; NOP
-	.quad	0xa5a5a5a5a5a5a5a5
-
-_gdt32p:
-	.quad	0x0000000000000000		/* NULL descriptor */
-	.quad	0x00cf9a000000ffff		/* CS */
-	.quad	0x00cf92000000ffff		/* DS */
-	.quad	0x0020980000000000		/* .long mode CS */
-
-_gdtptr32p:
-	.word	4*8-1				/* includes .long mode */
-	.long	_gdt32p
-
-_gdt64:
-	.quad	0x0000000000000000		/* NULL descriptor */
-	.quad	0x0020980000000000		/* CS */
-	.quad	0x0000800000000000		/* DS */
-
-_gdtptr64v:
-	.word	3*8-1
-	.quad	_gdt64
-
-_endofheader:
+.align 4
+apbootstrap:
+	ljmp	$0x0, $_apbootstrap
+	nop
+	nop
+	nop
+_apvector:			/* address APBOOTSTRAP+0x08 */
+	.quad	0
+_appml4:			/* address APBOOTSTRAP+0x10 */
+	.quad	0
+_apapic:			/* address APBOOTSTRAP+0x18 */
+	.quad	0
+_apmach:			/* address APBOOTSTRAP+0x20 */
+	.quad	0
+_apbootstrap:
 	mov	%cs, %ax
 	mov	%ax, %ds
-
-	lgdt	_gdtptr32p			/* load a basic gdt */
-
-	mov	%cr0, %eax
-	or	$Pe, %ax
-	mov	%eax, %cr0			/* turn on protected mode */
-
+	lgdt	_gdtptr32p
+	movl	%cr0, %eax
+	or	$0x1, %ax
+	mov	%eax, %cr0
 	jmp	1f
 1:
-	mov	$(SSEL(SiDS, SsTIGDT|SsRPL0)), %ax
-	mov	%ax, %ds
-	mov	%ax, %es
-	mov	%ax, %fs
-	mov	%ax, %gs
-	mov	%ax, %ss
+	ljmp	$0x18, $_ap32
 
-	ljmpl	$8, $_protected			/* 8 = SSEL(SiCS, SsTIGDT|SsRPL0) */
-
-
-/*
- * Protected mode. Welcome to 1982.
- * Get the local APIC ID from the memory mapped APIC
- * and use it to locate the index to the parameter vector;
- * load the PDB with the page table address from the
- * information vector;
- * make an identity map for the inter-segment jump below,
- * using the stack space to hold a temporary PDP and PD;
- * enable and activate .long mode;
- * make an inter-segment jump to the .long mode code.
- */
 .code32
+_ap32:
+	movl	$SELECTOR(2, SELGDT, 0), %eax
+	movw	%ax, %ds
+	movw	%ax, %es
+	movw	%ax, %fs
+	movw	%ax, %gs
+	movw	%ax, %ss
 
-/*
- * Macros for accessing page table entries; must turn
- * the C-style array-index macros into a page table byte
- * offset.
- */
-#define PML4O(v)	((PTLX((v), 3))<<3)
-#define PDPO(v)		((PTLX((v), 2))<<3)
-#define PDO(v)		((PTLX((v), 1))<<3)
-#define PTO(v)		((PTLX((v), 0))<<3)
+	movl	_appml4, %eax		/* physical address of PML4 */
+	movl	%eax, %cr3		/* load the mmu */
+	jmp	2f
+2:
+	movl	%cr4, %eax
+	andl	$0xffffffef, %eax	/* Page Size (~0x00000010 = 0xffffffef) */
+	orl	$0xa0, %eax		/* Page Global, Phys. Address */
+	movl	%eax, %cr4
 
-_protected:
-	mov	$0xfee00000, %ebp	/* apicbase */
-	mov	0x20(%ebp), %ebp	/* Id */
-	shr	$0x18, %ebp		/* becomes RARG later */
-
-	mov	%ebp, %eax		/* apicno */
-	imul	$0x20, %eax, %eax	/* [apicno] */
-	mov	$_real, %ebx
-	add	$0x1000, %ebx		/* sipi */
-	add	%eax, %ebx		/* sipi[apicno] */
-
-	mov	(%ebx), %esi		/* sipi[apicno].pml4 */
-
-	mov	%esi, %eax
-	mov	%eax, %cr3		/* load the mmu */
-
-	mov	%eax, %edx
-	sub	$MACHSTKSZ, %edx	/* PDP for identity map */
-	add	$(PteRW|PteP), %edx
-	mov	%edx, PML4O(0)(%eax)	/* PML4E for identity map */
-
-	sub	$MACHSTKSZ, %eax	/* PDP for identity map */
-	add	$PTSZ, %edx
-	mov	%edx, PDPO(0)(%eax)	/* PDPE for identity map */
-	mov	$(PtePS|PteRW|PteP), %edx
-	add	$PTSZ, %eax		/* PD for identity map */
-	mov	%edx, PDO(0)(%eax)	/* PDE for identity 0-[24]MiB */
-
-/*
- * Enable and activate .long Mode. From the manual:
- * 	make sure Page Size Extentions are off, and Page Global
- *	Extensions and Physical Address Extensions are on in CR4;
- *	set .long Mode Enable in the Extended Feature Enable MSR;
- *	set Paging Enable in CR0;
- *	make an inter-segment jump to the .long Mode code.
- * It's all in 32-bit mode until the jump is made.
- */
-_lme:
-	mov	%cr4, %eax
-	and	$~Pse, %eax		/* Page Size */
-	or	$(Pge|Pae), %eax	/* Page Global, Phys. Address */
-	mov	%eax, %cr4
-
-	mov	$Efer, %ecx		/* Extended Feature Enable */
+	movl	$0xc0000080, %ecx	/* Extended Feature Enable */
 	rdmsr
-	or	$Lme, %eax		/* .long Mode Enable */
+	orl	$0x00000100, %eax	/* Long Mode Enable */
 	wrmsr
 
-	mov	%cr0, %edx
-	and	$~(Cd|Nw|Ts|Mp), %edx
-	or	$(Pg|Wp), %edx		/* Paging Enable */
-	mov	%edx, %cr0
+	movl	%cr0, %edx
+	andl	$0x9ffffff5, %edx	/* (~0x6000000a = 0x9ffffff5) */
+	orl	$0x80010000, %edx	/* Paging Enable, Write Protect */
+	movl	%edx, %cr0
 
-	ljmp	$0x18, $_identity	/* 0x18 = SSEL(3, SsTIGDT|SsRPL0) */
+	ljmp	$0x8, $(_ap64)
 
-/*
- * .long mode. Welcome to 2003.
- * Jump out of the identity map space;
- * load a proper .long mode GDT;
- * zap the identity map;
- * initialise the stack, RMACH, RUSER,
- * and call the C startup code.
- */
 .code64
-_identity:
-	mov	$(_start64v+KZERO), %rax
-	jmpq	*%rax
-
-_start64v:
-	mov	$_gdtptr64v, %rax
+_ap64:
+	movq	$_gdtptr64v, %rax
 	lgdt	(%rax)
 
-	xor	%rdx, %rdx		/* DX is 0 from here on */
-	mov	%edx, %ds		/* not used in .long mode */
-	mov	%edx, %es		/* not used in .long mode */
-	mov	%edx, %fs
-	mov	%edx, %gs
-	mov	%edx, %ss		/* not used in .long mode */
+	xorq	%rax, %rax
+	movw	%ax, %ds		/* not used in long mode */
+	movw	%ax, %es		/* not used in long mode */
+	movw	%ax, %fs
+	movw	%ax, %gs
+	movw	%ax, %ss		/* not used in long mode */
 
-	mov	%esi, %esi		/* sipi[apicno].pml4 */
-	mov	%rsi, %rax
-	add	$KZERO, %rax		/* PML4 */
+	lldt	%ax
 
-	mov	%rdx, PML4O(0)(%rax)	/* zap identity map */
-	mov	%rsi, %cr3		/* flush TLB */
+	movq	_apmach, %rsp
 
-	add	$KZERO, %rbx		/* &sipi[apicno] */
+	movq	%rax, %r14		/* up = nil; */
+	movq	%rsp, %r15		/* m = apmach */
 
-	mov	8(%rbx), %rsp		/* sipi[apicno].stack */
+	addq	$MACHSIZE, %rsp
 
-	push	%rdx			/* clear flags */
+	pushq	%rax			/* clear flags */
 	popfq
-	mov	%ebp, %ebp		/* APIC ID */
-	push	%rbp			/* apicno */
 
-	mov	16(%rbx), %r15		/* sipi[apicno].mach */
-	mov	%rdx, %r14
-	mov	24(%rbx), %rax		/* sipi[apicno].pc */
-	callq	*%rax			/* (*sipi[apicno].pc)(apicno) */
+	movq	_apvector, %rax
+	movq	_apapic, %rdi
+	pushq	%rbp
 
-_ndnr:
-	jmp	_ndnr
+	call	*%rax
 
-.globl sipihandlerend
-sipihandlerend:
-	jmp	sipihandlerend
+_halt:
+	hlt
+	jmp	_halt
+
+.align 16
+_gdt:
+	/* null descriptor */
+	.long	0
+	.long	0
+
+	/* (KESEG) 64 bit long mode exec segment */
+	.long	0xFFFF
+	.long	SEGL|SEGG|SEGP|(0xF<<16)|SEGPL(0)|SEGEXEC|SEGR
+
+	/* 32 bit data segment descriptor for 4 gigabytes (PL 0) */
+	.long	0xFFFF
+	.long	SEGG|SEGB|(0xF<<16)|SEGP|SEGPL(0)|SEGDATA|SEGW
+
+	/* 32 bit exec segment descriptor for 4 gigabytes (PL 0) */
+	.long	0xFFFF
+	.long	SEGG|SEGD|(0xF<<16)|SEGP|SEGPL(0)|SEGEXEC|SEGR
+
+.align 4
+_gdtptr32p:
+	.word	4*8-1
+	.long	_gdt-KZERO
+
+.align 4
+_gdtptr64p:
+	.word	4*8-1
+	.quad	_gdt-KZERO
+
+.align 4
+_gdtptr64v:
+	.word	4*8-1
+	.quad	_gdt
diff --git a/sys/src/kern/amd64/l64v.S b/sys/src/kern/amd64/l64v.S
index 6fdf02d..af454d6 100644
--- a/sys/src/kern/amd64/l64v.S
+++ b/sys/src/kern/amd64/l64v.S
@@ -116,6 +116,16 @@ gdtget:
 	sgdt	(%rdi)		/* Note: 10 bytes returned */
 	ret
 
+.global lgdt
+lgdt:
+	lgdt	(%rdi)
+	ret
+
+.global lidt
+lidt:
+	lgdt	(%rdi)
+	ret
+
 // Called with the address of gdt in rdi.
 // Load the gdt, then do a ret which will use the argument on the stack as
 // a segment #. This stuff is just crazy.
@@ -159,8 +169,6 @@ idtput:
 
 .global trput
 trput:
-	// panic
-	//mov 0, %rax
 	ltr	%di
 	ret
 
@@ -219,36 +227,45 @@ rdtsc:
 	ORQ	%rdx, %rax				/* (hi<<32)|lo */
 	ret
 
-.global _rdmsr
-_rdmsr:
+/* int rdmsr(uint32_t reg, uint64_t* value); */
+.global rdmsr
+rdmsr:
 	pushq	%rcx
 	pushq	%rdx
+	pushq	%rbp
+	xorq	%rbp, %rbp
 	movl	%edi, %ecx
-
+.global _rdmsrinst
+_rdmsrinst:
 	rdmsr
-						/* u64int rdmsr(u32int); */
-	xchgl	%edx, %eax				/* swap lo/hi, zero-extend */
-	SHLQ	$32, %rax				/* hi<<32 */
-	ORQ	%rdx, %rax				/* (hi<<32)|lo */
+	xchgl	%edx, %eax			/* swap lo/hi, zero-extend */
+	shlq	$32, %rax			/* hi<<32 */
+	orq	%rdx, %rax			/* (hi<<32)|lo */
+	movq	%rax, (%rsi)			/* set value */
+	movq	%rbp, %rax			/* %rbp set to -1 if traped */
+	popq	%rbp
 	popq	%rdx
 	popq	%rcx
 	ret
 
-.global _wrmsr
-_wrmsr:
-	pushq	%rax	// do we need to do this?
+/*int wrmsr(uint32_t reg, uint64_t value) */
+.global wrmsr
+wrmsr:
 	pushq	%rcx
 	pushq	%rdx
+	pushq	%rbp
 	movl	%edi, %ecx
 	movl	%esi, %eax
 	movq	%rsi, %rdx
 	shrq	$32, %rdx
-
+	xorq	%rbp, %rbp
+.global _wrmsrinst
+_wrmsrinst:
 	wrmsr
-
+	movq	%rbp, %rax
+	popq	%rbp
 	popq	%rdx
 	popq	%rcx
-	popq	%rax
 	ret
 
 .global invlpg
@@ -380,6 +397,24 @@ adec:
 	subl	$1, %eax
 	ret
 
+/*
+ * Synchronisation
+ */
+.global ainc16
+ainc16:
+	mov	$1, %ax
+	lock; xadd %ax, (%rdi)
+	add	$1, %ax
+	ret
+
+.global adec16
+adec16:
+	mov	$-1, %ax
+	lock; xadd %ax, (%rdi)
+	sub	$1, %ax
+	ret
+
+
 /*
  * Semaphores rely on negative values for the counter,
  * and don't have the same overflow/underflow conditions
@@ -564,38 +599,86 @@ _mm32done:
 	movl	(%rdi), %eax
 	ret
 
+/* void	mwait(void*); */
+.globl mwait
+mwait:
+	movq	%rdi, %rax
+	movl	(%eax), %ecx
+	orl	%ecx, %ecx
+	jnz	_mwaitdone
+	xorq	%rdx, %rdx
+	monitor
+	movl	(%eax), %ecx
+	orl	%ecx, %ecx
+	jnz	_mwaitdone
+	xorq	%rax, %rax
+	mwait
+_mwaitdone:
+	RET
 
-.global _monitor
-_monitor:
-	movq	%rdi, %rax			/* linear address to monitor */
-	xorq	%rcx, %rcx				/* no optional extensions yet */
-	xorq	%rdx, %rdx				/* no optional hints yet */
-	.byte 0x0f; .byte 0x01; .byte 0xc8	/* monitor */
+rdrand32:
+loop32:
+	rdrand	%eax
+	jc	loop32
 	ret
 
-.global _mwait
-_mwait:
-	movq	%rdi, %rcx			/* optional extensions */
-	.byte 0x0f; .byte 0x01; .byte 0xc9	/* mwait */
+rdrand64:
+loop64:
+	rdrand	%rax
+	jc	loop64
 	ret
 
-.global k10mwait
-k10mwait:
-k10mwloop:
-	movq	%rdi,%rcx
-	movq	(%rcx), %rax
-	cmpq	$0, %rax
-	jne		k10mwdone
-	movq	%rdi, %rax			/* linear address to monitor */
-	xorq	%rcx, %rcx				/* no optional extensions yet */
-	xorq	%rdx, %rdx				/* no optional hints yet */
-	.byte 0x0f; .byte 0x01; .byte 0xc8	/* monitor */
-	movq	%rdi, %rcx
-	movq	0(%rcx), %rax
-	cmpq	$0, %rax
-	jne		k10mwdone
-	xorq %rcx, %rcx			/* optional extensions */
-	.byte 0x0f; .byte 0x01; .byte 0xc9	/* mwait */
-	jmp		k10mwloop
-k10mwdone:
-	ret
+.globl rdrandbuf
+rdrandbuf:
+	movq	%rdi, %rdx
+
+	movl	%esi, %ecx
+	shrq	$3, %rcx
+eights:
+	cmpl	$0, %ecx
+	jg	f1
+	call	rdrand64
+	movq	%rax, 0(%rdx)
+	addq	$8, %rdx
+	subl	$1, %ecx
+	jmp	eights
+
+f1:
+	movl	%esi, %ecx
+	andl	$7, %ecx
+	shrq	$2, %rcx
+fours:
+	cmpl	$0, %ecx
+	jg	f2
+	call	rdrand32
+	movl	%eax, 0(%rdx)
+	addq	$4, %rdx
+	subl	$1, %ecx
+	jmp	fours
+
+f2:
+	movl	%esi, %ecx
+	andl	$3, %ecx
+ones:
+	cmpl	$0, %ecx
+	jg	f3
+	call	rdrand32
+	movb	%al, 0(%rdx)
+	addq	$1, %rdx
+	subl	$1, %ecx
+	jmp	ones
+
+f3:
+	RET
+
+
+/*
+ * Park a processor. Should never fall through a return from main to here,
+ * should only be called by application processors when shutting down.
+ */
+.global idle
+idle:
+_idle:
+	STI
+	HLT
+	JMP	_idle
diff --git a/sys/src/kern/amd64/l64vsyscall.S b/sys/src/kern/amd64/l64vsyscall.S
index a6fc8a4..ae59da4 100644
--- a/sys/src/kern/amd64/l64vsyscall.S
+++ b/sys/src/kern/amd64/l64vsyscall.S
@@ -11,6 +11,10 @@
 touser:
 	cli
 	swapgs
+
+	movq	$0, %r15
+	movq	$0, %r14
+
 	movq	$SSEL(SiUDS, SsRPL3), %rax
 	movw	%ax, %ds
 	movw	%ax, %es
@@ -39,10 +43,10 @@ syscallentry:
 	addq	$KSTACK, %rsp
 
 	/* build Ureg */
-	pushq	$SSEL(SiUDS, SsRPL3)		/* old stack segment */
+	pushq	$UDSEL				/* old stack segment */
 	pushq	%r13				/* old sp */
 	pushq	%r11				/* old flags */
-	pushq	$SSEL(SiUCS, SsRPL3)		/* old code segment */
+	pushq	$UESEL				/* old code segment */
 	pushq	%rcx				/* old ip */
 
 	movq	%r14, 24(%r15)			/* restore %r14 from m->tmp0 */
@@ -116,6 +120,6 @@ syscallreturn:
 .globl sysrforkret
 sysrforkret:
 	movq	$0, 0(%rsp)
-	movq	%r14, (13*8)(%rsp)		/* preserve up-> */
-	movq	%r15, (14*8)(%rsp)		/* preserve m-> */
+//	movq	%r14, (13*8)(%rsp)		/* preserve up-> */
+//	movq	%r15, (14*8)(%rsp)		/* preserve m-> */
 	jmp	syscallreturn
diff --git a/sys/src/kern/amd64/lapic.c b/sys/src/kern/amd64/lapic.c
index 704adb0..383dadc 100644
--- a/sys/src/kern/amd64/lapic.c
+++ b/sys/src/kern/amd64/lapic.c
@@ -3,475 +3,445 @@
 #include "mem.h"
 #include "dat.h"
 #include "fns.h"
-
-#include "apic.h"
 #include "io.h"
-#include "adr.h"
 
-#undef DBG
-#define	DBG	jehanne_print
+#include "mp.h"
 
-enum {						/* Local APIC registers */
-	Id		= 0x0020,		/* Identification */
-	Ver		= 0x0030,		/* Version */
-	Tp		= 0x0080,		/* Task Priority */
-	Ap		= 0x0090,		/* Arbitration Priority */
-	Pp		= 0x00a0,		/* Processor Priority */
-	Eoi		= 0x00b0,		/* EOI */
-	Ld		= 0x00d0,		/* Logical Destination */
-	Df		= 0x00e0,		/* Destination Format */
-	Siv		= 0x00f0,		/* Spurious Interrupt Vector */
-	Is		= 0x0100,		/* Interrupt Status (8) */
-	Tm		= 0x0180,		/* Trigger Mode (8) */
-	Ir		= 0x0200,		/* Interrupt Request (8) */
-	Es		= 0x0280,		/* Error Status */
-	Iclo		= 0x0300,		/* Interrupt Command */
-	Ichi		= 0x0310,		/* Interrupt Command [63:32] */
-	Lvt0		= 0x0320,		/* Local Vector Table 0 */
-	Lvt5		= 0x0330,		/* Local Vector Table 5 */
-	Lvt4		= 0x0340,		/* Local Vector Table 4 */
-	Lvt1		= 0x0350,		/* Local Vector Table 1 */
-	Lvt2		= 0x0360,		/* Local Vector Table 2 */
-	Lvt3		= 0x0370,		/* Local Vector Table 3 */
-	Tic		= 0x0380,		/* Timer Initial Count */
-	Tcc		= 0x0390,		/* Timer Current Count */
-	Tdc		= 0x03e0,		/* Timer Divide Configuration */
-
-	Tlvt		= Lvt0,			/* Timer */
-	Lint0		= Lvt1,			/* Local Interrupt 0 */
-	Lint1		= Lvt2,			/* Local Interrupt 1 */
-	Elvt		= Lvt3,			/* Error */
-	Pclvt		= Lvt4,			/* Performance Counter */
-	Tslvt		= Lvt5,			/* Thermal Sensor */
+enum {					/* Local APIC registers */
+	LapicID		= 0x0020,	/* ID */
+	LapicVER	= 0x0030,	/* Version */
+	LapicTPR	= 0x0080,	/* Task Priority */
+	LapicAPR	= 0x0090,	/* Arbitration Priority */
+	LapicPPR	= 0x00A0,	/* Processor Priority */
+	LapicEOI	= 0x00B0,	/* EOI */
+	LapicLDR	= 0x00D0,	/* Logical Destination */
+	LapicDFR	= 0x00E0,	/* Destination Format */
+	LapicSVR	= 0x00F0,	/* Spurious Interrupt Vector */
+	LapicISR	= 0x0100,	/* Interrupt Status (8 registers) */
+	LapicTMR	= 0x0180,	/* Trigger Mode (8 registers) */
+	LapicIRR	= 0x0200,	/* Interrupt Request (8 registers) */
+	LapicESR	= 0x0280,	/* Error Status */
+	LapicICRLO	= 0x0300,	/* Interrupt Command */
+	LapicICRHI	= 0x0310,	/* Interrupt Command [63:32] */
+	LapicTIMER	= 0x0320,	/* Local Vector Table 0 (TIMER) */
+	LapicPCINT	= 0x0340,	/* Performance Counter LVT */
+	LapicLINT0	= 0x0350,	/* Local Vector Table 1 (LINT0) */
+	LapicLINT1	= 0x0360,	/* Local Vector Table 2 (LINT1) */
+	LapicERROR	= 0x0370,	/* Local Vector Table 3 (ERROR) */
+	LapicTICR	= 0x0380,	/* Timer Initial Count */
+	LapicTCCR	= 0x0390,	/* Timer Current Count */
+	LapicTDCR	= 0x03E0,	/* Timer Divide Configuration */
 };
 
-enum {						/* Siv */
-	Swen		= 0x00000100,		/* Software Enable */
-	Fdis		= 0x00000200,		/* Focus Disable */
+enum {					/* LapicSVR */
+	LapicENABLE	= 0x00000100,	/* Unit Enable */
+	LapicFOCUS	= 0x00000200,	/* Focus Processor Checking Disable */
 };
 
-enum {						/* Iclo */
-	Lassert		= 0x00004000,		/* Assert level */
+enum {					/* LapicICRLO */
+					/* [14] IPI Trigger Mode Level (RW) */
+	LapicDEASSERT	= 0x00000000,	/* Deassert level-sensitive interrupt */
+	LapicASSERT	= 0x00004000,	/* Assert level-sensitive interrupt */
 
-	DSnone		= 0x00000000,		/* Use Destination Field */
-	DSself		= 0x00040000,		/* Self is only destination */
-	DSallinc	= 0x00080000,		/* All including self */
-	DSallexc	= 0x000c0000,		/* All Excluding self */
+					/* [17:16] Remote Read Status */
+	LapicINVALID	= 0x00000000,	/* Invalid */
+	LapicWAIT	= 0x00010000,	/* In-Progress */
+	LapicVALID	= 0x00020000,	/* Valid */
+
+					/* [19:18] Destination Shorthand */
+	LapicFIELD	= 0x00000000,	/* No shorthand */
+	LapicSELF	= 0x00040000,	/* Self is single destination */
+	LapicALLINC	= 0x00080000,	/* All including self */
+	LapicALLEXC	= 0x000C0000,	/* All Excluding self */
 };
 
-enum {						/* Tlvt */
-	Periodic	= 0x00020000,		/* Periodic Timer Mode */
+enum {					/* LapicESR */
+	LapicSENDCS	= 0x00000001,	/* Send CS Error */
+	LapicRCVCS	= 0x00000002,	/* Receive CS Error */
+	LapicSENDACCEPT	= 0x00000004,	/* Send Accept Error */
+	LapicRCVACCEPT	= 0x00000008,	/* Receive Accept Error */
+	LapicSENDVECTOR	= 0x00000020,	/* Send Illegal Vector */
+	LapicRCVVECTOR	= 0x00000040,	/* Receive Illegal Vector */
+	LapicREGISTER	= 0x00000080,	/* Illegal Register Address */
 };
 
-enum {						/* Tdc */
-	DivX2		= 0x00000000,		/* Divide by 2 */
-	DivX4		= 0x00000001,		/* Divide by 4 */
-	DivX8		= 0x00000002,		/* Divide by 8 */
-	DivX16		= 0x00000003,		/* Divide by 16 */
-	DivX32		= 0x00000008,		/* Divide by 32 */
-	DivX64		= 0x00000009,		/* Divide by 64 */
-	DivX128		= 0x0000000a,		/* Divide by 128 */
-	DivX1		= 0x0000000b,		/* Divide by 1 */
+enum {					/* LapicTIMER */
+					/* [17] Timer Mode (RW) */
+	LapicONESHOT	= 0x00000000,	/* One-shot */
+	LapicPERIODIC	= 0x00020000,	/* Periodic */
+
+					/* [19:18] Timer Base (RW) */
+	LapicCLKIN	= 0x00000000,	/* use CLKIN as input */
+	LapicTMBASE	= 0x00040000,	/* use TMBASE */
+	LapicDIVIDER	= 0x00080000,	/* use output of the divider */
+};
+
+static uint8_t lapictdxtab[] = {		/* LapicTDCR */
+	0x0B,	/* divide by 1 */
+	0x00,	/* divide by 2 */
+	0x01,	/* divide by 4 */
+	0x02,	/* divide by 8 */
+	0x03,	/* divide by 16 */
+	0x08,	/* divide by 32 */
+	0x09,	/* divide by 64 */
+	0x0A,	/* divide by 128 */
 };
 
 static uint32_t* lapicbase;
 
-static	Lapic	xlapic[Napic];
-
-Lapic*
-lapiclookup(uint32_t id)
+typedef struct Apictimer Apictimer;
+struct Apictimer
 {
-	Lapic *a;
+	uint64_t	hz;
+	uint32_t	max;
+	uint32_t	min;
+	uint32_t	div;
+	int	tdx;
+};
 
-	if(id >= nelem(xlapic))
-		return nil;
-	a = xlapic + id;
-	if(a->useable)
-		return a;
-	return nil;
-}
+static Apictimer lapictimer[MACHMAX];
 
 static uint32_t
-lapicrget(int r)
+lapicr(int r)
 {
-	return lapicbase[r/4];
+	return *(lapicbase+(r/sizeof(*lapicbase)));
 }
 
 static void
-lapicrput(int r, uint32_t data)
+lapicw(int r, uint32_t data)
 {
-	if(lapicbase != nil){
-		/* early panics can occur with lapicbase uninitialized
-		 * but if we let it fault, we loose the actual panic PC
-		 */
-		lapicbase[r/4] = data;
-	}
-}
-
-int
-lapiceoi(int vecno)
-{
-	lapicrput(Eoi, 0);
-	return vecno;
-}
-
-int
-lapicisr(int vecno)
-{
-	int isr;
-
-	isr = lapicrget(Is + (vecno/32)*16);
-
-	return isr & (1<<(vecno%32));
-}
-
-static char*
-lapicprint(char *p, char *e, Lapic *a, int i)
-{
-	char *s;
-
-	s = "proc";
-	p = jehanne_seprint(p, e, "%-8s ", s);
-	p = jehanne_seprint(p, e, "%8ux ", i);
-//	p = jehanne_seprint(p, e, "%.8ux ", a->dest);
-//	p = jehanne_seprint(p, e, "%.8ux ", a->mask);
-//	p = jehanne_seprint(p, e, "%c", a->flags & PcmpBP? 'b': ' ');
-//	p = jehanne_seprint(p, e, "%c ", a->flags & PcmpEN? 'e': ' ');
-//	p = jehanne_seprint(p, e, "%8ux %8ux", a->lintr[0], a->lintr[1]);
-	p = jehanne_seprint(p, e, "%12d\n", a->machno);
-	return p;
-}
-
-static long
-lapicread(Chan* _1, void *a, long n, int64_t off)
-{
-	char *s, *e, *p;
-	long i, r;
-
-	s = jehanne_malloc(READSTR);
-	e = s+READSTR;
-	p = s;
-
-	for(i = 0; i < nelem(xlapic); i++)
-		if(xlapic[i].useable)
-			p = lapicprint(p, e, xlapic + i, i);
-	r = -1;
-	if(!waserror()){
-		r = readstr(off, a, n, s);
-		poperror();
-	}
-	jehanne_free(s);
-	return r;
+	*(lapicbase+(r/sizeof(*lapicbase))) = data;
+	data = *(lapicbase+(LapicID/sizeof(*lapicbase)));
+	USED(data);
 }
 
 void
-lapicinit(int lapicno, uintmem pa, int isbp)
-{
-	Lapic *apic;
-
-	/*
-	 * Mark the LAPIC useable if it has a good ID, and the registers can
-	 * be mapped.  There is x2LAPIC to be dealt with at some point.
-	 */
-	DBG("lapicinit: lapicno %d pa %#P isbp %d caller %#p\n", lapicno, pa, isbp, getcallerpc());
-	addarchfile("lapic", 0444, lapicread, nil);
-
-	if(lapicno >= Napic){
-		panic("lapicinit%d: out of range", lapicno);
-		return;
-	}
-	if((apic = &xlapic[lapicno])->useable){
-		jehanne_print("lapicinit%d: already initialised\n", lapicno);
-		return;
-	}
-	if(lapicbase == nil){
-		//adrmapck(pa, 1024, Ammio, Mfree, Cnone);
-		if((lapicbase = vmap(pa, 1024)) == nil){
-			panic("lapicinit%d: can't map lapicbase %#P", lapicno, pa);
-			return;
-		}
-		DBG("lapicinit%d: lapicbase %#P -> %#p\n", lapicno, pa, lapicbase);
-	}
-	apic->useable = 1;
-
-	/*
-	 * Assign a machno to the processor associated with this
-	 * LAPIC, it may not be an identity map.
-	 * Machno 0 is always the bootstrap processor.
-	 */
-	if(isbp){
-		apic->machno = 0;
-		m->apicno = lapicno;
-	}
-	else
-		apic->machno = sys->nmach++;
-}
-
-void
-lapicsetdom(int lapicno, int dom)
-{
-	Lapic *apic;
-
-	DBG("lapic%d: setdom: %d\n", lapicno, dom);
-	if(lapicno >= Napic){
-		panic("lapic%d: lapicsetdom: apic out of range", lapicno);
-		return;
-	}
-	if((apic = &xlapic[lapicno])->useable)
-		apic->dom = dom;
-	else
-		jehanne_print("lapic%d: lapicsetdom: apic not usable\n", lapicno);
-}
-
-int
-machdom(Mach *mp)
-{
-	return xlapic[mp->apicno].dom;
-}
-
-static void
-lapicdump0(Lapic *apic, int i)
-{
-	if(!apic->useable)
-		return;
-	DBG("lapic%d: machno %d lint0 %#8.8ux lint1 %#8.8ux\n",
-		i, apic->machno, apic->lvt[0], apic->lvt[1]);
-	DBG(" tslvt %#8.8ux pclvt %#8.8ux elvt %#8.8ux\n",
-		lapicrget(Tslvt), lapicrget(Pclvt), lapicrget(Elvt));
-	DBG(" tlvt %#8.8ux lint0 %#8.8ux lint1 %#8.8ux siv %#8.8ux\n",
-		lapicrget(Tlvt), lapicrget(Lint0),
-		lapicrget(Lint1), lapicrget(Siv));
-}
-
-void
-lapicdump(void)
-{
-	int i;
-
-	if(!DBGFLG)
-		return;
-
-	DBG("lapicbase %#p\n", lapicbase);
-	for(i = 0; i < Napic; i++)
-		lapicdump0(xlapic + i, i);
-}
-
-int
 lapiconline(void)
 {
-	Lapic *apic;
-	uint64_t tsc;
-	uint32_t dfr, ver;
-	int apicno, nlvt;
+	Apictimer *a;
 
-	if(lapicbase == nil)
-		panic("lapiconline: no lapic base");
-
-	if((apicno = ((lapicrget(Id)>>24) & 0xff)) >= Napic)
-		panic("lapic: id too large %d", apicno);
-	if(apicno != m->apicno){
-		panic("lapic: %d != %d", m->apicno, apicno);
-		dfr = lapicrget(Id) & ~(0xff<<24);
-		dfr |= m->apicno<<24;
-		lapicrput(Id, dfr);
-		apicno = m->apicno;
-	}
-	apic = &xlapic[apicno];
-	if(!apic->useable)
-		panic("lapiconline: lapic%d: unusable %d", apicno, apic->useable);
+	a = &lapictimer[m->machno];
 
 	/*
-	 * Things that can only be done when on the processor
-	 * owning the APIC, apicinit above runs on the bootstrap
-	 * processor.
+	 * Reload the timer to de-synchronise the processors,
+	 * then lower the task priority to allow interrupts to be
+	 * accepted by the APIC.
 	 */
-	ver = lapicrget(Ver);
-	nlvt = ((ver>>16) & 0xff) + 1;
-	if(nlvt > nelem(apic->lvt)){
-		jehanne_print("lapiconline%d: nlvt %d > max (%d)\n",
-			apicno, nlvt, nelem(apic->lvt));
-		nlvt = nelem(apic->lvt);
+	microdelay((TK2MS(1)*1000/sys->nmach) * m->machno);
+	lapicw(LapicTICR, a->max);
+	lapicw(LapicTIMER, LapicCLKIN|LapicPERIODIC|(VectorPIC+IrqTIMER));
+
+	/*
+	 * not strickly neccesary, but reported (osdev.org) to be
+	 * required for some machines.
+	 */
+	lapicw(LapicTDCR, lapictdxtab[a->tdx]);
+
+	lapicw(LapicTPR, 0);
+}
+
+/*
+ *  use the i8253/tsc clock to figure out our lapic timer rate.
+ */
+static void
+lapictimerinit(void)
+{
+	uint64_t x, v, hz;
+	Apictimer *a;
+	int s;
+
+	if(m->machno != 0){
+		lapictimer[m->machno] = lapictimer[0];
+		return;
 	}
-	apic->nlvt = nlvt;
-	apic->ver = ver & 0xff;
+
+	s = splhi();
+	a = &lapictimer[m->machno];
+	a->tdx = 0;
+Retry:
+	lapicw(LapicTIMER, ApicIMASK|LapicCLKIN|LapicONESHOT|(VectorPIC+IrqTIMER));
+	lapicw(LapicTDCR, lapictdxtab[a->tdx]);
+
+	x = fastticks(&hz);
+	x += hz/10;
+	lapicw(LapicTICR, 0xffffffff);
+	do{
+		v = fastticks(nil);
+	}while(v < x);
+
+	v = (0xffffffffUL-lapicr(LapicTCCR))*10;
+	if(v > hz-(hz/10)){
+		if(v > hz+(hz/10) && a->tdx < nelem(lapictdxtab)-1){
+			a->tdx++;
+			goto Retry;
+		}
+		v = hz;
+	}
+
+	assert(v >= (100*HZ));
+
+	a->hz = v;
+	a->div = hz/a->hz;
+	a->max = a->hz/HZ;
+	a->min = a->hz/(100*HZ);
+
+	splx(s);
+
+	v = (v+500000LL)/1000000LL;
+	print("cpu%d: lapic clock at %lludMHz\n", m->machno, v);
+}
+
+void
+lapicinit(Apic* apic)
+{
+	uint32_t dfr, ldr, lvt;
+
+	if(lapicbase == 0)
+		lapicbase = apic->addr;
 
 	/*
 	 * These don't really matter in Physical mode;
 	 * set the defaults anyway.
 	 */
-//	if(jehanne_memcmp(m->cpuinfo, "AuthenticAMD", 12) == 0)
-//		dfr = 0xf0000000;
-//	else
+	if(strncmp(m->cpuidid, "AuthenticAMD", 12) == 0)
+		dfr = 0xf0000000;
+	else
 		dfr = 0xffffffff;
-	lapicrput(Df, dfr);
-	lapicrput(Ld, 0x00000000);
+	ldr = 0x00000000;
+
+	lapicw(LapicDFR, dfr);
+	lapicw(LapicLDR, ldr);
+	lapicw(LapicTPR, 0xff);
+	lapicw(LapicSVR, LapicENABLE|(VectorPIC+IrqSPURIOUS));
+
+	lapictimerinit();
 
 	/*
-	 * Disable interrupts until ready by setting the Task Priority
-	 * register to 0xff.
+	 * Some Pentium revisions have a bug whereby spurious
+	 * interrupts are generated in the through-local mode.
 	 */
-	lapicrput(Tp, 0xff);
-
-	/*
-	 * Software-enable the APIC in the Spurious Interrupt Vector
-	 * register and set the vector number. The vector number must have
-	 * bits 3-0 0x0f unless the Extended Spurious Vector Enable bit
-	 * is set in the HyperTransport Transaction Control register.
-	 */
-	lapicrput(Siv, Swen|IdtSPURIOUS);
-
-	/*
-	 * Acknowledge any outstanding interrupts.
-	 */
-	lapicrput(Eoi, 0);
-
-	/*
-	 * Use the TSC to determine the lapic timer frequency.
-	 * It might be possible to snarf this from a chipset
-	 * register instead.
-	 */
-	lapicrput(Tdc, DivX1);
-	lapicrput(Tlvt, Im);
-	tsc = rdtsc() + m->cpuhz/10;
-	lapicrput(Tic, 0xffffffff);
-
-	while(rdtsc() < tsc)
-		;
-
-	apic->hz = (0xffffffff-lapicrget(Tcc))*10;
-	apic->max = apic->hz/HZ;
-	apic->min = apic->hz/(100*HZ);
-	apic->div = ((m->cpuhz/apic->max)+HZ/2)/HZ;
-
-	if(m->machno == 0 || DBGFLG){
-		jehanne_print("lapic%d: hz %lld max %lld min %lld div %lld\n", apicno,
-			apic->hz, apic->max, apic->min, apic->div);
-	}
-
-	/*
-	 * Mask interrupts on Performance Counter overflow and
-	 * Thermal Sensor if implemented, and on Lintr0 (Legacy INTR),
-	 * and Lintr1 (Legacy NMI).
-	 * Clear any Error Status (write followed by read) and enable
-	 * the Error interrupt.
-	 */
-	switch(apic->nlvt){
-	case 7:
-	case 6:
-		lapicrput(Tslvt, Im);
-		/*FALLTHROUGH*/
-	case 5:
-		lapicrput(Pclvt, Im);
-		/*FALLTHROUGH*/
-	default:
+	switch(m->cpuidax & 0xFFF){
+	case 0x526:				/* stepping cB1 */
+	case 0x52B:				/* stepping E0 */
+	case 0x52C:				/* stepping cC0 */
+		wrmsr(0x0E, 1<<14);		/* TR12 */
 		break;
 	}
-	lapicrput(Lint1, apic->lvt[1]|Im|IdtLINT1);
-	lapicrput(Lint0, apic->lvt[0]|Im|IdtLINT0);
-
-	lapicrput(Es, 0);
-	lapicrget(Es);
-	lapicrput(Elvt, IdtERROR);
 
 	/*
-	 * Reload the timer to de-synchronise the processors.
-	 * When the caller is ready for the APIC to accept interrupts,
-	 * it should call lapicpri to lower the task priority.
-	 *
-	 * The timer is enabled later by the core-specific startup
-	 * i.e. don't start the timer unless the core needs it,
-	 * to reduce the likelihood of at least one (spurious) interrupt
-	 * from the timer when priority is lowered.
+	 * Set the local interrupts. It's likely these should just be
+	 * masked off for SMP mode as some Pentium Pros have problems if
+	 * LINT[01] are set to ExtINT.
+	 * Acknowledge any outstanding interrupts.
+	lapicw(LapicLINT0, apic->lintr[0]);
+	lapicw(LapicLINT1, apic->lintr[1]);
 	 */
-	microdelay((TK2MS(1)*1000/sys->nmach) * m->machno);
-	lapicrput(Tic, apic->max);
-	return 1;
-}
+	lapiceoi(0);
+
+	lvt = (lapicr(LapicVER)>>16) & 0xFF;
+	if(lvt >= 4)
+		lapicw(LapicPCINT, ApicIMASK);
+	lapicw(LapicERROR, VectorPIC+IrqERROR);
+	lapicw(LapicESR, 0);
+	lapicr(LapicESR);
 
-void
-lapictimerenable(void)
-{
 	/*
-	 * Perhaps apictimerenable/apictimerdisable should just
-	 * clear/set Im in the existing settings of Tlvt, there may
-	 * be a time when the timer is used in a different mode;
-	 * if so will need to ensure the mode is set when the timer
-	 * is initialised.
+	 * Issue an INIT Level De-Assert to synchronise arbitration ID's.
+	 */
+	lapicw(LapicICRHI, 0);
+	lapicw(LapicICRLO, LapicALLINC|ApicLEVEL|LapicDEASSERT|ApicINIT);
+	while(lapicr(LapicICRLO) & ApicDELIVS)
+		;
+
+	/*
+	 * Do not allow acceptance of interrupts until all initialisation
+	 * for this processor is done. For the bootstrap processor this can be
+	 * early duing initialisation. For the application processors this should
+	 * be after the bootstrap processor has lowered priority and is accepting
+	 * interrupts.
+	lapicw(LapicTPR, 0);
 	 */
-	lapicrput(Tlvt, Periodic|IdtTIMER);
 }
 
 void
-lapictimerdisable(void)
-{
-	lapicrput(Tlvt, Im|IdtTIMER);
-}
-
-void
-lapictimerset(uint64_t next)
-{
-	Lapic *apic;
-	int64_t period;
-
-	apic = &xlapic[(lapicrget(Id)>>24) & 0xff];
-
-	ilock(&m->apictimerlock);
-
-	period = apic->max;
-	if(next != 0){
-		if(apic->div == 0){
-			jehanne_print("lapictimerset: apic not ready, wait for gdb\n");
-			waitdebugger();
-		}
-		period = next - fastticks(nil);	/* fastticks is just rdtsc() */
-		period /= apic->div;
-
-		if(period < apic->min)
-			period = apic->min;
-		else if(period > apic->max - apic->min)
-			period = apic->max;
-	}
-	lapicrput(Tic, period);
-
-	iunlock(&m->apictimerlock);
-}
-
-void
-lapicsipi(int lapicno, uintmem pa)
+lapicstartap(Apic* apic, uintptr_t pa)
 {
 	int i;
 	uint32_t crhi, crlo;
 
-	/*
-	 * SIPI - Start-up IPI.
-	 * To do: checks on lapic validity.
-	 */
-	crhi = lapicno<<24;
-	lapicrput(Ichi, crhi);
-	lapicrput(Iclo, DSnone|TMlevel|Lassert|MTir);
+	/* make apic's processor do a warm reset */
+	crhi = apic->apicno<<24;
+	lapicw(LapicICRHI, crhi);
+	lapicw(LapicICRLO, LapicFIELD|ApicLEVEL|LapicASSERT|ApicINIT);
 	microdelay(200);
-	lapicrput(Iclo, DSnone|TMlevel|MTir);
+	lapicw(LapicICRLO, LapicFIELD|ApicLEVEL|LapicDEASSERT|ApicINIT);
 	delay(10);
 
-	crlo = DSnone|TMedge|MTsipi|((uint32_t)pa/(4*KiB));
+	/* assumes apic is not an 82489dx */
+	crlo = LapicFIELD|ApicEDGE|ApicSTARTUP|((uint32_t)pa/BY2PG);
 	for(i = 0; i < 2; i++){
-		lapicrput(Ichi, crhi);
-		lapicrput(Iclo, crlo);
+		lapicw(LapicICRHI, crhi);
+		/* make apic's processor start at v in real mode */
+		lapicw(LapicICRLO, crlo);
 		microdelay(200);
 	}
 }
 
 void
-lapicipi(int lapicno)
+lapicerror(Ureg* _, void* __)
 {
-	lapicrput(Ichi, lapicno<<24);
-	lapicrput(Iclo, DSnone|TMedge|Lassert|MTf|IdtIPI);
-	while(lapicrget(Iclo) & Ds)
-		;
+	uint32_t esr;
+
+	lapicw(LapicESR, 0);
+	esr = lapicr(LapicESR);
+	switch(m->cpuidax & 0xFFF){
+	case 0x526:				/* stepping cB1 */
+	case 0x52B:				/* stepping E0 */
+	case 0x52C:				/* stepping cC0 */
+		return;
+	}
+	print("cpu%d: lapicerror: 0x%8.8luX\n", m->machno, esr);
 }
 
 void
-lapicpri(int pri)
+lapicspurious(Ureg* _, void* __)
 {
-	lapicrput(Tp, pri);
+	print("cpu%d: lapicspurious\n", m->machno);
+}
+
+int
+lapicisr(int v)
+{
+	uint32_t isr;
+
+	isr = lapicr(LapicISR + (v/32));
+
+	return isr & (1<<(v%32));
+}
+
+int
+lapiceoi(int v)
+{
+	lapicw(LapicEOI, 0);
+
+	return v;
+}
+
+void
+lapicicrw(uint32_t hi, uint32_t lo)
+{
+	lapicw(LapicICRHI, hi);
+	lapicw(LapicICRLO, lo);
+}
+
+void
+ioapicrdtr(Apic* apic, int sel, int* hi, int* lo)
+{
+	uint32_t *iowin;
+
+	iowin = apic->addr+(0x10/sizeof(uint32_t));
+	sel = IoapicRDT + 2*sel;
+
+	lock(apic);
+	*apic->addr = sel+1;
+	if(hi)
+		*hi = *iowin;
+	*apic->addr = sel;
+	if(lo)
+		*lo = *iowin;
+	unlock(apic);
+}
+
+void
+ioapicrdtw(Apic* apic, int sel, int hi, int lo)
+{
+	uint32_t *iowin;
+
+	iowin = apic->addr+(0x10/sizeof(uint32_t));
+	sel = IoapicRDT + 2*sel;
+
+	lock(apic);
+	*apic->addr = sel+1;
+	*iowin = hi;
+	*apic->addr = sel;
+	*iowin = lo;
+	unlock(apic);
+}
+
+void
+ioapicinit(Apic* apic, int apicno)
+{
+	int hi, lo, v;
+	uint32_t *iowin;
+
+	/*
+	 * Initialise the I/O APIC.
+	 * The MultiProcessor Specification says it is the responsibility
+	 * of the O/S to set the APIC id.
+	 * Make sure interrupts are all masked off for now.
+	 */
+	iowin = apic->addr+(0x10/sizeof(uint32_t));
+	lock(apic);
+	*apic->addr = IoapicVER;
+	apic->mre = (*iowin>>16) & 0xFF;
+
+	*apic->addr = IoapicID;
+	*iowin = apicno<<24;
+	unlock(apic);
+
+	hi = 0;
+	lo = ApicIMASK;
+	for(v = 0; v <= apic->mre; v++)
+		ioapicrdtw(apic, v, hi, lo);
+}
+
+void
+lapictimerset(uint64_t next)
+{
+	int64_t period;
+	Apictimer *a;
+
+	a = &lapictimer[m->machno];
+	period = next - fastticks(nil);
+	period /= a->div;
+	if(period < a->min)
+		period = a->min;
+	else if(period > a->max - a->min)
+		period = a->max;
+	lapicw(LapicTICR, period);
+}
+
+void
+lapicclock(Ureg *u, void* _)
+{
+	/*
+	 * since the MTRR updates need to be synchronized across processors,
+	 * we want to do this within the clock tick.
+	 */
+	mtrrclock();
+	timerintr(u, 0);
+}
+
+void
+lapicintron(void)
+{
+	lapicw(LapicTPR, 0);
+}
+
+void
+lapicintroff(void)
+{
+	lapicw(LapicTPR, 0xFF);
+}
+
+void
+lapicnmienable(void)
+{
+	lapicw(LapicPCINT, ApicNMI);
+}
+
+void
+lapicnmidisable(void)
+{
+	lapicw(LapicPCINT, ApicIMASK);
 }
diff --git a/sys/src/kern/amd64/laptop.json b/sys/src/kern/amd64/laptop.json
index b163b89..de4dac5 100644
--- a/sys/src/kern/amd64/laptop.json
+++ b/sys/src/kern/amd64/laptop.json
@@ -6,7 +6,6 @@
 		"Include": [
 			"core.json",
 			"devdraw.json",
-			"../386/include.json",
 			"../ip/include.json",
 			"../port/include.json"
 		],
@@ -18,7 +17,6 @@
 					"int printallsyscalls;"
 				],
 				"Dev": [
-					"acpi",
 					"arch",
 					"bridge",
 					"cap",
@@ -85,7 +83,6 @@
 		"SourceFiles": [
 			"autogenerated.c",
 			"cga.c",
-			"devacpi.c",
 			"usbehcipc.c",
 			"usbohci.c",
 			"usbuhci.c"
diff --git a/sys/src/kern/amd64/main.c b/sys/src/kern/amd64/main.c
index 8e60ac7..1c6f14b 100644
--- a/sys/src/kern/amd64/main.c
+++ b/sys/src/kern/amd64/main.c
@@ -1,7 +1,7 @@
 /*
  * This file is part of Jehanne.
  *
- * Copyright (C) 2015-2016 Giacomo Tesio <giacomo@tesio.it>
+ * Copyright (C) 2015-2017 Giacomo Tesio <giacomo@tesio.it>
  *
  * Jehanne is free software: you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -20,19 +20,16 @@
 #include "mem.h"
 #include "dat.h"
 #include "fns.h"
+#include "ureg.h"
+#include "pool.h"
 
 #include "io.h"
 #include "apic.h"
 
-extern void confoptions(void);	/* XXX - must go */
-extern void confsetenv(void);	/* XXX - must go */
-
 static uintptr_t sp;		/* XXX - must go - user stack of init proc */
 
-Sys* sys = (Sys*)0x1;		/* dummy value to put it in data section
-				 * - entry.S set it correctly
-				 * - main memset to zero the bss section
-				 */
+Sys system;
+Sys* sys;
 usize sizeofSys = sizeof(Sys);
 
 /*
@@ -42,7 +39,7 @@ usize sizeofSys = sizeof(Sys);
  * set it all up.
  */
 static int64_t oargc;
-static char* oargv[20];
+static char* oargv[64];
 static char oargb[1024];
 static int oargblen;
 
@@ -51,7 +48,6 @@ static int numtcs = 32;		/* initial # of TCs */
 IOConf	ioconf;
 int	procmax;
 
-char *cputype = "amd64";
 char dbgflg[256];
 static int vflag = 1;
 
@@ -63,6 +59,30 @@ optionsinit(char* s)
 	oargv[oargc] = nil;
 }
 
+char*
+getconf(char *name)
+{
+	int i;
+	char *a;
+
+	for(i = 0; i < oargc; i++){
+		a = strstr(oargv[i], name);
+		if(a == oargv[i]){
+			a += strlen(name);
+			if(a[0] == '=')
+				return ++a;
+		}
+	}
+	return nil;
+}
+
+int
+isaconfig(char *class, int ctlrno, ISAConf *isa)
+{
+	return 0;
+}
+
+
 static void
 options(int argc, char* argv[])
 {
@@ -129,251 +149,204 @@ loadenv(int argc, char* argv[])
 }
 
 void
-squidboy(int apicno)
+initialize_processor(void)
 {
-	int64_t hz;
+	int machno;
+	Segdesc *gdt;
+	uintptr_t *pml4;
 
-	sys->machptr[m->machno] = m;
-
-	/*
-	 * Need something for initial delays
-	 * until a timebase is worked out.
-	 */
-	m->cpuhz = sys->machptr[0]->cpuhz;
-	m->cyclefreq = m->cpuhz;
-	m->cpumhz = sys->machptr[0]->cpumhz;
+	machno = m->machno;
+	pml4 = m->pml4;
+	gdt = m->gdt;
+	memset(m, 0, sizeof(Mach));
+	m->machno = machno;
+	m->pml4 = pml4;
+	m->gdt = gdt;
 	m->perf.period = 1;
 
-	DBG("Hello Squidboy %d %d\n", apicno, m->machno);
-
-	vsvminit(MACHSTKSZ);
-
 	/*
-	 * Beware the Curse of The Non-Interruptable Were-Temporary.
+	 * For polled uart output at boot, need
+	 * a default delay constant. 100000 should
+	 * be enough for a while. Cpuidentify will
+	 * calculate the real value later.
 	 */
-	hz = archhz();
-	if(hz == 0)
-		ndnr();
-	m->cpuhz = hz;
-	m->cpumhz = hz/1000000ll;
-
-	archenable();
-
-	mmuinit();
-	if(!lapiconline())
-		ndnr();
-
-	fpuinit();
-
-	/*
-	 * Handshake with sipi to let it
-	 * know the Startup IPI succeeded.
-	 */
-	m->splpc = 0;
-
-	/*
-	 * Handshake with main to proceed with initialisation.
-	 */
-	while(sys->epoch == 0)
-		;
-	wrmsr(0x10, sys->epoch);
-	m->rdtsc = rdtsc();
-
-	DBG("mach %d is go %#p %#p %3p\n", m->machno, m, m->pml4->pte, &apicno);
-
-	timersinit();
-
-	/*
-	 * Cannot allow interrupts while waiting for online.
-	 * However, by taking the lowering of the APIC task priority
-	 * out of apiconline something could be done here with
-	 * MONITOR/MWAIT perhaps to drop the energy used by the
-	 * idle core.
-	 */
-	while(!m->online)
-		pause();
-	lapictimerenable();
-	lapicpri(0);
-
-	jehanne_print("mach%d: online color %d\n", m->machno, m->color);
-	schedinit();
-
-	panic("squidboy returns (type %d)", m->mode);
+	m->loopconst = 100000;
 }
 
-#define	D(c)	if(0)outb(0x3f8, (c))
-
-void
-main(uint32_t ax, uint32_t bx)
+static void
+initialize_boot_processor(void)
 {
-	int i;
-	int64_t hz;
-	char *p;
+	system.nmach = 1;
 
-	jehanne_memset(edata, 0, end - edata);
+	system.machptr[0] = m;	/* m was set by entry.S */
 
-	/*
-	 * ilock via i8250enable via i8250console
-	 * needs m->machno, sys->machptr[] set, and
-	 * also 'up' set to nil.
-	 */
-	cgapost(sizeof(uintptr_t)*8);
-	jehanne_memset(m, 0, sizeof(Mach));
 	m->machno = 0;
+	m->pml4 = (uint64_t*)CPU0PML4;
+	m->gdt = (Segdesc*)CPU0GDT;
+
+	initialize_processor();
+
+	active.machs[0] = 1;
 	m->online = 1;
-	sys->machptr[m->machno] = &sys->mach;
-	m->stack = PTR2UINT(sys->machstk);
-	m->vsvm = sys->vsvmpage;
-	sys->nmach = 1;
-	sys->nonline = 1;
-	sys->copymode = 0;	/* copy on write */
-	up = nil;
-
-	confoptions();
-	asminit();
-	multiboot(ax, bx, 0);
-	options(oargc, oargv);
-	p = getconf("*dbflags");
-	if(p != nil){
-		for(; *p != 0; p++)
-			if(*p >= 'a' && *p <= 'z' || *p >= 'A' && *p <= 'Z')
-				dbgflg[(uint8_t)*p] = 1;
-	}
-
-	/*
-	 * Need something for initial delays
-	 * until a timebase is worked out.
-	 */
-	m->cpuhz = 2000000000ll;
-	m->cpumhz = 2000;
-
-	cgainit();
-	i8250console("0");
-	consputs = cgaconsputs;
-
-	vsvminit(MACHSTKSZ);
-
 	active.exiting = 0;
+}
 
-	fmtinit();
-	jehanne_print("\nJehanne Operating System\n");
+static void
+intialize_system(void)
+{
+	extern Ureg _boot_registers;
+	uintptr_t p;
 
-	if(vflag){
-		jehanne_print("&ax = %#p, ax = %#ux, bx = %#ux\n", &ax, ax, bx);
-		multiboot(ax, bx, vflag);
-	}
-	e820();
+	p = (uintptr_t)&_boot_registers;
+	p += KZERO;
+	sys = &system;
+	sys->boot_regs = (void*)p;
+	sys->architecture = "amd64";
+}
 
-	m->perf.period = 1;
-	if((hz = archhz()) != 0ll){
-		m->cpuhz = hz;
-		m->cpumhz = hz/1000000ll;
+static void
+configure_kernel(void)
+{
+	char *p;
+	int i, userpcnt;
+	unsigned int kpages;
+
+	if(p = getconf("service")){
+		if(strcmp(p, "cpu") == 0)
+			cpuserver = 1;
+		else if(strcmp(p,"terminal") == 0)
+			cpuserver = 0;
 	}
 
-	archenable();
+	/* memory */
+	if(p = getconf("*kernelpercent"))
+		userpcnt = 100 - strtol(p, 0, 0);
+	else
+		userpcnt = 0;
 
-	/*
-	 * Mmuinit before meminit because it
-	 * makes mappings and
-	 * flushes the TLB via m->pml4->pa.
-	 */
-	mmuinit();
+	sys->npages = 0;
+	for(i=0; i<nelem(sys->mem); i++)
+		sys->npages += sys->mem[i].npage;
 
-	ioinit();
-	keybinit();
-
-	meminit();
-	archinit();
-	physallocinit();
-D('a');
-	mallocinit();
-D('b');
-	memdebug();
-	trapinit();
-D('c');
-
-	/*
-	 * Printinit will cause the first malloc
-	 * call to happen (printinit->qopen->malloc).
-	 * If the system dies here it's probably due
-	 * to malloc not being initialised
-	 * correctly, or the data segment is misaligned
-	 * (it's amazing how far you can get with
-	 * things like that completely broken).
-	 */
-	printinit();
-D('d');
-	/*
-	 * This is necessary with GRUB and QEMU.
-	 * Without it an interrupt can occur at a weird vector,
-	 * because the vector base is likely different, causing
-	 * havoc. Do it before any APIC initialisation.
-	 */
-	i8259init(IdtPIC);
-D('e');
-
-	acpiinit(MACHMAX);
-D('f');
-//	mpsinit();
-D('g');
-	lapiconline();
-	ioapiconline();
-D('h');
-	intrenable(IdtTIMER, timerintr, 0, -1, "APIC timer");
-	lapictimerenable();
-	lapicpri(0);
-D('i');
-
-	timersinit();
-D('j');
-	keybenable();
-	mouseenable();
-D('k');
-	fpuinit();
-D('l');
+	/* processes */
 	p = getconf("*procmax");
 	if(p != nil)
-		procmax = jehanne_strtoull(p, nil, 0);
-	if(procmax == 0)
-		procmax = 2000;
-	psinit(procmax);
-D('m');
-//	imagepool_init();
-D('n');
-	links();
-D('o');
-	devtabreset();
-D('p');
-	umem_init();
-D('r');
-
-	userinit();
-D('s');
-	if(!dbgflg['S'])
-		sipi();
-D('t');
-
-	sys->epoch = rdtsc();
-	wrmsr(0x10, sys->epoch);
-	m->rdtsc = rdtsc();
-
-D('u');
-	/*
-	 * Release the hounds.
-	 */
-	for(i = 1; i < MACHMAX; i++){
-		if(sys->machptr[i] == nil)
-			continue;
-
-		ainc(&sys->nonline);
-
-		sys->machptr[i]->color = corecolor(i);
-		if(sys->machptr[i]->color < 0)
-			sys->machptr[i]->color = 0;
-		sys->machptr[i]->online = 1;
+		sys->nproc = jehanne_strtoull(p, nil, 0);
+	if(sys->nproc == 0){
+		sys->nproc = 100 + ((sys->npages*PGSZ)/MiB)*5;
+		if(cpuserver)
+			sys->nproc *= 3;
 	}
-D('v');
-prflush();
+	if(sys->nproc > 2046){
+		/* devproc supports at most (2^11)-2 processes */
+		sys->nproc = 2046;
+	}
+	sys->nimage = 256;
+
+	if(cpuserver) {
+		if(userpcnt < 10)
+			userpcnt = 70;
+		kpages = sys->npages - (sys->npages*userpcnt)/100;
+		sys->nimage = sys->nproc;
+	} else {
+		if(userpcnt < 10) {
+			if(sys->npages*PGSZ < 16*MiB)
+				userpcnt = 50;
+			else
+				userpcnt = 60;
+		}
+		kpages = sys->npages - (sys->npages*userpcnt)/100;
+
+		/*
+		 * Make sure terminals with low memory get at least
+		 * 4MB on the first Image chunk allocation.
+		 */
+		if(sys->npages*PGSZ < 16*MiB)
+			imagmem->minarena = 4*MiB;
+	}
+
+	/*
+	 * can't go past the end of virtual memory.
+	 */
+	if(kpages > ((uintptr_t)-KZERO)/PGSZ)
+		kpages = ((uintptr_t)-KZERO)/PGSZ;
+
+	sys->upages = sys->npages - kpages;
+	sys->ialloc = (kpages/2)*PGSZ;
+
+	/*
+	 * Guess how much is taken by the large permanent
+	 * datastructures. Mntcache and Mntrpc are not accounted for.
+	 */
+	kpages *= PGSZ;
+	kpages -= sys->nproc*sizeof(Proc);
+	mainmem->maxsize = kpages;
+
+	/*
+	 * the dynamic allocation will balance the load properly,
+	 * hopefully. be careful with 32-bit overflow.
+	 */
+	imagmem->maxsize = kpages - (kpages/10);
+	if(p = getconf("*imagemaxmb")){
+		imagmem->maxsize = strtol(p, nil, 0)*MiB;
+		if(imagmem->maxsize > mainmem->maxsize)
+			imagmem->maxsize = mainmem->maxsize;
+	}
+
+
+}
+
+void
+main(void)
+{
+	intialize_system();
+	initialize_boot_processor();
+
+	multiboot(0);
+	options(oargc, oargv);
+
+	ioinit();
+	i8250console();
+	fmtinit();
+	screen_init();
+
+	jehanne_print("\nJehanne Operating System\n");
+
+	trapinit0();
+//	i8259init();
+
+	i8253init();
+	cpuidentify();
+	meminit();
+
+	configure_kernel();
+
+	xinit();
+	archinit();
+//	bootscreeninit();
+//	if(i8237alloc != nil)
+//		i8237alloc();
+	trapinit();
+	printinit();
+	cpuidprint();
+	mmuinit();
+	if(arch->intrinit)
+		arch->intrinit();
+	timersinit();
+//	keybinit();
+//	keybenable();
+//	mouseenable();
+	mathinit();
+	if(arch->clockenable)
+		arch->clockenable();
+
+	psinit(sys->nproc);
+
+	links();
+
+	devtabreset();
+	umem_init();
+	userinit();
 	schedinit();
 }
 
@@ -384,8 +357,6 @@ init0(void)
 
 	up->nerrlab = 0;
 
-//	if(consuart == nil)
-//		i8250console("0");
 	spllo();
 
 	/*
@@ -408,11 +379,11 @@ init0(void)
 			ksetenv("service", "cpu", 0);
 		else
 			ksetenv("service", "terminal", 0);
-		confsetenv();
 		poperror();
 	}
 	kproc("alarm", alarmkproc, 0);
-	kproc("awake", awakekproc, 0);
+	kproc("atimer", awake_timer, 0);
+	kproc("aringer", awake_ringer, 0);
 	touser(sp);
 }
 
@@ -461,17 +432,23 @@ userinit(void)
 	char *k;
 	uintptr_t va, mmuphys;
 
-	p = newproc();
-	p->pgrp = newpgrp();
-	p->egrp = smalloc(sizeof(Egrp));
-	p->egrp->r.ref = 1;
-	p->fgrp = dupfgrp(nil);
-	p->rgrp = newrgrp();
-	p->procmode = 0640;
+	/* NOTE: we use the global pointer up so that the kaddr()
+	 * (called by segment_fault) can find it
+	 */
+	up = newproc();
+	up->pgrp = newpgrp();
+	up->egrp = smalloc(sizeof(Egrp));
+	up->egrp->r.ref = 1;
+	up->fgrp = dupfgrp(nil);
+	up->rgrp = newrgrp();
+	up->procmode = 0640;
 
 	kstrdup(&eve, "");
-	kstrdup(&p->text, "*init*");
-	kstrdup(&p->user, eve);
+	kstrdup(&up->text, "*init*");
+	kstrdup(&up->user, eve);
+
+	sysprocsetup(up);
+
 	/*
 	 * Kernel Stack
 	 *
@@ -480,23 +457,23 @@ userinit(void)
 	 *	space for gotolabel's return PC
 	 * AMD64 stack must be quad-aligned.
 	 */
-	p->sched.pc = PTR2UINT(init0);
-	p->sched.sp = PTR2UINT(p->kstack+KSTACK-sizeof(up->arg)-sizeof(uintptr_t));
-	p->sched.sp = STACKALIGN(p->sched.sp);
-D('0');
+	up->sched.pc = PTR2UINT(init0);
+	up->sched.sp = PTR2UINT(up->kstack+KSTACK-sizeof(up->arg)-sizeof(uintptr_t));
+	up->sched.sp = STACKALIGN(up->sched.sp);
+
 	/*
 	 * User Stack
 	 */
 	s = nil;
 	if(!segment_virtual(&s, SgStack, SgRead|SgWrite, 0, USTKTOP-USTKSIZE, USTKTOP))
 		panic("userinit: cannot create stack segment");
-D('1');
-	p->seg[SSEG] = s;
+
+	up->seg[SSEG] = s;
 	va = USTKTOP-USTKSIZE;
 	mmuphys = 0;
 	if(!segment_fault(&mmuphys, &va, s, FaultWrite))
 		panic("userinit: cannot allocate first stack page");
-D('2');
+
 	page = segment_page(s, va);
 	if(page == 0)
 		panic("userinit: cannot find first stack page (previously faulted)");
@@ -510,7 +487,7 @@ D('2');
 	s = nil;
 	if(!segment_userinit(&s, 0))
 		panic("userinit: cannot create text segment");
-	p->seg[TSEG] = s;
+	up->seg[TSEG] = s;
 
 	/*
 	 * Data
@@ -518,8 +495,11 @@ D('2');
 	s = nil;
 	if(!segment_userinit(&s, 1))
 		panic("userinit: cannot create data segment");
-	p->seg[DSEG] = s;
+	up->seg[DSEG] = s;
 
+	/* reset global pointer up */
+	p = up;
+	up = nil;
 	ready(p);
 }
 
@@ -527,7 +507,7 @@ static void
 fullstop(void)
 {
 	splhi();
-	lapicpri(0xff);
+//	lapicpri(0xff);
 	/* i8259 was initialised as disabled */
 	for(;;)
 		_halt();
@@ -544,7 +524,7 @@ shutdown(int ispanic)
 	active.ispanic = ispanic;
 	m->online = 0;
 	active.exiting = 1;
-	adec(&sys->nonline);
+	adec((int*)&sys->nmach);
 
 	iprint("cpu%d: exiting\n", m->machno);
 	/* wait for any other processors to shutdown */
@@ -552,7 +532,7 @@ shutdown(int ispanic)
 	prflush();
 	for(ms = 10*1000; ms > 0; ms -= 2){
 		delay(2);
-		if(sys->nonline == 0 && consactive() == 0)
+		if(sys->nmach == 0 && consactive() == 0)
 			break;
 	}
 
diff --git a/sys/src/kern/amd64/map.c b/sys/src/kern/amd64/map.c
deleted file mode 100644
index 1e3f435..0000000
--- a/sys/src/kern/amd64/map.c
+++ /dev/null
@@ -1,42 +0,0 @@
-#include "u.h"
-#include "../port/lib.h"
-#include "mem.h"
-#include "dat.h"
-#include "fns.h"
-
-/*
- * Before mmuinit is done, we can't rely on sys->vmunmapped
- * being set, so we use the static limit TMFM
- */
-
-void*
-KADDR(uintmem pa)
-{
-	uint8_t* va;
-
-	va = UINT2PTR(pa);
-	if(sys->vmunmapped != 0){
-		if(pa < sys->vmunmapped-KSEG0)
-			return KSEG0+va;
-	}else	if(pa < TMFM)
-		return KSEG0+va;
-	return KSEG2+va;
-}
-
-uintmem
-PADDR(void* va)
-{
-	uintmem pa;
-
-	pa = PTR2UINT(va);
-	if(pa >= KSEG2 && pa < KSEG1)
-		return pa-KSEG2;
-	if(pa >= KSEG0 && pa < KSEG0+TMFM)
-		return pa-KSEG0;
-	if(pa > KSEG2)
-		return pa-KSEG2;
-
-	panic("PADDR: va %#p pa #%p @ %#p\n", va, mmuphysaddr(PTR2UINT(va)), getcallerpc());
-	return 0;
-}
-
diff --git a/sys/src/kern/amd64/mem.h b/sys/src/kern/amd64/mem.h
index f0633c5..53c763d 100644
--- a/sys/src/kern/amd64/mem.h
+++ b/sys/src/kern/amd64/mem.h
@@ -33,7 +33,7 @@
 #define EiB	gULL(1152921504606846976)
 
 #define HOWMANY(x, y)	(((x)+((y)-1))/(y))
-#define	ROUND(s, sz)	(((s)+(sz-1))&~(sz-1))
+#define	ROUND(s, sz)	(((s)+((sz)-1))&~((sz)-1))
 #define ROUNDUP(x, y)	(HOWMANY((x), (y))*(y))
 #define ROUNDDN(x, y)	(((x)/(y))*(y))
 #define MIN(a, b)	((a) < (b)? (a): (b))
@@ -44,21 +44,25 @@
  */
 #define BI2BY		8			/* bits per byte */
 #define	BI2WD		32			/* bits per word */
-#define	BY2WD		4			/* bytes per word */
+#define	BY2WD		8			/* bytes per word */
 #define BY2V		8			/* bytes per double word */
 #define BY2SE		8			/* bytes per stack element */
 #define BLOCKALIGN	8
 
 #define PGSZ		(4*KiB)			/* page size */
+#define	BY2PG		PGSZ
+#define	WD2PG		(BY2PG/BY2WD)
 #define PGSHFT		12			/* log(PGSZ) */
-#define PTSZ		(4*KiB)			/* page table page size */
-#define PTSHFT		9			/*  */
+#define PGSHIFT		PGSHFT
+#define	PGROUND(s)	ROUNDUP(s, PGSZ)
+#define	BLOCKALIGN	8
+#define	FPalign		16
 
-#define MACHSZ		(4*KiB)			/* Mach+stack size */
+#define MACHSZ		(2*PGSZ)		/* Mach+stack size */
 #define MACHMAX		32			/* max. number of cpus */
 #define MACHSTKSZ	(6*(4*KiB))		/* Mach stack size */
 
-#define KSTACK		(16*1024)		/* Size of Proc kernel stack */
+#define KSTACK		(16*KiB)		/* Size of Proc kernel stack */
 #define STACKALIGN(sp)	((sp) & ~(BY2SE-1))	/* bug: assure with alloc */
 
 /*
@@ -82,18 +86,46 @@
 
 #define UTZERO		(0+2*MiB)		/* first address in user text */
 #define UTROUND(t)	ROUNDUP((t), 2*MiB)	/* first address beyond text for user data */
-#define USTKTOP		gULL(0x00007ffffffff000)
-#define USTKSIZE	(16*1024*1024)		/* size of user stack */
-#define TSTKTOP		(USTKTOP-USTKSIZE)	/* end of new stack in sysexec */
+#define UADDRMASK	gULL(0x00007fffffffffff)		/* canonical address mask */
+#define TSTKTOP		(0x00007ffffffff000ull)
+#define USTKSIZE	(16*MiB)			/* size of user stack */
+#define USTKTOP		(TSTKTOP-USTKSIZE)		/* end of new stack in sysexec */
 
-#define KSEG0		gULL(0xfffffffff0000000)	/* 256MB - this is confused */
-#define KSEG1		gULL(0xffffff0000000000)	/* 512GB - embedded PML4 */
-#define KSEG2		gULL(0xfffffe0000000000)	/* 1TB - KMAP */
+//#define KSEG0		gULL(0xffffffff80000000)	/* 256MB - this is confused */
+//#define KSEG1		gULL(0xffffff0000000000)	/* 512GB - embedded PML4 */
+//#define KSEG2		gULL(0xfffffe8000000000)	/* 1TB - KMAP */
 #define PMAPADDR	gULL(0xffffffffffe00000)	/* unused as of yet (KMAP?) */
 
-#define KZERO		gULL(0xfffffffff0000000)
+
+#define KZERO		gULL(0xffffffff80000000)
 #define KTZERO		(KZERO+1*MiB+64*KiB)
 
+#define VMAP		gULL(0xffffff0000000000)
+#define VMAPSIZE	(512*GiB)
+
+#define	KMAP		gULL(0xfffffe8000000000)
+#define KMAPSIZE	(2*MiB)
+
+/*
+ * Fundamental addresses - bottom 64kB saved for return to real mode
+ */
+#define	CONFADDR	(KZERO+0x1200)		/* info passed from boot loader */
+#define	APBOOTSTRAP	(KZERO+0x3000)		/* AP bootstrap code */
+#define	IDTADDR		(KZERO+0x10000)		/* idt */
+#define	REBOOTADDR	(0x11000)			/* reboot code - physical address */
+
+#define CPU0PML4	(KZERO+0x13000)
+#define CPU0PDP		(KZERO+0x14000)
+#define CPU0PD0		(KZERO+0x15000)		/* KZERO */
+#define CPU0PD1		(KZERO+0x16000)		/* KZERO+1GB */
+
+#define	CPU0GDT		(KZERO+0x17000)		/* bootstrap processor GDT */
+
+#define	CPU0MACH	(KZERO+0x18000)		/* Mach for bootstrap processor */
+#define CPU0END		(CPU0MACH+MACHSIZE)
+
+#define	MACHSIZE	(2*KSTACK)
+
 /*
  *  virtual MMU
  */
@@ -104,14 +136,17 @@
 #define SEGMAXPG	(SEGMAPSIZE)
 
 /*
- * This is the interface between fixfault and mmuput.
- * Should be in port.
+ *  physical MMU
  */
-#define PTEVALID	(1<<0)
-#define PTEWRITE	(1<<1)
-#define PTERONLY	(0<<1)
-#define PTEUSER		(1<<2)
-#define PTEUNCACHED	(1<<4)
+#define	PTEVALID	(gULL(1)<<0)
+#define	PTEWT		(gULL(1)<<3)
+#define	PTEUNCACHED	(gULL(1)<<4)
+#define	PTEWRITE	(gULL(1)<<1)
+#define	PTERONLY	(gULL(0)<<1)
+#define	PTEKERNEL	(gULL(0)<<2)
+#define	PTEUSER		(gULL(1)<<2)
+#define	PTESIZE		(gULL(1)<<7)
+#define	PTEGLOBAL	(gULL(1)<<8)
 
 #define getpgcolor(a)	0
 
@@ -123,6 +158,9 @@
  * and level 0 the PT pages. The PTLX macro gives an index into the
  * page-table page at level 'l' for the virtual address 'v'.
  */
+#define PTSZ		(4*KiB)			/* page table page size */
+#define PTSHFT		9			/*  */
+
 #define PTLX(v, l)	(((v)>>(((l)*PTSHFT)+PGSHFT)) & ((1<<PTSHFT)-1))
 #define PGLSZ(l)	(1<<(((l)*PTSHFT)+PGSHFT))
 
@@ -133,26 +171,21 @@
 
 #define	CACHELINESZ	64
 
-#define	KVATOP	(KSEG0&KSEG1&KSEG2)
-#define	iskaddr(a)	(((uintptr_t)(a)&KVATOP) == KVATOP)
+//#define	KVATOP	(KSEG0&KSEG1&KSEG2)
+#define	iskaddr(a)	(((uintptr_t)(a)) > KZERO)
 
 /*
  *  known x86 segments (in GDT) and their selectors
  */
 #define	NULLSEG	0	/* null segment */
-#define	KDSEG	1	/* kernel data/stack */
-#define	KESEG	2	/* kernel executable */	
-#define	UDSEG	3	/* user data/stack */
-#define	UESEG	4	/* user executable */
-#define	TSSSEG	5	/* task segment */
-#define	APMCSEG		6	/* APM code segment */
-#define	APMCSEG16	7	/* APM 16-bit code segment */
-#define	APMDSEG		8	/* APM data segment */
-#define	KESEG16		9	/* kernel executable 16-bit */
-#define	LDTSEG		10	/* local descriptor table */
-#define	PROCSEG0	11	/* per process descriptor0 */
-#define	NPROCSEG	3	/* number of per process descriptors */
-#define	NGDT		14	/* number of GDT entries required */
+#define	KESEG	1	/* kernel executable */
+#define	KDSEG	2	/* kernel data */
+#define	UE32SEG	3	/* user executable 32bit */
+#define	UDSEG	4	/* user data/stack */
+#define	UESEG	5	/* user executable 64bit */
+#define	TSSSEG	8	/* task segment (two descriptors) */
+
+#define	NGDT	10	/* number of GDT entries required */
 
 #define	SELGDT	(0<<2)	/* selector is in gdt */
 #define	SELLDT	(1<<2)	/* selector is in ldt */
@@ -160,12 +193,33 @@
 #define	SELECTOR(i, t, p)	(((i)<<3) | (t) | (p))
 
 #define	NULLSEL	SELECTOR(NULLSEG, SELGDT, 0)
-#define	KDSEL	SELECTOR(KDSEG, SELGDT, 0)
 #define	KESEL	SELECTOR(KESEG, SELGDT, 0)
-#define	UESEL	SELECTOR(UESEG, SELGDT, 3)
+#define	UE32SEL	SELECTOR(UE32SEG, SELGDT, 3)
 #define	UDSEL	SELECTOR(UDSEG, SELGDT, 3)
+#define	UESEL	SELECTOR(UESEG, SELGDT, 3)
 #define	TSSSEL	SELECTOR(TSSSEG, SELGDT, 0)
-#define	APMCSEL 	SELECTOR(APMCSEG, SELGDT, 0)
-#define	APMCSEL16	SELECTOR(APMCSEG16, SELGDT, 0)
-#define	APMDSEL		SELECTOR(APMDSEG, SELGDT, 0)
-#define	LDTSEL	SELECTOR(LDTSEG, SELGDT, 0)
+
+/*
+ *  fields in segment descriptors
+ */
+#define	SEGDATA	(0x10<<8)	/* data/stack segment */
+#define	SEGEXEC	(0x18<<8)	/* executable segment */
+#define	SEGTSS	(0x9<<8)	/* TSS segment */
+#define	SEGCG	(0x0C<<8)	/* call gate */
+#define	SEGIG	(0x0E<<8)	/* interrupt gate */
+#define	SEGTG	(0x0F<<8)	/* trap gate */
+#define	SEGLDT	(0x02<<8)	/* local descriptor table */
+#define	SEGTYPE	(0x1F<<8)
+
+#define	SEGP	(1<<15)		/* segment present */
+#define	SEGPL(x) ((x)<<13)	/* priority level */
+#define	SEGB	(1<<22)		/* granularity 1==4k (for expand-down) */
+#define	SEGD	(1<<22)		/* default 1==32bit (for code) */
+#define	SEGE	(1<<10)		/* expand down */
+#define	SEGW	(1<<9)		/* writable (for data/stack) */
+#define	SEGR	(1<<9)		/* readable (for code) */
+#define SEGL	(1<<21)		/* 64 bit */
+#define	SEGG	(1<<23)		/* granularity 1==4k (for other) */
+
+#define	getpgcolor(a)	0
+#define MBPGMASK (~(PGSZ-1))
diff --git a/sys/src/kern/amd64/memory.c b/sys/src/kern/amd64/memory.c
index 5e2e421..070677b 100644
--- a/sys/src/kern/amd64/memory.c
+++ b/sys/src/kern/amd64/memory.c
@@ -1,229 +1,88 @@
 /*
- * Size memory and create the kernel page-tables
- * on the fly while doing so.
- * Called from main(), this code should only be run
- * by the bootstrap processor.
+ * Size memory and create the kernel page-tables on the fly while doing so.
+ * Called from main(), this code should only be run by the bootstrap processor.
+ *
+ * MemMin is what the bootstrap code in entry.S has already mapped;
  */
 #include "u.h"
 #include "../port/lib.h"
 #include "mem.h"
 #include "dat.h"
 #include "fns.h"
-
-#include "amd64.h"
-
+#include "io.h"
+#include "ureg.h"
 #include "acpi.h"
 
-static int npg[4];
+#define PADDRP(va) PADDR(UINT2PTR(va))
 
-#undef DBGFLG
-#define DBGFLG 1
+uint32_t	MemMin = 0x1;		/* forced in data, set by entry.S */
 
-RMap	rmapram = {"physical memory"};
+#define MEMDEBUG	0
 
-static RMap	rmapunavail = {"unavailable physical addresses"};
+enum {
+	MemUPA		= 0,		/* unbacked physical address */
+	MemRAM		= 1,		/* physical memory */
+	MemUMB		= 2,		/* upper memory block (<16MB) */
+	MemReserved	= 3,
+	NMemType	= 4,
 
+	KB		= 1024,
+};
+
+typedef struct Map Map;
+struct Map {
+	uintptr_t	size;
+	uintptr_t	addr;
+};
+
+typedef struct RMap RMap;
+struct RMap {
+	char*	name;
+	Map*	map;
+	Map*	mapend;
+
+	Lock	l;
+};
 
 /*
- * called before first call to asmmapinit/asmmodinit or e820,
- * to mark the kernel text and data out of bounds.
+ * Memory allocation tracking.
  */
-void
-asminit(void)
-{
-	sys->pmstart = ROUNDUP(PADDR(end), PGSZ);
-	rmapalloc(&rmapram, 0, sys->pmstart, 0);	/* TO DO: should be empty, surely */
-	rmapfree(&rmapunavail, 0, sys->pmstart);
-}
+static Map mapupa[64];
+static RMap rmapupa = {
+	"unallocated unbacked physical memory",
+	mapupa,
+	&mapupa[nelem(mapupa)-1],
+};
 
-static PTE
-asmwalkalloc(usize size)
-{
-	uintmem pa;
+static Map mapram[16];
+RMap rmapram = {
+	"physical memory",
+	mapram,
+	&mapram[nelem(mapram)-1],
+};
 
-	assert(size == PTSZ && sys->vmunused+size <= sys->vmunmapped);
+static Map mapumb[64];
+static RMap rmapumb = {
+	"upper memory block",
+	mapumb,
+	&mapumb[nelem(mapumb)-1],
+};
 
-	if((pa = mmuphysaddr(sys->vmunused)) != ~(uintmem)0)
-		sys->vmunused += size;
-
-	return pa;
-}
+static Map mapumbrw[16];
+static RMap rmapumbrw = {
+	"UMB device memory",
+	mapumbrw,
+	&mapumbrw[nelem(mapumbrw)-1],
+};
 
 void
-memmaprange(uintptr_t va, uintmem lo, uintmem hi, PTE (*alloc)(usize), PTE flags)
+mapprint(RMap *rmap)
 {
-	uintmem mem, nextmem;
-	PTE *pte, f;
-	int i, l;
+	Map *mp;
 
-	if(alloc == nil)
-		alloc = asmwalkalloc;
-	/* Convert a range into pages */
-	for(mem = lo; mem < hi; mem = nextmem){
-		nextmem = (mem + PGLSZ(0)) & ~m->pgszmask[0];
-
-		/* Try large pages first */
-		for(i = m->npgsz - 1; i >= 0; i--){
-			if((mem & m->pgszmask[i]) != 0)
-				continue;
-			if(mem + PGLSZ(i) > hi)
-				continue;
-			/* This page fits entirely within the range. */
-			/* Mark it as usable */
-
-			if((l = mmuwalk(va, i, &pte, alloc)) < 0)
-				panic("meminit 3");
-
-			f = flags;
-			if(l > 0){
-				if(f & Pte4KPAT)
-					f ^= Pte4KPAT | Pte2MPAT;	/* it's the same for 1G */
-				f |= PtePS;
-			}
-			*pte = mem|PteRW|PteP|f;
-
-			nextmem = mem + PGLSZ(i);
-			va += PGLSZ(i);
-			npg[i]++;
-			break;
-		}
-	}
-}
-
-/*
- * Called after reading the physical memory maps (e820 or multiboot),
- * and following mmuinit, which sets sys->vmstart/vmunmapped/vmunused,
- * the boundaries of the initial, contiguous kernel virtual address space.
- *
- * Extend the page tables to complete the mapping of physical memory
- * into the region beyond vmunmapped, claiming the memory from the
- * physical memory map; and map the remaining chunks of
- * physical memory into the region KSEG2.
- */
-void
-meminit(void)
-{
-	RMapel *adrsm;
-	uintptr_t va;
-	uintmem hi, lo, n;
-
-	/*
-	 * do we need a map, like vmap, for best use of mapping kmem?
-	 * - in fact, a rewritten pdmap could do the job, no?
-	 * have to assume up to vmend is contiguous.
-	 * can't mmuphysaddr(sys->vmunmapped) because...
-	 */
-
-	/* assume already 2MiB aligned and 2MiB pages available */
-	assert(m->pgszlg2[1] == 21);
-	assert((sys->vmunmapped & m->pgszmask[1]) == 0);
-
-	jehanne_print("vmunmapped %#llux\n", sys->vmunmapped);
-
-	n = TMFM;
-	if(n > sys->pmoccupied)
-		n = sys->pmoccupied/2;
-	sys->pmunassigned = ROUNDDN(n, MiB);
-
-	for(adrsm = rmapram.map; adrsm != nil; adrsm = adrsm->next){
-		va = KSEG2+adrsm->addr;
-		lo = adrsm->addr;
-		hi = adrsm->addr+adrsm->size;
-		DBG("mem %#P %#P (%P) va %#p\n", lo, hi, hi-lo, va);
-		memmaprange(va, lo, hi, asmwalkalloc, 0);
-	}
-
-	n = sys->pmoccupied;
-	if(n > 600*MiB)
-		n = 600*MiB;
-	ialloclimit(n/3);
-}
-
-void
-memdebug(void)
-{
-	int i;
-	if(DBGFLG || 1){
-		rmapprint(&rmapram);
-		rmapprint(&rmapunavail);
-		jehanne_print("k ptes:");
-		for(i = 0; i < nelem(npg); i++)
-			jehanne_print(" %d", npg[i]);
-		jehanne_print("\n");
-	}
-}
-
-void
-memreserve(uintmem pa, uintmem size)
-{
-	rmapfree(&rmapunavail, pa, size);
-}
-
-void
-memaffinity(uint64_t base, uint64_t len, uint32_t dom, int flags)
-{
-	if(flags & MemNonVolatile){
-		memreserve(base, len);
-		return;
-	}
-	DBG("mem affinity: %#16.16llux %#16.16llux -> %d\n", base, base+len-1, dom);
-	/* TO DO: add [base, base+len[ to dom table */
-}
-
-void*
-basealloc(usize nb, uint32_t align, usize *alloced)
-{
-	uintmem pa;
-
-	if(align < CACHELINESZ)
-		align = CACHELINESZ;
-	nb = ROUNDUP(nb, CACHELINESZ);
-	pa = rmapalloc(&rmapram, 0, nb, align);
-	if(pa == 0)
-		return nil;
-	if(alloced != nil)
-		*alloced = nb;
-	return KADDR(pa);
-}
-
-void
-basefree(void *p, usize nb)
-{
-	uintmem pa;
-
-	pa = PADDR(p);
-	rmapfree(&rmapram, pa, nb);
-}
-
-int
-e820(void)
-{
-	char *p, *s;
-	uint64_t base, len;
-	uint32_t type;
-	int v;
-
-	p = getconf("*e820");
-	if(p == nil)
-		return 0;
-	v = 0;
-	for(s = p;;){
-		if(*s == 0)
-			break;
-		type = jehanne_strtoul(s, &s, 16);
-		if(*s != ' ')
-			break;
-		base = jehanne_strtoull(s, &s, 16);
-		if(*s != ' ')
-			break;
-		len = jehanne_strtoull(s, &s, 16) - base;
-		if(*s != ' ' && *s != 0 || len == 0)
-			break;
-		DBG("E820: %llux %llux %#ux\n", base, len, type);
-		asmmapinit(base, len, type);
-		v = 1;
-	}
-	return v;
+	print("%s\n", rmap->name);
+	for(mp = rmap->map; mp->size; mp++)
+		print("\t%#p %#p (%#p)\n", mp->addr, mp->addr+mp->size, mp->size);
 }
 
 /*
@@ -246,11 +105,11 @@ asmmapinit(uintmem addr, uintmem size, int type)
 			size -= sys->pmstart - addr;
 			addr = sys->pmstart;
 		}
-		rmapfree(&rmapram, addr, size);
+		mapfree(&rmapram, addr, size);
 		sys->pmoccupied += size;
 	}else if(specialmem != nil)
 		specialmem(addr, size, type);
-	rmapfree(&rmapunavail, addr, size);
+	mapfree(&rmapumbrw, addr, size);
 }
 
 void
@@ -260,8 +119,773 @@ asmmodinit(uint32_t start, uint32_t end, char* _1)
 		return;
 	end = ROUNDUP(end, 4096);
 	if(end > sys->pmstart){
-		rmapalloc(&rmapram, sys->pmstart, end-sys->pmstart, 0);
+		mapalloc(&rmapram, sys->pmstart, end-sys->pmstart, 0);
 		sys->pmstart = end;
 	}
 }
 
+void
+memaffinity(uint64_t base, uint64_t len, uint32_t dom, int flags)
+{
+	if(flags & MemNonVolatile){
+		memreserve(base, len);
+		return;
+	}
+	DBG("mem affinity: %#16.16llux %#16.16llux -> %d\n", base, base+len-1, dom);
+	/* TO DO: add [base, base+len[ to dom table */
+}
+
+void
+memdebug(void)
+{
+	unsigned long maxpa, maxpa1, maxpa2;
+
+	maxpa = (nvramread(0x18)<<8)|nvramread(0x17);
+	maxpa1 = (nvramread(0x31)<<8)|nvramread(0x30);
+	maxpa2 = (nvramread(0x16)<<8)|nvramread(0x15);
+	print("maxpa = %luX -> %luX, maxpa1 = %luX maxpa2 = %luX\n",
+		maxpa, MB+maxpa*KB, maxpa1, maxpa2);
+
+	mapprint(&rmapram);
+	mapprint(&rmapumb);
+	mapprint(&rmapumbrw);
+	mapprint(&rmapupa);
+}
+
+void
+mapfree(RMap* rmap, uintptr_t addr, uintptr_t size)
+{
+	Map *mp;
+	uintptr_t t;
+
+	if(size <= 0)
+		return;
+
+	ilock(&rmap->l);
+	for(mp = rmap->map; mp->addr <= addr && mp->size; mp++)
+		;
+
+	if(mp > rmap->map && (mp-1)->addr+(mp-1)->size == addr){
+		(mp-1)->size += size;
+		if(addr+size == mp->addr){
+			(mp-1)->size += mp->size;
+			while(mp->size){
+				mp++;
+				(mp-1)->addr = mp->addr;
+				(mp-1)->size = mp->size;
+			}
+		}
+	}
+	else{
+		if(addr+size == mp->addr && mp->size){
+			mp->addr -= size;
+			mp->size += size;
+		}
+		else do{
+			if(mp >= rmap->mapend){
+				print("mapfree: %s: losing %#p, %#p\n",
+					rmap->name, addr, size);
+				break;
+			}
+			t = mp->addr;
+			mp->addr = addr;
+			addr = t;
+			t = mp->size;
+			mp->size = size;
+			mp++;
+		}while(size = t);
+	}
+	iunlock(&rmap->l);
+}
+
+void*
+basealloc(usize nb, uint32_t align, usize *alloced)
+{
+	uintmem pa;
+
+	if(align < CACHELINESZ)
+		align = CACHELINESZ;
+	nb = ROUNDUP(nb, CACHELINESZ);
+	pa = mapalloc(&rmapram, 0, nb, align);
+	if(pa == 0)
+		return nil;
+	if(alloced != nil)
+		*alloced = nb;
+	return KADDR(pa);
+}
+
+void
+basefree(void *p, usize nb)
+{
+	uintmem pa;
+
+	pa = PADDR(p);
+	mapfree(&rmapram, pa, nb);
+}
+
+uintptr_t
+mapalloc(RMap* rmap, uintptr_t addr, int size, int align)
+{
+	Map *mp;
+	uintptr_t maddr, oaddr;
+
+	ilock(&rmap->l);
+	for(mp = rmap->map; mp->size; mp++){
+		maddr = mp->addr;
+
+		if(addr){
+			/*
+			 * A specific address range has been given:
+			 *   if the current map entry is greater then
+			 *   the address is not in the map;
+			 *   if the current map entry does not overlap
+			 *   the beginning of the requested range then
+			 *   continue on to the next map entry;
+			 *   if the current map entry does not entirely
+			 *   contain the requested range then the range
+			 *   is not in the map.
+			 */
+			if(maddr > addr)
+				break;
+			if(mp->size < addr - maddr)	/* maddr+mp->size < addr, but no overflow */
+				continue;
+			if(addr - maddr > mp->size - size)	/* addr+size > maddr+mp->size, but no overflow */
+				break;
+			maddr = addr;
+		}
+
+		if(align > 0)
+			maddr = ((maddr+align-1)/align)*align;
+		if(mp->addr+mp->size-maddr < size)
+			continue;
+
+		oaddr = mp->addr;
+		mp->addr = maddr+size;
+		mp->size -= maddr-oaddr+size;
+		if(mp->size == 0){
+			do{
+				mp++;
+				(mp-1)->addr = mp->addr;
+			}while((mp-1)->size = mp->size);
+		}
+
+		iunlock(&rmap->l);
+		if(oaddr != maddr)
+			mapfree(rmap, oaddr, maddr-oaddr);
+
+		return maddr;
+	}
+	iunlock(&rmap->l);
+
+	return 0;
+}
+
+/*
+ * Allocate from the ram map directly to make page tables.
+ * Called by mmuwalk during e820scan.
+ */
+void*
+rampage(void)
+{
+	uintptr_t m;
+
+	m = mapalloc(&rmapram, 0, PGSZ, PGSZ);
+	if(m == 0)
+		return nil;
+	return KADDR(m);
+}
+
+static void
+umbexclude(void)
+{
+	int size;
+	unsigned long addr;
+	char *op, *p, *rptr;
+
+	if((p = getconf("umbexclude")) == nil)
+		return;
+
+	while(p && *p != '\0' && *p != '\n'){
+		op = p;
+		addr = strtoul(p, &rptr, 0);
+		if(rptr == nil || rptr == p || *rptr != '-'){
+			print("umbexclude: invalid argument <%s>\n", op);
+			break;
+		}
+		p = rptr+1;
+
+		size = strtoul(p, &rptr, 0) - addr + 1;
+		if(size <= 0){
+			print("umbexclude: bad range <%s>\n", op);
+			break;
+		}
+		if(rptr != nil && *rptr == ',')
+			*rptr++ = '\0';
+		p = rptr;
+
+		mapalloc(&rmapumb, addr, size, 0);
+	}
+}
+
+static void
+umbscan(void)
+{
+	unsigned char *p;
+
+	/*
+	 * Scan the Upper Memory Blocks (0xA0000->0xF0000) for pieces
+	 * which aren't used; they can be used later for devices which
+	 * want to allocate some virtual address space.
+	 * Check for two things:
+	 * 1) device BIOS ROM. This should start with a two-byte header
+	 *    of 0x55 0xAA, followed by a byte giving the size of the ROM
+	 *    in 512-byte chunks. These ROM's must start on a 2KB boundary.
+	 * 2) device memory. This is read-write.
+	 * There are some assumptions: there's VGA memory at 0xA0000 and
+	 * the VGA BIOS ROM is at 0xC0000. Also, if there's no ROM signature
+	 * at 0xE0000 then the whole 64KB up to 0xF0000 is theoretically up
+	 * for grabs; check anyway.
+	 */
+	p = KADDR(0xD0000);
+	while(p < (unsigned char*)KADDR(0xE0000)){
+		/*
+		 * Test for 0x55 0xAA before poking obtrusively,
+		 * some machines (e.g. Thinkpad X20) seem to map
+		 * something dynamic here (cardbus?) causing weird
+		 * problems if it is changed.
+		 */
+		if(p[0] == 0x55 && p[1] == 0xAA){
+			p += p[2]*512;
+			continue;
+		}
+
+		p[0] = 0xCC;
+		p[2*KB-1] = 0xCC;
+		if(p[0] != 0xCC || p[2*KB-1] != 0xCC){
+			p[0] = 0x55;
+			p[1] = 0xAA;
+			p[2] = 4;
+			if(p[0] == 0x55 && p[1] == 0xAA){
+				p += p[2]*512;
+				continue;
+			}
+			if(p[0] == 0xFF && p[1] == 0xFF)
+				mapfree(&rmapumb, PADDRP(p), 2*KB);
+		}
+		else
+			mapfree(&rmapumbrw, PADDRP(p), 2*KB);
+		p += 2*KB;
+	}
+
+	p = KADDR(0xE0000);
+	if(p[0] != 0x55 || p[1] != 0xAA){
+		p[0] = 0xCC;
+		p[64*KB-1] = 0xCC;
+		if(p[0] != 0xCC && p[64*KB-1] != 0xCC)
+			mapfree(&rmapumb, PADDRP(p), 64*KB);
+	}
+
+	umbexclude();
+}
+
+int
+checksum(void *v, int n)
+{
+	unsigned char *p, s;
+
+	s = 0;
+	p = v;
+	while(n-- > 0)
+		s += *p++;
+	return s;
+}
+
+static void*
+sigscan(unsigned char* addr, int len, char* signature)
+{
+	int sl;
+	unsigned char *e, *p;
+
+	e = addr+len;
+	sl = strlen(signature);
+	for(p = addr; p+sl < e; p += 16)
+		if(memcmp(p, signature, sl) == 0)
+			return p;
+	return nil;
+}
+
+static uintptr_t
+convmemsize(void)
+{
+	uintptr_t top;
+	unsigned char *bda;
+
+	bda = KADDR(0x400);
+	top = ((bda[0x14]<<8) | bda[0x13])*KB;
+
+	if(top < 64*KB || top > 640*KB)
+		top = 640*KB;	/* sanity */
+
+	/* reserved for bios tables (EBDA) */
+	top -= 1*KB;
+
+	return top;
+}
+
+void*
+sigsearch(char* signature)
+{
+	uintptr_t p;
+	unsigned char *bda;
+	void *r;
+
+	/*
+	 * Search for the data structure:
+	 * 1) within the first KiB of the Extended BIOS Data Area (EBDA), or
+	 * 2) within the last KiB of system base memory if the EBDA segment
+	 *    is undefined, or
+	 * 3) within the BIOS ROM address space between 0xf0000 and 0xfffff
+	 *    (but will actually check 0xe0000 to 0xfffff).
+	 */
+	bda = KADDR(0x400);
+	if(memcmp(KADDR(0xfffd9), "EISA", 4) == 0){
+		if((p = (bda[0x0f]<<8)|bda[0x0e]) != 0){
+			if((r = sigscan(KADDR(p<<4), 1024, signature)) != nil)
+				return r;
+		}
+	}
+	if((r = sigscan(KADDR(convmemsize()), 1024, signature)) != nil)
+		return r;
+
+	/* hack for virtualbox: look in KiB below 0xa0000 */
+	if((r = sigscan(KADDR(0xa0000-1024), 1024, signature)) != nil)
+		return r;
+
+	return sigscan(KADDR(0xe0000), 0x20000, signature);
+}
+
+#if 0
+static void
+lowraminit(void)
+{
+	uintptr_t pa, x;
+
+	/*
+	 * Initialise the memory bank information for conventional memory
+	 * (i.e. less than 640KB). The base is the first location after the
+	 * bootstrap processor MMU information and the limit is obtained from
+	 * the BIOS data area.
+	 */
+	x = PADDRP(CPU0END);
+	pa = convmemsize();
+	if(x < pa){
+		mapfree(&rmapram, x, pa-x);
+		memset(KADDR(x), 0, pa-x);		/* keep us honest */
+	}
+
+	x = PADDRP(PGROUND((uintptr_t)end));
+	pa = MemMin;
+	if(x > pa)
+		panic("kernel too big");
+	mapfree(&rmapram, x, pa-x);
+	memset(KADDR(x), 0, pa-x);		/* keep us honest */
+}
+#endif
+
+typedef struct Emap Emap;
+struct Emap
+{
+	int type;
+	uintptr_t base;
+	uintptr_t top;
+};
+static Emap emap[128];
+int nemap;
+
+int
+e820map(int type, uintptr_t base, uintptr_t top)
+{
+	if(nemap == sizeof(emap))
+		return 0;
+	emap[nemap].type = type;
+	emap[nemap].base = base;
+	emap[nemap].top = top;
+	++nemap;
+	return 1;
+}
+
+static int
+emapcmp(void *va, void *vb)
+{
+	Emap *a, *b;
+
+	a = (Emap*)va;
+	b = (Emap*)vb;
+	if(a->top < b->top)
+		return -1;
+	if(a->top > b->top)
+		return 1;
+	if(a->base < b->base)
+		return -1;
+	if(a->base > b->base)
+		return 1;
+	return 0;
+}
+
+int
+ismapped(RMap *r, uintptr_t addr, uintptr_t *limit)
+{
+	Map *mp;
+
+	ilock(&r->l);
+	for(mp = r->map; mp->size; mp++){
+		if(mp->addr <= addr && addr < mp->addr + mp->size){
+			if(limit != nil)
+				*limit = mp->addr + mp->size;
+			iunlock(&r->l);
+			return 1;
+		}
+	}
+	iunlock(&r->l);
+	return 0;
+}
+
+uintptr_t
+mapsize(RMap *r)
+{
+	uintptr_t t;
+	Map *e;
+
+	ilock(&r->l);
+	t = 0;
+	for(e = r->map; e->size; e++)
+		t += e->size;
+	iunlock(&r->l);
+	return t;
+}
+
+uintptr_t
+maptop(RMap *r)
+{
+	uintptr_t t;
+	Map *e;
+
+	ilock(&r->l);
+	t = 0;
+	for(e = r->map; e->size; e++)
+		t = e->addr + e->size;
+	iunlock(&r->l);
+	return t;
+}
+
+int
+mapfirst(RMap *r, uintptr_t start, uintptr_t *addr, uintptr_t *size)
+{
+	Map *e;
+	uintptr_t lim;
+
+	ilock(&r->l);
+	for(e = r->map; e->size; e++){
+		lim = e->addr + e->size;
+		if(e->addr <= start && start < lim){
+			iunlock(&r->l);
+			*addr = start;
+			*size = lim-start;
+			return 1;
+		}
+	}
+	iunlock(&r->l);
+	return 0;
+}
+
+static void
+map(uintptr_t base, uintptr_t len, int type)
+{
+	uintptr_t n, flags, maxkpa;
+
+	/*
+	 * Split any call crossing MemMin to make below simpler.
+	 */
+	if(base < MemMin && len > MemMin-base){
+		n = MemMin - base;
+		map(base, n, type);
+		map(MemMin, len-n, type);
+	}
+
+	/*
+	 * Let umbscan hash out the low MemMin.
+	 */
+	if(base < MemMin)
+		return;
+
+	/*
+	 * Any non-memory below 16*MB is used as upper mem blocks.
+	 */
+	if(type == MemUPA && base < 16*MB && len > 16*MB-base){
+		map(base, 16*MB-base, MemUMB);
+		map(16*MB, len-(16*MB-base), MemUPA);
+		return;
+	}
+
+	/*
+	 * Memory below CPU0END is reserved for the kernel
+	 * and already mapped.
+	 */
+	if(base < PADDRP(CPU0END)){
+		n = PADDRP(CPU0END) - base;
+		if(len <= n)
+			return;
+		map(PADDRP(CPU0END), len-n, type);
+		return;
+	}
+
+	/*
+	 * Memory between KTZERO and end is the kernel itself
+	 * and is already mapped.
+	 */
+	if(base < PADDRP(KTZERO) && len > PADDRP(KTZERO)-base){
+		map(base, PADDRP(KTZERO)-base, type);
+		return;
+	}
+	if(PADDRP(KTZERO) < base && base < PADDRP(PGROUND((uintptr_t)end))){
+		n = PADDRP(PGROUND((uintptr_t)end));
+		if(len <= n)
+			return;
+		map(PADDRP(PGROUND((uintptr_t)end)), len-n, type);
+		return;
+	}
+
+	/*
+	 * Now we have a simple case.
+	 */
+	switch(type){
+	case MemRAM:
+		mapfree(&rmapram, base, len);
+		flags = PTEWRITE|PTEVALID;
+		break;
+	case MemUMB:
+		mapfree(&rmapumb, base, len);
+		flags = PTEWRITE|PTEUNCACHED|PTEVALID;
+		break;
+	case MemUPA:
+		mapfree(&rmapupa, base, len);
+		flags = 0;
+		break;
+	default:
+	case MemReserved:
+		flags = 0;
+		break;
+	}
+
+	if(flags){
+		maxkpa = -KZERO;
+		if(base >= maxkpa)
+			return;
+		if(len > maxkpa-base)
+			len = maxkpa - base;
+		pmap(m->pml4, base|flags, base+KZERO, len);
+	}
+}
+
+int
+e820(void)
+{
+	uintptr_t base, len, last;
+	Emap *e;
+	char *s;
+	int i;
+
+	/* passed by bootloader */
+	if((s = getconf("*e820")) == nil
+	&& (s = getconf("e820")) == nil
+	&& nemap == 0)
+		return -1;
+	while(s && nemap < nelem(emap)){
+		while(*s == ' ')
+			s++;
+		if(*s == 0)
+			break;
+		e = emap + nemap;
+		e->type = 1;
+		if(s[1] == ' '){	/* new format */
+			e->type = s[0] - '0';
+			s += 2;
+		}
+		e->base = strtoull(s, &s, 16);
+		if(*s != ' ')
+			break;
+		e->top  = strtoull(s, &s, 16);
+		if(*s != ' ' && *s != 0)
+			break;
+		if(e->base < e->top)
+			nemap++;
+	}
+	if(nemap == 0)
+		return -1;
+	qsort(emap, nemap, sizeof emap[0], emapcmp);
+	last = 0;
+	for(i=0; i<nemap; i++){
+		e = &emap[i];
+		/*
+		 * pull out the info but only about the low 32 bits...
+		 */
+		if(e->top <= last)
+			continue;
+		if(e->base < last)
+			base = last;
+		else
+			base = e->base;
+		len = e->top - base;
+		/*
+		 * If the map skips addresses, mark them available.
+		 */
+		if(last < base)
+			map(last, base-last, MemUPA);
+		map(base, len, (e->type == 1) ? MemRAM : MemReserved);
+		last = base + len;
+		if(last == 0)
+			break;
+	}
+	if(last != 0)
+		map(last, -last, MemUPA);
+	return 0;
+}
+
+void
+meminit(void)
+{
+	int i;
+	Map *mp;
+	Confmem *cm;
+	uintptr_t lost;
+
+	umbscan();
+//	lowraminit();
+	e820();
+
+	/*
+	 * Set the conf entries describing banks of allocatable memory.
+	 */
+	for(i=0; i<nelem(mapram) && i<nelem(sys->mem); i++){
+		mp = &rmapram.map[i];
+		cm = &sys->mem[i];
+		cm->base = mp->addr;
+		cm->npage = mp->size/PGSZ;
+	}
+
+	lost = 0;
+	for(; i<nelem(mapram); i++)
+		lost += rmapram.map[i].size;
+	if(lost)
+		print("meminit - lost %llud bytes\n", lost);
+
+	if(MEMDEBUG)
+		memdebug();
+}
+
+/*
+ * Allocate memory from the upper memory blocks.
+ */
+uintptr_t
+umbmalloc(uintptr_t addr, int size, int align)
+{
+	uintptr_t a;
+
+	if(a = mapalloc(&rmapumb, addr, size, align))
+		return (uintptr_t)KADDR(a);
+
+	return 0;
+}
+
+void
+umbfree(uintptr_t addr, int size)
+{
+	mapfree(&rmapumb, PADDRP(addr), size);
+}
+
+uintptr_t
+umbrwmalloc(uintptr_t addr, int size, int align)
+{
+	uintptr_t a;
+	unsigned char *p;
+
+	if(a = mapalloc(&rmapumbrw, addr, size, align))
+		return (uintptr_t)KADDR(a);
+
+	/*
+	 * Perhaps the memory wasn't visible before
+	 * the interface is initialised, so try again.
+	 */
+	if((a = umbmalloc(addr, size, align)) == 0)
+		return 0;
+	p = (unsigned char*)a;
+	p[0] = 0xCC;
+	p[size-1] = 0xCC;
+	if(p[0] == 0xCC && p[size-1] == 0xCC)
+		return a;
+	umbfree(a, size);
+
+	return 0;
+}
+
+void
+umbrwfree(uintptr_t addr, int size)
+{
+	mapfree(&rmapumbrw, PADDRP(addr), size);
+}
+
+/*
+ * Give out otherwise-unused physical address space
+ * for use in configuring devices.  Note that upaalloc
+ * does not map the physical address into virtual memory.
+ * Call vmap to do that.
+ */
+uintptr_t
+upaalloc(int size, int align)
+{
+	uintptr_t a;
+
+	a = mapalloc(&rmapupa, 0, size, align);
+	if(a == 0){
+		print("out of physical address space allocating %d\n", size);
+		mapprint(&rmapupa);
+	}
+	return a;
+}
+
+void
+upafree(uintptr_t pa, int size)
+{
+	mapfree(&rmapupa, pa, size);
+}
+
+void
+upareserve(uintptr_t pa, int size)
+{
+	uintptr_t a;
+
+	a = mapalloc(&rmapupa, pa, size, 0);
+	if(a != pa){
+		/*
+		 * This can happen when we're using the E820
+		 * map, which might have already reserved some
+		 * of the regions claimed by the pci devices.
+		 */
+	//	print("upareserve: cannot reserve pa=%#p size=%d\n", pa, size);
+		if(a != 0)
+			mapfree(&rmapupa, a, size);
+	}
+}
+
+void
+memreserve(uintmem pa, uintmem size)
+{
+	upareserve(pa, size);
+}
+
+void
+memorysummary(void)
+{
+	memdebug();
+}
+
diff --git a/sys/src/kern/amd64/mmu.c b/sys/src/kern/amd64/mmu.c
index 38a695a..259300d 100644
--- a/sys/src/kern/amd64/mmu.c
+++ b/sys/src/kern/amd64/mmu.c
@@ -1,527 +1,537 @@
-#include "u.h"
-#include "../port/lib.h"
-#include "mem.h"
-#include "dat.h"
-#include "fns.h"
+#include	"u.h"
+#include	"../port/lib.h"
+#include	"mem.h"
+#include	"dat.h"
+#include	"fns.h"
+#include	"io.h"
+#include	"amd64.h"
 
-#include "amd64.h"
-//#define DO_mmuptpcheck
+/*
+ * Simple segment descriptors with no translation.
+ */
+#define	EXECSEGM(p) 	{ 0, SEGL|SEGP|SEGPL(p)|SEGEXEC }
+#define	DATASEGM(p) 	{ 0, SEGB|SEGG|SEGP|SEGPL(p)|SEGDATA|SEGW }
+#define	EXEC32SEGM(p) 	{ 0xFFFF, SEGG|SEGD|(0xF<<16)|SEGP|SEGPL(p)|SEGEXEC|SEGR }
+#define	DATA32SEGM(p) 	{ 0xFFFF, SEGB|SEGG|(0xF<<16)|SEGP|SEGPL(p)|SEGDATA|SEGW }
 
-//#undef DBG
-//#define DBG(...)	jehanne_print(__VA_ARGS__)
+Segdesc gdt[NGDT] =
+{
+[NULLSEG]	{ 0, 0},		/* null descriptor */
+[KESEG]		EXECSEGM(0),		/* kernel code */
+[KDSEG]		DATASEGM(0),		/* kernel data */
+[UE32SEG]	EXEC32SEGM(3),		/* user code 32 bit*/
+[UDSEG]		DATA32SEGM(3),		/* user data/stack */
+[UESEG]		EXECSEGM(3),		/* user code */
+};
 
-#define PDMAP		(0xffffffffff800000ull)
-#define PDPX(v)		PTLX((v), 2)
-#define PDX(v)		PTLX((v), 1)
-#define PTX(v)		PTLX((v), 0)
-
-#define VMAP		(0xffffffffe0000000ull)
-#define VMAPSZ		(256*MiB)
-
-#define KSEG1PML4	(0xffff000000000000ull\
-			|(PTLX(KSEG1, 3)<<(((3)*PTSHFT)+PGSHFT))\
-			|(PTLX(KSEG1, 3)<<(((2)*PTSHFT)+PGSHFT))\
-			|(PTLX(KSEG1, 3)<<(((1)*PTSHFT)+PGSHFT))\
-			|(PTLX(KSEG1, 3)<<(((0)*PTSHFT)+PGSHFT)))
-
-#define KSEG1PTP(va, l)	((0xffff000000000000ull\
-			|(KSEG1PML4<<((3-(l))*PTSHFT))\
-			|(((va) & 0xffffffffffffull)>>(((l)+1)*PTSHFT))\
-			& ~0xfffull))
-
-static Lock vmaplock;
-static Ptpage mach0pml4;
-static struct{
+static struct {
 	Lock;
-	Ptpage*	next;
-} ptpfreelist;
-int	ptpcount;
+	MMU	*free;
 
-#ifdef DO_mmuptpcheck
-static void mmuptpcheck(Proc*);
+	unsigned long	nalloc;
+	unsigned long	nfree;
+} mmupool;
+
+enum {
+	/* level */
+	PML4E	= 2,
+	PDPE	= 1,
+	PDE	= 0,
+
+	MAPBITS	= 8*sizeof(m->mmumap[0]),
+
+	/* PAT entry used for write combining */
+	PATWC	= 7,
+};
+
+#if 0
+static void
+loadptr(uint16_t lim, uintptr_t off, void (*load)(void*))
+{
+	uint64_t b[2], *o;
+	uint16_t *s;
+
+	o = &b[1];
+	s = ((uint16_t*)o)-1;
+
+	*s = lim;
+	*o = off;
+
+	(*load)(s);
+}
 #endif
 
-void
-mmuflushtlb(uint64_t _1)
+static void
+taskswitch(uintptr_t stack)
 {
-	if(m->pml4->ptoff){
-		jehanne_memset(m->pml4->pte, 0, m->pml4->ptoff*sizeof(PTE));
-		m->pml4->ptoff = 0;
+	Tss *tss;
+
+	tss = m->tss;
+	tss->rsp0[0] = (uint32_t)stack;
+	tss->rsp0[1] = stack >> 32;
+	tss->rsp1[0] = (uint32_t)stack;
+	tss->rsp1[1] = stack >> 32;
+	tss->rsp2[0] = (uint32_t)stack;
+	tss->rsp2[1] = stack >> 32;
+	mmuflushtlb();
+}
+
+void
+mmuinit(void)
+{
+	uintptr_t x;
+	long v;
+	int i;
+
+	/* zap double map done by entry.S */
+	m->pml4[512] = 0;
+	m->pml4[0] = 0;
+
+	m->tss = mallocz(sizeof(Tss), 1);
+	if(m->tss == nil)
+		panic("mmuinit: no memory for Tss");
+	m->tss->iomap = 0xDFFF;
+	for(i=0; i<14; i+=2){
+		x = (uintptr_t)m + MACHSIZE;
+		m->tss->ist[i] = x;
+		m->tss->ist[i+1] = x>>32;
 	}
-	cr3put(m->pml4->pa);
+
+	/*
+	 * We used to keep the GDT in the Mach structure, but it
+	 * turns out that that slows down access to the rest of the
+	 * page.  Since the Mach structure is accessed quite often,
+	 * it pays off anywhere from a factor of 1.25 to 2 on real
+	 * hardware to separate them (the AMDs are more sensitive
+	 * than Intels in this regard).  Under VMware it pays off
+	 * a factor of about 10 to 100.
+	 */
+	memmove(m->gdt, gdt, sizeof gdt);
+
+	x = (uintptr_t)m->tss;
+	m->gdt[TSSSEG+0].d0 = (x<<16)|(sizeof(Tss)-1);
+	m->gdt[TSSSEG+0].d1 = (x&0xFF000000)|((x>>16)&0xFF)|SEGTSS|SEGPL(0)|SEGP;
+	m->gdt[TSSSEG+1].d0 = x>>32;
+	m->gdt[TSSSEG+1].d1 = 0;
+
+	gdtput(sizeof(gdt)-1, PTR2UINT(m->gdt), SSEL(SiCS, SsTIGDT|SsRPL0));
+	idtput(sizeof(Segdesc)*512-1, (uintptr_t)IDTADDR);
+//	trput(SSEL(SiTSS, SsTIGDT|SsRPL0));
+
+//	loadptr(sizeof(gdt)-1, (uintptr_t)m->gdt, lgdt);
+//	loadptr(sizeof(Segdesc)*512-1, (uintptr_t)IDTADDR, lidt);
+	taskswitch((uintptr_t)m + MACHSIZE);
+	trput(TSSSEL);
+
+	wrmsr(0xc0000100, 0ull);	/* 64 bit fsbase */
+	wrmsr(0xc0000101, (unsigned long)&sys->machptr[m->machno]);	/* 64 bit gsbase */
+	wrmsr(0xc0000102, 0ull);	/* kernel gs base */
+
+	/* enable syscall extension */
+	rdmsr(0xc0000080, &v);
+	v |= 1ull;
+	wrmsr(0xc0000080, v);
+
+	/* enable no execute */
+	rdmsr(0xc0000080, &v);
+	v |= Nxe;
+	wrmsr(0xc0000080, v);
+
+	/* IA32_STAR */
+	wrmsr(0xc0000081, ((unsigned long)UE32SEL << 48) | ((unsigned long)KESEL << 32));
+
+	/* IA32_LSTAR */
+	wrmsr(0xc0000082, (unsigned long)syscallentry);
+
+	/* SYSCALL flags mask */
+	wrmsr(0xc0000084, 0x200);
+
+	/* IA32_PAT write combining */
+	if((MACHP(0)->cpuiddx & Pat) != 0
+	&& rdmsr(0x277, &v) != -1){
+		v &= ~(255LL<<(PATWC*8));
+		v |= 1LL<<(PATWC*8);	/* WC */
+		wrmsr(0x277, v);
+	}
+}
+
+/*
+ * These could go back to being macros once the kernel is debugged,
+ * but the extra checking is nice to have.
+ */
+void*
+mmu_kernel_address(uintptr_t pa)
+{
+	if(pa >= (uintptr_t)-KZERO)
+		panic("mmu_kernel_address: pa=%#p pc=%#p", pa, getcallerpc());
+	return (void*)(pa+KZERO);
+}
+
+uintptr_t
+mmu_physical_address(void *v)
+{
+	uintptr_t va;
+
+	va = (uintptr_t)v;
+	if(va >= KZERO)
+		return va-KZERO;
+	if(va >= VMAP)
+		return va-VMAP;
+	panic("mmu_physical_address: va=%#p pc=%#p", va, getcallerpc());
+	return 0;
+}
+
+static MMU*
+mmualloc(void)
+{
+	MMU *p;
+	int i, n;
+
+	p = m->mmufree;
+	if(p != nil){
+		m->mmufree = p->next;
+		m->mmucount--;
+	} else {
+		lock(&mmupool);
+		p = mmupool.free;
+		if(p != nil){
+			mmupool.free = p->next;
+			mmupool.nfree--;
+		} else {
+			unlock(&mmupool);
+
+			n = 256;
+			p = malloc(n * sizeof(MMU));
+			if(p == nil)
+				panic("mmualloc: out of memory for MMU");
+			p->page = mallocalign(n * PTSZ, PGSZ, 0, 0);
+			if(p->page == nil)
+				panic("mmualloc: out of memory for MMU pages");
+			for(i=1; i<n; i++){
+				p[i].page = p[i-1].page + (1<<PTSHFT);
+				p[i-1].next = &p[i];
+			}
+
+			lock(&mmupool);
+			p[n-1].next = mmupool.free;
+			mmupool.free = p->next;
+			mmupool.nalloc += n;
+			mmupool.nfree += n-1;
+		}
+		unlock(&mmupool);
+	}
+	p->next = nil;
+	return p;
+}
+
+static uintptr_t*
+mmucreate(uintptr_t *table, uintptr_t va, int level, int index)
+{
+	uintptr_t *page, flags;
+	MMU *p;
+
+	flags = PTEWRITE|PTEVALID;
+	if(va < VMAP){
+		assert(up != nil);
+		assert((va < TSTKTOP) || (va >= KMAP && va < KMAP+KMAPSIZE));
+
+		p = mmualloc();
+		p->index = index;
+		p->level = level;
+		if(va < TSTKTOP){
+			flags |= PTEUSER;
+			if(level == PML4E){
+				if((p->next = up->mmuhead) == nil)
+					up->mmutail = p;
+				up->mmuhead = p;
+				m->mmumap[index/MAPBITS] |= 1ull<<(index%MAPBITS);
+			} else {
+				up->mmutail->next = p;
+				up->mmutail = p;
+			}
+			up->mmucount++;
+		} else {
+			if(level == PML4E){
+				up->kmaptail = p;
+				up->kmaphead = p;
+			} else {
+				up->kmaptail->next = p;
+				up->kmaptail = p;
+			}
+			up->kmapcount++;
+		}
+		page = p->page;
+	} else if(sys->mem[0].npage != 0) {
+		page = mallocalign(PTSZ, PGSZ, 0, 0);
+	} else {
+		page = rampage();
+	}
+	memset(page, 0, PTSZ);
+	table[index] = PADDR(page) | flags;
+	return page;
+}
+
+uintptr_t*
+mmuwalk(uintptr_t* table, uintptr_t va, int level, int create)
+{
+	uintptr_t pte;
+	int i, x;
+
+	x = PTLX(va, 3);
+	for(i = 2; i >= level; i--){
+		pte = table[x];
+		if(pte & PTEVALID){
+			if(pte & PTESIZE)
+				return 0;
+			table = KADDR(PPN(pte));
+		} else {
+			if(!create)
+				return 0;
+			table = mmucreate(table, va, i, x);
+		}
+		x = PTLX(va, i);
+	}
+	return &table[x];
+}
+
+static int
+ptecount(uintptr_t va, int level)
+{
+	return (1<<PTSHFT) - (va & PGLSZ(level+1)-1) / PGLSZ(level);
+}
+
+void
+pmap(uintptr_t *pml4, uintptr_t pa, uintptr_t va, long size)
+{
+	uintptr_t *pte, *ptee, flags;
+	int z, l;
+
+	if(size <= 0 || va < VMAP)
+		panic("pmap: pa=%#p va=%#p size=%lld", pa, va, size);
+	flags = pa;
+	pa = PPN(pa);
+	flags -= pa;
+	if(va >= KZERO)
+		flags |= PTEGLOBAL;
+	while(size > 0){
+		if(size >= PGLSZ(1) && (va % PGLSZ(1)) == 0)
+			flags |= PTESIZE;
+		l = (flags & PTESIZE) != 0;
+		z = PGLSZ(l);
+		pte = mmuwalk(pml4, va, l, 1);
+		if(pte == 0){
+			pte = mmuwalk(pml4, va, ++l, 0);
+			if(pte && (*pte & PTESIZE)){
+				flags |= PTESIZE;
+				z = va & (PGLSZ(l)-1);
+				va -= z;
+				pa -= z;
+				size += z;
+				continue;
+			}
+			panic("pmap: pa=%#p va=%#p size=%lld", pa, va, size);
+		}
+		ptee = pte + ptecount(va, l);
+		while(size > 0 && pte < ptee){
+			*pte++ = pa | flags;
+			pa += z;
+			va += z;
+			size -= z;
+		}
+	}
+}
+
+static void
+mmuzap(void)
+{
+	uintptr_t *pte;
+	uint64_t w;
+	int i, x;
+
+	pte = m->pml4;
+	pte[PTLX(KMAP, 3)] = 0;
+
+	/* common case */
+	pte[PTLX(UTZERO, 3)] = 0;
+	pte[PTLX(TSTKTOP, 3)] = 0;
+	m->mmumap[PTLX(UTZERO, 3)/MAPBITS] &= ~(1ull<<(PTLX(UTZERO, 3)%MAPBITS));
+	m->mmumap[PTLX(TSTKTOP, 3)/MAPBITS] &= ~(1ull<<(PTLX(TSTKTOP, 3)%MAPBITS));
+
+	for(i = 0; i < nelem(m->mmumap); pte += MAPBITS, i++){
+		if((w = m->mmumap[i]) == 0)
+			continue;
+		m->mmumap[i] = 0;
+		for(x = 0; w != 0; w >>= 1, x++){
+			if(w & 1)
+				pte[x] = 0;
+		}
+	}
+}
+
+static void
+mmufree(Proc *proc)
+{
+	MMU *p;
+
+	p = proc->mmutail;
+	if(p == nil)
+		return;
+	if(m->mmucount+proc->mmucount < 256){
+		p->next = m->mmufree;
+		m->mmufree = proc->mmuhead;
+		m->mmucount += proc->mmucount;
+	} else {
+		lock(&mmupool);
+		p->next = mmupool.free;
+		mmupool.free = proc->mmuhead;
+		mmupool.nfree += proc->mmucount;
+		unlock(&mmupool);
+	}
+	proc->mmuhead = proc->mmutail = nil;
+	proc->mmucount = 0;
 }
 
 void
 mmuflush(void)
 {
-	int s;
+	int x;
 
-	s = splhi();
+	x = splhi();
 	up->newtlb = 1;
 	mmuswitch(up);
-	splx(s);
-}
-
-static void
-mmuptpfree(Proc* proc, int clear)
-{
-	int l;
-	PTE *pte;
-	Ptpage **last, *page;
-
-	for(l = 0; l < 4; l++){
-		last = &proc->mmuptp[l];
-		if(*last == nil)
-			continue;
-		for(; (page = *last) != nil; last = &page->next){
-			if(l <= 2 && clear)
-				jehanne_memset(page->pte, 0, PTSZ);
-			pte = page->parent->pte;
-			pte[page->ptoff] = 0;
-			proc->nptpbusy--;
-		}
-		*last = proc->ptpfree;
-		proc->ptpfree = proc->mmuptp[l];
-		proc->mmuptp[l] = nil;
-	}
-
-	m->pml4->ptoff = 0;
-}
-
-static Ptpage*
-mmuptpalloc(void)
-{
-	Ptpage *page;
-	uintmem pa;
-
-	page = m->ptpfree;
-	if(page != nil){
-		m->ptpfree = page->next;
-		m->nptpfree--;
-	}else{
-		lock(&ptpfreelist);
-		page = ptpfreelist.next;
-		if(page != nil)
-			ptpfreelist.next = page->next;
-		unlock(&ptpfreelist);
-	}
-	if(page != nil){
-		page->next = nil;
-		jehanne_memset(page->pte, 0, PTSZ);
-		return page;
-	}
-	pa = physalloc(PTSZ);
-	if(pa == 0){
-		physdump();
-		panic("mmuptpalloc");
-	}
-	DBG("ptp %#P\n", pa);
-	page = jehanne_mallocz(sizeof(*page), 0);
-	if(page == nil)
-		panic("mmuptpalloc 2");
-	page->pte = KADDR(pa);
-	page->pa = pa;
-	page->next = nil;
-	page->parent = nil;
-	page->ptoff = 0;
-	jehanne_memset(page->pte, 0, PTSZ);
-	return page;
+	splx(x);
 }
 
 void
-mmuswitch(Proc* proc)
+mmuswitch(Proc *proc)
 {
-	PTE *pte;
-	Ptpage *page;
+	MMU *p;
 
+	mmuzap();
 	if(proc->newtlb){
-		mmuptpfree(proc, 1);
+		mmufree(proc);
 		proc->newtlb = 0;
 	}
-
-	if(m->pml4->ptoff){
-		jehanne_memset(m->pml4->pte, 0, m->pml4->ptoff*sizeof(PTE));
-		m->pml4->ptoff = 0;
+	if((p = proc->kmaphead) != nil)
+		m->pml4[PTLX(KMAP, 3)] = PADDR(p->page) | PTEWRITE|PTEVALID;
+	for(p = proc->mmuhead; p != nil && p->level == PML4E; p = p->next){
+		m->mmumap[p->index/MAPBITS] |= 1ull<<(p->index%MAPBITS);
+		m->pml4[p->index] = PADDR(p->page) | PTEUSER|PTEWRITE|PTEVALID;
 	}
-
-	/* install new page directory pointers in pml4 */
-	pte = m->pml4->pte;
-	for(page = proc->mmuptp[3]; page != nil; page = page->next){
-		pte[page->ptoff] = PPN(page->pa)|PteU|PteRW|PteP;
-		if(page->ptoff >= m->pml4->ptoff)
-			m->pml4->ptoff = page->ptoff+1;
-		page->parent = m->pml4;
-	}
-
-	tssrsp0(STACKALIGN(PTR2UINT(proc->kstack+KSTACK)));
-	cr3put(m->pml4->pa);
+	taskswitch((uintptr_t)proc->kstack+KSTACK);
 }
 
 void
-mmurelease(Proc* proc)
+mmurelease(Proc *proc)
 {
-	Ptpage *page, **last;
+	MMU *p;
 
-	mmuptpfree(proc, 0);
+	mmuzap();
+	if((p = proc->kmaptail) != nil){
+		if((p->next = proc->mmuhead) == nil)
+			proc->mmutail = p;
+		proc->mmuhead = proc->kmaphead;
+		proc->mmucount += proc->kmapcount;
 
-	/* keep a few page tree pages per cpu */
-	while((page = proc->ptpfree) != nil){
-		page->parent = nil;
-		if(sys->nmach != 1 && m->nptpfree > 20)
-			break;
-		proc->ptpfree = page->next;
-		page->next = m->ptpfree;
-		m->ptpfree = page;
-		m->nptpfree++;
+		proc->kmaphead = proc->kmaptail = nil;
+		proc->kmapcount = proc->kmapindex = 0;
 	}
-
-	if(proc->ptpfree != nil){
-		/* add the rest to the global pool */
-		for(last = &proc->ptpfree; (page = *last) != nil; last = &page->next)
-			page->parent = nil;
-		lock(&ptpfreelist);
-		*last = ptpfreelist.next;
-		ptpfreelist.next = proc->ptpfree;
-		proc->ptpfree = nil;
-		unlock(&ptpfreelist);
-	}
-
-	if(proc->nptpbusy)
-		jehanne_print("%ud: ptpbusy %s %d\n", proc->pid, proc->text, proc->nptpbusy);
-	proc->nptpbusy = 0;
-
-	tssrsp0(STACKALIGN(m->stack+MACHSTKSZ));
-	cr3put(m->pml4->pa);
-}
-
-static PTE*
-mmuptpget(uintptr_t va, int level)
-{
-	return (PTE*)KSEG1PTP(va, level);
-}
-
-static Ptpage*
-makeptp(Ptpage *parent, int l, PTE *ptp, int x)
-{
-	Ptpage *page;
-	PTE *pte;
-
-	for(page = up->mmuptp[l]; page != nil; page = page->next)
-		if(page->parent == parent && page->ptoff == x)
-			return page;
-	pte = &ptp[x];
-	if(up->ptpfree == nil){
-		page = mmuptpalloc();
-	}
-	else {
-		page = up->ptpfree;
-		up->ptpfree = page->next;
-	}
-	page->ptoff = x;
-	page->next = up->mmuptp[l];
-	up->mmuptp[l] = page;
-	page->parent = parent;
-	*pte = page->pa|PteU|PteRW|PteP;
-	if(l == 3 && x >= m->pml4->ptoff)
-		m->pml4->ptoff = x+1;
-	up->nptpbusy++;
-	DBG("%d: pte put l%d %#p[%d] -> %#P pte %#p\n", up->pid, l, ptp, x, *pte, pte);
-	return page;
+	mmufree(proc);
+	taskswitch((uintptr_t)m+MACHSIZE);
 }
 
 void
 mmuput(uintptr_t va, uintptr_t pa)
 {
-	Mpl pl;
-	int l, x;
-	PTE *pte, *ptp, opte;
-	Ptpage *prev;
+	uintptr_t *pte, old;
+	int x;
 
-	pl = splhi();
-	for(l = 3; l > 0; l--){
-		ptp = mmuptpget(va, l);
-		pte = &ptp[PTLX(va,l)];
-		if(l == 0 || (*pte & PteP) == 0 || (*pte & PtePS))
-			break;
-	}
-	if(l != 0){
-		/* add missing intermediate level */
-		prev = m->pml4;
-		for(l = 3; l > 0; l--){
-			ptp = mmuptpget(va, l);
-			x = PTLX(va, l);
-			prev = makeptp(prev, l, ptp, x);
-		}
-	}
-	ptp = mmuptpget(va, 0);
-	pte = &ptp[PTLX(va, 0)];
-	opte = *pte;
-	*pte = pa | PteU;
-	DBG("%d mach%d: put pte %#p: %#p -> %#P\n", up->pid, m->machno, pte, va, *pte);
-
-	/* Simple and safe: programs can either write memory or execute it.
-	 * TODO: verify that this is not too restrictive
-	 */
+	x = splhi();
+	pte = mmuwalk(m->pml4, va, 0, 1);
+	if(pte == 0)
+		panic("mmuput: bug: va=%#p pa=%#p", va, pa);
+	old = *pte;
 	if(pa & PteRW)
-		*pte |= PteNX;
-
-#ifdef DO_mmuptpcheck
-	mmuptpcheck(up);
-#endif
-	splx(pl);
-	if(opte & PTEVALID)
+		pa |= PteNX;
+	*pte = pa | PTEVALID|PTEUSER;
+	splx(x);
+	if(old & PTEVALID)
 		invlpg(va);
 }
 
-static PTE
-pdeget(uintptr_t va)
-{
-	PTE *pdp;
-
-	if(va < 0xffffffffc0000000ull)
-		panic("pdeget(%#p)", va);
-
-	pdp = (PTE*)(PDMAP+PDX(PDMAP)*4096);
-
-	return pdp[PDX(va)];
-}
-
 /*
- * Add kernel mappings for va -> pa for a section of size bytes.
- * Called only after the va range is known to be unoccupied.
+ * Double-check the user MMU.
+ * Error checking only.
  */
-static int
-pdmap(uintmem pa, int attr, uintptr_t va, usize size)
+void
+checkmmu(uintptr_t va, uintptr_t pa)
 {
-	uintmem pae;
-	PTE *pd, *pde, *pt, *pte;
-	uintmem pdpa;
-	int pdx, pgsz;
+	uintptr_t *pte;
 
-	pd = (PTE*)(PDMAP+PDX(PDMAP)*4096);
-
-	for(pae = pa + size; pa < pae; pa += pgsz){
-		pdx = PDX(va);
-		pde = &pd[pdx];
-
-		/*
-		 * Check if it can be mapped using a big page,
-		 * i.e. is big enough and starts on a suitable boundary.
-		 * Assume processor can do it.
-		 */
-		if(ALIGNED(pa, PGLSZ(1)) && ALIGNED(va, PGLSZ(1)) && (pae-pa) >= PGLSZ(1)){
-			assert(*pde == 0);
-			*pde = pa|attr|PtePS|PteP;
-			pgsz = PGLSZ(1);
-		}
-		else{
-			pt = (PTE*)(PDMAP+pdx*PTSZ);
-			if(*pde == 0){
-				pdpa = physalloc(PTSZ);
-				if(pdpa == 0)
-					panic("pdmap");
-				*pde = pdpa|PteRW|PteP;
-//jehanne_print("*pde %#llux va %#p\n", *pde, va);
-				jehanne_memset(pt, 0, PTSZ);
-			}
-
-			pte = &pt[PTX(va)];
-			assert(!(*pte & PteP));
-			*pte = pa|attr|PteP;
-			pgsz = PGLSZ(0);
-		}
-		va += pgsz;
-	}
-
-	return 0;
+	pte = mmuwalk(m->pml4, va, 0, 0);
+	if(pte != 0 && (*pte & PTEVALID) != 0 && PPN((*pte & (PteNX-1))) != pa)
+		print("%ld %s: va=%#p pa=%#p pte=%#p\n",
+			up->pid, up->text, va, pa, *pte);
 }
 
-static int
-findhole(PTE* a, int n, int count)
+uintptr_t
+cankaddr(uintptr_t pa)
 {
-	int have, i;
-
-	have = 0;
-	for(i = 0; i < n; i++){
-		if(a[i] == 0)
-			have++;
-		else
-			have = 0;
-		if(have >= count)
-			return i+1 - have;
-	}
-
-	return -1;
-}
-
-/*
- * Look for free space in the vmap.
- */
-static uintptr_t
-vmapalloc(usize size)
-{
-	int i, n, o;
-	PTE *pd, *pt;
-	int pdsz, ptsz;
-
-	pd = (PTE*)(PDMAP+PDX(PDMAP)*4096);
-	pd += PDX(VMAP);
-	pdsz = VMAPSZ/PGLSZ(1);
-
-	/*
-	 * Look directly in the PD entries if the size is
-	 * larger than the range mapped by a single entry.
-	 */
-	if(size >= PGLSZ(1)){
-		n = HOWMANY(size, PGLSZ(1));
-		if((o = findhole(pd, pdsz, n)) != -1)
-			return VMAP + o*PGLSZ(1);
+	if(pa >= -KZERO)
 		return 0;
-	}
-
-	/*
-	 * Size is smaller than that mapped by a single PD entry.
-	 * Look for an already mapped PT page that has room.
-	 */
-	n = HOWMANY(size, PGLSZ(0));
-	ptsz = PGLSZ(0)/sizeof(PTE);
-	for(i = 0; i < pdsz; i++){
-		if(!(pd[i] & PteP) || (pd[i] & PtePS))
-			continue;
-
-		pt = (PTE*)(PDMAP+(PDX(VMAP)+i)*4096);
-		if((o = findhole(pt, ptsz, n)) != -1)
-			return VMAP + i*PGLSZ(1) + o*PGLSZ(0);
-	}
-
-	/*
-	 * Nothing suitable, start using a new PD entry.
-	 */
-	if((o = findhole(pd, pdsz, 1)) != -1)
-		return VMAP + o*PGLSZ(1);
-
-	return 0;
-}
-
-void*
-vmap(uintptr_t pa, usize size)
-{
-	uintptr_t va;
-	usize o, sz;
-
-	DBG("vmap(%#p, %lud)\n", pa, size);
-
-	if(m->machno != 0)
-		panic("vmap(%#p, %lud) pc %#p mach%d", pa, size, getcallerpc(), m->machno);
-
-	/*
-	 * This is incomplete; the checks are not comprehensive
-	 * enough.
-	 * Sometimes the request is for an already-mapped piece
-	 * of low memory, in which case just return a good value
-	 * and hope that a corresponding vunmap of the address
-	 * will have the same address.
-	 * To do this properly will require keeping track of the
-	 * mappings; perhaps something like kmap, but kmap probably
-	 * can't be used early enough for some of the uses.
-	 */
-	if(pa+size <= 1ull*MiB)
-		return KADDR(pa);
-	if(pa < 1ull*MiB)
-		return nil;
-
-	/*
-	 * Might be asking for less than a page.
-	 * This should have a smaller granularity if
-	 * the page size is large.
-	 */
-	o = pa & ((1<<PGSHFT)-1);
-	pa -= o;
-	sz = ROUNDUP(size+o, PGSZ);
-
-	if(pa == 0){
-		jehanne_print("vmap(0, %lud) pc=%#p\n", size, getcallerpc());
-		return nil;
-	}
-	ilock(&vmaplock);
-	if((va = vmapalloc(sz)) == 0 || pdmap(pa, PtePCD|PteRW, va, sz) < 0){
-		iunlock(&vmaplock);
-		return nil;
-	}
-	iunlock(&vmaplock);
-
-	DBG("vmap(%#p, %lud) => %#p\n", pa+o, size, va+o);
-
-	return UINT2PTR(va + o);
+	return -KZERO - pa;
 }
 
 void
-vunmap(void* v, usize size)
+countpagerefs(unsigned long *ref, int print)
 {
-	uintptr_t va;
-
-	DBG("vunmap(%#p, %lud)\n", v, size);
-
-	if(m->machno != 0)
-		panic("vunmap");
-
-	/*
-	 * See the comments above in vmap.
-	 */
-	va = PTR2UINT(v);
-	if(va >= KZERO && va+size < KZERO+1ull*MiB)
-		return;
-
-	/*
-	 * Here will have to deal with releasing any
-	 * resources used for the allocation (e.g. page table
-	 * pages).
-	 */
-	DBG("vunmap(%#p, %lud)\n", v, size);
+	USED(ref, print);
 }
 
-int
-mmuwalk(uintptr_t va, int level, PTE** ret, uint64_t (*alloc)(usize))
+KMap*
+kmap(uintptr_t pa)
 {
-	int l;
-	Mpl pl;
-	uintmem pa;
-	PTE *pte, *ptp;
+	uintptr_t *pte, va;
+	int x;
 
-	DBG("mmuwalk%d: va %#p level %d\n", m->machno, va, level);
-	pte = nil;
-	pl = splhi();
-	for(l = 3; l >= 0; l--){
-		ptp = mmuptpget(va, l);
-		pte = &ptp[PTLX(va, l)];
-		if(l == level)
-			break;
-		if(!(*pte & PteP)){
-			if(alloc == nil)
-				return -1;
-			pa = alloc(PTSZ);
-			if(pa == ~(uintmem)0 || pa == 0)
-				return -1;
-if(pa & 0xfffull) jehanne_print("mmuwalk pa %#llux\n", pa);
-			*pte = pa|PteRW|PteP;
-			if((ptp = mmuptpget(va, l-1)) == nil)
-				panic("mmuwalk: mmuptpget(%#p, %d)", va, l-1);
-			jehanne_memset(ptp, 0, PTSZ);
-		}
-		else if(*pte & PtePS)
-			break;
-	}
-	*ret = pte;
-	splx(pl);
+	if(cankaddr(pa) != 0)
+		return (KMap*)KADDR(pa);
 
-	return l;
+	x = splhi();
+	va = KMAP + ((uintptr_t)up->kmapindex << PGSHFT);
+	pte = mmuwalk(m->pml4, va, 0, 1);
+	if(pte == 0 || *pte & PTEVALID)
+		panic("kmap: pa=%#p va=%#p", pa, va);
+	*pte = pa | PTEWRITE|PTEVALID;
+	up->kmapindex = (up->kmapindex + 1) % (1<<PTSHFT);
+	if(up->kmapindex == 0)
+		mmuflushtlb();
+	splx(x);
+	return (KMap*)va;
+}
+
+void
+kunmap(KMap *k)
+{
+	uintptr_t *pte, va;
+	int x;
+
+	va = (uintptr_t)k;
+	if(va >= KZERO)
+		return;
+
+	x = splhi();
+	pte = mmuwalk(m->pml4, va, 0, 0);
+	if(pte == 0 || (*pte & PTEVALID) == 0)
+		panic("kunmap: va=%#p", va);
+	*pte = 0;
+	splx(x);
 }
 
 uint64_t
 mmuphysaddr(uintptr_t va)
 {
-	int l;
-	PTE *pte;
+	uintptr_t *pte;
 	uint64_t mask, pa;
 
 	/*
@@ -530,280 +540,79 @@ mmuphysaddr(uintptr_t va)
 	 * but will do as an experiment. Usual
 	 * question, should va be void* or uintptr_t?
 	 */
-	l = mmuwalk(va, 0, &pte, nil);
-	DBG("physaddr: va %#p l %d\n", va, l);
-	if(l < 0 || (*pte & PteP) == 0)
+	pte = mmuwalk(m->pml4, va, 0, 0);
+	DBG("physaddr: va %#p pte %#p\n", va, pte);
+	if(pte == 0 || (*pte & PteP) == 0)
 		return ~(uintmem)0;
 
-	mask = (1ull<<(((l)*PTSHFT)+PGSHFT))-1;
+	mask = (1ull<<PGSHFT)-1;
 	pa = (*pte & ~mask) + (va & mask);
 
-	DBG("physaddr: l %d va %#p pa %#llux\n", l, va, pa);
+	DBG("physaddr: pte %#p va %#p pa %#llux\n", pte, va, pa);
 
 	return pa;
 }
 
-void
-mmuinit(void)
+/*
+ * Add a device mapping to the vmap range.
+ * note that the VMAP and KZERO PDPs are shared
+ * between processors (see mpstartap) so no
+ * synchronization is being done.
+ */
+void*
+vmap(uintptr_t pa, usize size)
 {
-	int l;
-	uint8_t *p;
-	PTE *pte;
-	Ptpage *page;
-	uintptr_t pml4;
-	uint64_t o, pa, r, sz;
-
-	archmmu();
-	DBG("mach%d: %#p npgsz %d\n", m->machno, m, m->npgsz);
-	if(m->machno != 0){
-		/*
-		 * GAK: Has to go when each mach is using
-		 * its own page table
-		 */
-		p = UINT2PTR(m->stack);
-		p += MACHSTKSZ;
-		jehanne_memmove(p, mach0pml4.pte, PTSZ);
-		m->pml4 = &m->pml4kludge;
-		m->pml4->pte = (PTE*)p;
-		m->pml4->pa = PADDR(p);
-		m->pml4->ptoff = mach0pml4.ptoff;	/* # of user mappings in pml4 */
-		if(m->pml4->ptoff){
-			jehanne_memset(p, 0, m->pml4->ptoff*sizeof(PTE));
-			m->pml4->ptoff = 0;
-		}
-pte = (PTE*)p;
-pte[PTLX(KSEG1PML4, 3)] = m->pml4->pa|PteRW|PteP;
-
-		r = rdmsr(Efer);
-		r |= Nxe;
-		wrmsr(Efer, r);
-		cr3put(m->pml4->pa);
-		DBG("mach%d: %#p pml4 %#p\n", m->machno, m, m->pml4);
-		return;
-	}
-
-	page = &mach0pml4;
-	page->pa = cr3get();
-	page->pte = sys->pml4;
-
-	m->pml4 = page;
-
-	r = rdmsr(Efer);
-	r |= Nxe;
-	wrmsr(Efer, r);
+	uintptr_t va;
+	int o;
 
+	if(pa+size > VMAPSIZE)
+		return 0;
+	va = pa+VMAP;
 	/*
-	 * Set up the various kernel memory allocator limits:
-	 * pmstart/pmend bound the unused physical memory;
-	 * vmstart/vmunmapped bound the total possible virtual memory
-	 * used by the kernel in KSEG0;
-	 * vmunused is the highest virtual address currently mapped
-	 * and used by the kernel;
-	 * vmunmapped is the highest virtual address currently
-	 * mapped by the kernel.
-	 * Vmunused can be bumped up to vmunmapped before more
-	 * physical memory needs to be allocated and mapped.
-	 *
-	 * This is set up here so meminit can map appropriately.
+	 * might be asking for less than a page.
 	 */
-	o = sys->pmstart;
-	sz = ROUNDUP(o+128*KiB, 4*MiB) - o;	/* add extra 128k for initial pt/pd allocations */
-jehanne_print("mmuinit: rmapalloc: %#P pmstart=%#llux\n", o, sys->pmstart);
-	pa = rmapalloc(&rmapram, o, sz, 0);
-	if(pa != o)
-		panic("mmuinit: pa %#llux memstart %#llux\n", pa, o);
-	sys->pmstart += sz;
-
-	sys->vmstart = KSEG0;
-	sys->vmunused = sys->vmstart + ROUNDUP(o, 4*KiB);
-	sys->vmunmapped = sys->vmstart + o + sz;
-
-	jehanne_print("mmuinit: vmstart %#p vmunused %#p vmunmapped %#p\n",
-		sys->vmstart, sys->vmunused, sys->vmunmapped);
-
-	/*
-	 * Set up the map for PD entry access by inserting
-	 * the relevant PDP entry into the PD. It's equivalent
-	 * to PADDR(sys->pd)|PteRW|PteP.
-	 *
-	 * Change code that uses this to use the KSEG1PML4
-	 * map below.
-	 */
-	sys->pd[PDX(PDMAP)] = sys->pdp[PDPX(PDMAP)] & ~(PteD|PteA);
-	jehanne_print("sys->pd %#p %#p\n", sys->pd[PDX(PDMAP)], sys->pdp[PDPX(PDMAP)]);
-
-	assert((pdeget(PDMAP) & ~(PteD|PteA)) == (PADDR(sys->pd)|PteRW|PteP));
-
-	/*
-	 * Set up the map for PTE access by inserting
-	 * the relevant PML4 into itself.
-	 * Note: outwith level 0, PteG is MBZ on AMD processors,
-	 * is 'Reserved' on Intel processors, and the behaviour
-	 * can be different.
-	 */
-	pml4 = cr3get();
-	sys->pml4[PTLX(KSEG1PML4, 3)] = pml4|PteRW|PteP;
-	cr3put(m->pml4->pa);
-
-	if((l = mmuwalk(KZERO, 3, &pte, nil)) >= 0)
-		jehanne_print("l %d %#p %llux\n", l, pte, *pte);
-	if((l = mmuwalk(KZERO, 2, &pte, nil)) >= 0)
-		jehanne_print("l %d %#p %llux\n", l, pte, *pte);
-	if((l = mmuwalk(KZERO, 1, &pte, nil)) >= 0)
-		jehanne_print("l %d %#p %llux\n", l, pte, *pte);
-	if((l = mmuwalk(KZERO, 0, &pte, nil)) >= 0)
-		jehanne_print("l %d %#p %llux\n", l, pte, *pte);
-
-	mmuphysaddr(PTR2UINT(end));
+	o = pa & (PGSZ-1);
+	pa -= o;
+	va -= o;
+	size += o;
+	pmap(m->pml4, pa | PTEUNCACHED|PTEWRITE|PTEVALID, va, size);
+	return (void*)(va+o);
 }
 
 void
-mmudump(Proc *p)
+vunmap(void* v, usize _)
 {
-	Ptpage *ptp;
-	int i, l;
-
-	for(l = 3; l >= 0; l--){
-		for(ptp = p->mmuptp[l]; ptp != nil; ptp = ptp->next){
-			jehanne_print("pid %d level %d ptp %#p\n", p->pid, l, ptp);
-			for(i = 0; i < PTSZ/sizeof(PTE); i++)
-				if(ptp->pte[i])
-					jehanne_print("%.4d %#P\n", i, ptp->pte[i]);
-		}
-	}
+	PADDR(v);	/* will panic on error */
 }
 
 /*
- * Double-check the user MMU.
- * Error checking only.
+ * mark pages as write combining (used for framebuffer)
  */
 void
-checkmmu(uintptr_t va, uintmem pa)
+patwc(void *a, int n)
 {
-	uintmem mpa;
+	uintptr_t *pte, mask, attr, va;
+	int z, l;
+	long v;
 
-	mpa = mmuphysaddr(va);
-	if(mpa != ~(uintmem)0 && (mpa & (PteNX-1)) != pa)
-		jehanne_print("***%d %s: mmu mismatch va=%#p pa=%#P mmupa=%#P\n",
-			up->pid, up->text, va, pa, mpa);
-}
-
-static void
-tabs(int n)
-{
-	int i;
-
-	for(i = 0; i < n; i++)
-		jehanne_print("  ");
-}
-
-void
-dumpptepg(int lvl, uintmem pa)
-{
-	PTE *pte;
-	int tab, i;
-
-	tab = 4 - lvl;
-	pte = UINT2PTR(KADDR(pa));
-	for(i = 0; i < PTSZ/sizeof(PTE); i++)
-		if(pte[i] & PteP){
-			tabs(tab);
-			jehanne_print("l%d %#p[%#05x]: %#llux\n", lvl, pa, i, pte[i]);
-
-			/* skip kernel mappings */
-			if((pte[i]&PteU) == 0){
-				tabs(tab+1);
-				jehanne_print("...kern...\n");
-				continue;
-			}
-			if(lvl > 2)
-				dumpptepg(lvl-1, PPN(pte[i]));
-		}
-}
-
-void
-dumpmmu(Proc *p)
-{
-	int i;
-	Ptpage *pt;
-
-	jehanne_print("proc %#p\n", p);
-	for(i = 3; i >= 0; i--){
-		jehanne_print("mmuptp[%d]:\n", i);
-		for(pt = p->mmuptp[i]; pt != nil; pt = pt->next)
-			jehanne_print("\tpt %#p = va %#p pa %#P"
-				" ptoff %#ux next %#p parent %#p\n",
-				pt, pt->pte, pt->pa, pt->ptoff, pt->next, pt->parent);
-	}
-	jehanne_print("pml4 %#P\n", m->pml4->pa);
-	if(0)dumpptepg(4, m->pml4->pa);
-}
-
-void
-dumpmmuwalk(uintmem addr)
-{
-	int l;
-	PTE *pte;
-
-	if((l = mmuwalk(addr, 3, &pte, nil)) >= 0)
-		jehanne_print("cpu%d: mmu l%d pte %#p = %llux\n", m->machno, l, pte, *pte);
-	if((l = mmuwalk(addr, 2, &pte, nil)) >= 0)
-		jehanne_print("cpu%d: mmu l%d pte %#p = %llux\n", m->machno, l, pte, *pte);
-	if((l = mmuwalk(addr, 1, &pte, nil)) >= 0)
-		jehanne_print("cpu%d: mmu l%d pte %#p = %llux\n", m->machno, l, pte, *pte);
-	if((l = mmuwalk(addr, 0, &pte, nil)) >= 0)
-		jehanne_print("cpu%d: mmu l%d pte %#p = %llux\n", m->machno, l, pte, *pte);
-}
-#ifdef DO_mmuptpcheck
-static void
-mmuptpcheck(Proc *proc)
-{
-	enum{Tsize = 512};
-	int lvl, npgs, i;
-	Mpl pl;
-	Ptpage *lp, *p, *pgs[Tsize], *fp;
-	uint32_t idx[Tsize];
-
-	if(proc == nil)
+	/* check if pat is usable */
+	if((MACHP(0)->cpuiddx & Pat) == 0
+	|| rdmsr(0x277, &v) == -1
+	|| ((v >> PATWC*8) & 7) != 1)
 		return;
-	pl = splhi();
-	lp = m->pml4;
-	for(lvl = 3; lvl >= 1; lvl--){
-		npgs = 0;
-		for(p = proc->mmuptp[lvl]; p != nil; p = p->next){
-			for(fp = proc->ptpfree; fp != nil; fp = fp->next)
-				if(fp == p){
-					dumpmmu(proc);
-					panic("ptpcheck: using free page");
-				}
-			for(i = 0; i < npgs; i++){
-				if(pgs[i] == p){
-					dumpmmu(proc);
-					panic("ptpcheck: dup page");
-				}
-				if(idx[i] == p->ptoff){
-					dumpmmu(proc);
-					panic("ptcheck: dup ptoff %d (%#p == %#p)", p->ptoff, pgs[i], p);
-				}
-			}
-			if(npgs >= Tsize)
-				panic("ptpcheck: pgs is too small");
-			idx[npgs] = p->ptoff;
-			pgs[npgs++] = p;
-			if(lvl == 3 && p->parent != lp){
-				dumpmmu(proc);
-				panic("ptpcheck: wrong parent");
-			}
-		}
-		
+
+	/* set the bits for all pages in range */
+	for(va = (uintptr_t)a; n > 0; n -= z, va += z){
+		l = 0;
+		pte = mmuwalk(m->pml4, va, l, 0);
+		if(pte == 0)
+			pte = mmuwalk(m->pml4, va, ++l, 0);
+		if(pte == 0 || (*pte & PTEVALID) == 0)
+			panic("patwc: va=%#p", va);
+		z = PGLSZ(l);
+		z -= va & (z-1);
+		mask = l == 0 ? 3<<3 | 1<<7 : 3<<3 | 1<<12;
+		attr = (((PATWC&3)<<3) | ((PATWC&4)<<5) | ((PATWC&4)<<10));
+		*pte = (*pte & ~mask) | (attr & mask);
 	}
-	npgs = 0;
-	for(fp = proc->ptpfree; fp != nil; fp = fp->next){
-		for(i = 0; i < npgs; i++)
-			if(pgs[i] == fp)
-				panic("ptpcheck: dup free page");
-		pgs[npgs++] = fp;
-	}
-	splx(pl);
 }
-#endif
diff --git a/sys/src/kern/amd64/mouse.c b/sys/src/kern/amd64/mouse.c
index 9ec4f61..2ec21d2 100644
--- a/sys/src/kern/amd64/mouse.c
+++ b/sys/src/kern/amd64/mouse.c
@@ -6,7 +6,6 @@
  * modified, propagated, or distributed except according to the terms contained
  * in the LICENSE file.
  */
-
 #include "u.h"
 #include "../port/lib.h"
 #include "mem.h"
@@ -31,8 +30,6 @@ enum
 	MousePS2=	2,
 };
 
-extern int mouseshifted;
-
 static QLock mousectlqlock;
 static int mousetype;
 static int intellimouse;
@@ -40,6 +37,7 @@ static int packetsize;
 static int resolution;
 static int accelerated;
 static int mousehwaccel;
+static char mouseport[5];
 
 enum
 {
@@ -80,7 +78,7 @@ static Cmdtab mousectlmsg[] =
  *	byte 3 -	00 or 01 or FF according to extra button state.
  * extra buttons are mapped in this code to buttons 4 and 5.
  * AccuPoint generates repeated events for these buttons;
-*  it and Intellimouse generate 'down' events only, so
+ * it and Intellimouse generate 'down' events only, so
  * user-level code is required to generate button 'up' events
  * if they are needed by the application.
  * Also on laptops with AccuPoint AND external mouse, the
@@ -93,6 +91,76 @@ static Cmdtab mousectlmsg[] =
  * To resynchronize, if we get a byte more than two seconds
  * after the previous byte, we assume it's the first in a packet.
  */
+static void
+ps2mouseputc(int c, int shift)
+{
+	static short msg[4];
+	static int nb;
+	static uint8_t b[] = {0, 1, 4, 5, 2, 3, 6, 7, 0, 1, 2, 3, 2, 3, 6, 7 };
+	static uint32_t lasttick;
+	uint32_t m;
+	int buttons, dx, dy;
+
+	/*
+	 * Resynchronize in stream with timing; see comment above.
+	 */
+	m = MACHP(0)->ticks;
+	if(TK2SEC(m - lasttick) > 2)
+		nb = 0;
+	lasttick = m;
+
+	/*
+	 *  check byte 0 for consistency
+	 */
+	if(nb==0 && (c&0xc8)!=0x08){
+		if(intellimouse && (c==0x00 || c==0x01 || c==0xFF)){
+			/* last byte of 4-byte packet */
+			packetsize = 4;
+		}
+		return;
+	}
+
+	msg[nb] = c;
+	if(++nb >= packetsize){
+		nb = 0;
+		if(msg[0] & 0x10)
+			msg[1] |= 0xFF00;
+		if(msg[0] & 0x20)
+			msg[2] |= 0xFF00;
+
+		buttons = b[(msg[0]&7) | (shift ? 8 : 0)];
+		if(intellimouse && packetsize==4){
+			if((msg[3]&0xc8) == 0x08){
+				/* first byte of 3-byte packet */
+				packetsize = 3;
+				msg[0] = msg[3];
+				nb = 1;
+				/* fall through to emit previous packet */
+			}else{
+				/* The AccuPoint on the Toshiba 34[48]0CT
+				 * encodes extra buttons as 4 and 5. They repeat
+				 * and don't release, however, so user-level
+				 * timing code is required. Furthermore,
+				 * intellimice with 3buttons + scroll give a
+				 * two's complement number in the lower 4 bits
+				 * (bit 4 is sign extension) that describes
+				 * the amount the scroll wheel has moved during
+				 * the last sample. Here we use only the sign to
+				 * decide whether the wheel is moving up or down
+				 * and generate a single button 4 or 5 click
+				 * accordingly.
+				 */
+				if((msg[3] >> 3) & 1)
+					buttons |= 1<<3;
+				else if(msg[3] & 0x7)
+					buttons |= 1<<4;
+			}
+		}
+		dx = msg[1];
+		dy = -msg[2];
+		mousetrack(dx, dy, buttons, TK2MS(MACHP(0)->ticks));
+	}
+}
 
 /*
  *  set up a ps2 mouse
@@ -103,14 +171,12 @@ ps2mouse(void)
 	if(mousetype == MousePS2)
 		return;
 
-	mouseenable();
-	/* make mouse streaming, enabled */
-	mousecmd(0xEA);
-	mousecmd(0xF4);
-
 	mousetype = MousePS2;
 	packetsize = 3;
-	mousehwaccel = 1;
+	mousehwaccel = 0;
+
+	i8042auxenable(ps2mouseputc);
+	i8042auxcmd(0xEA);	/* set stream mode */
 }
 
 /*
@@ -131,7 +197,7 @@ setaccelerated(int x)
 	if(mousehwaccel){
 		switch(mousetype){
 		case MousePS2:
-			mousecmd(0xE7);
+			i8042auxcmd(0xE7);
 			return;
 		}
 	}
@@ -145,7 +211,7 @@ setlinear(void)
 	if(mousehwaccel){
 		switch(mousetype){
 		case MousePS2:
-			mousecmd(0xE6);
+			i8042auxcmd(0xE6);
 			return;
 		}
 	}
@@ -158,8 +224,8 @@ setres(int n)
 	resolution = n;
 	switch(mousetype){
 	case MousePS2:
-		mousecmd(0xE8);
-		mousecmd(n);
+		i8042auxcmd(0xE8);
+		i8042auxcmd(n);
 		break;
 	}
 }
@@ -171,12 +237,15 @@ setintellimouse(void)
 	packetsize = 4;
 	switch(mousetype){
 	case MousePS2:
-		mousecmd(0xF3);	/* set sample */
-		mousecmd(0xC8);
-		mousecmd(0xF3);	/* set sample */
-		mousecmd(0x64);
-		mousecmd(0xF3);	/* set sample */
-		mousecmd(0x50);
+		i8042auxcmd(0xF3);	/* set sample */
+		i8042auxcmd(0xC8);
+		i8042auxcmd(0xF3);	/* set sample */
+		i8042auxcmd(0x64);
+		i8042auxcmd(0xF3);	/* set sample */
+		i8042auxcmd(0x50);
+		break;
+	case Mouseserial:
+		uartsetmouseputc(mouseport, m5mouseputc);
 		break;
 	}
 }
@@ -187,11 +256,30 @@ resetmouse(void)
 	packetsize = 3;
 	switch(mousetype){
 	case MousePS2:
-		mousecmd(0xF6);
-		mousecmd(0xEA);	/* streaming */
-		mousecmd(0xE8);	/* set resolution */
-		mousecmd(3);
-		mousecmd(0xF4);	/* enabled */
+		i8042auxcmd(0xF6);
+		i8042auxcmd(0xEA);	/* streaming */
+		i8042auxcmd(0xE8);	/* set resolution */
+		i8042auxcmd(3);
+		break;
+	}
+}
+
+static void
+setstream(int on)
+{
+	int i;
+
+	switch(mousetype){
+	case MousePS2:
+		/*
+		 * disabling streaming can fail when
+		 * a packet is currently transmitted.
+		 */
+		for(i=0; i<4; i++){
+			if(i8042auxcmd(on ? 0xF4 : 0xF5) != -1)
+				break;
+			delay(50);
+		}
 		break;
 	}
 }
@@ -210,27 +298,37 @@ mousectl(Cmdbuf *cb)
 	ct = lookupcmd(cb, mousectlmsg, nelem(mousectlmsg));
 	switch(ct->index){
 	case CMaccelerated:
-		setaccelerated(cb->nf == 1 ? 1 : jehanne_atoi(cb->f[1]));
+		setstream(0);
+		setaccelerated(cb->nf == 1 ? 1 : atoi(cb->f[1]));
+		setstream(1);
 		break;
 	case CMintellimouse:
+		setstream(0);
 		setintellimouse();
+		setstream(1);
 		break;
 	case CMlinear:
+		setstream(0);
 		setlinear();
+		setstream(1);
 		break;
 	case CMps2:
 		intellimouse = 0;
 		ps2mouse();
+		setstream(1);
 		break;
 	case CMps2intellimouse:
 		ps2mouse();
 		setintellimouse();
+		setstream(1);
 		break;
 	case CMres:
+		setstream(0);
 		if(cb->nf >= 2)
-			setres(jehanne_atoi(cb->f[1]));
+			setres(atoi(cb->f[1]));
 		else
 			setres(1);
+		setstream(1);
 		break;
 	case CMreset:
 		resetmouse();
@@ -240,11 +338,31 @@ mousectl(Cmdbuf *cb)
 			setres(resolution);
 		if(intellimouse)
 			setintellimouse();
+		setstream(1);
+		break;
+	case CMserial:
+		if(mousetype == Mouseserial)
+			error(Emouseset);
+
+		if(cb->nf > 2){
+			if(strcmp(cb->f[2], "M") == 0)
+				uartmouse(cb->f[1], m3mouseputc, 0);
+			else if(strcmp(cb->f[2], "MI") == 0)
+				uartmouse(cb->f[1], m5mouseputc, 0);
+			else
+				uartmouse(cb->f[1], mouseputc, cb->nf == 1);
+		} else
+			uartmouse(cb->f[1], mouseputc, cb->nf == 1);
+
+		mousetype = Mouseserial;
+		strncpy(mouseport, cb->f[1], sizeof(mouseport)-1);
+		mouseport[sizeof(mouseport)-1] = 0;
+		packetsize = 3;
 		break;
 	case CMhwaccel:
-		if(jehanne_strcmp(cb->f[1], "on")==0)
+		if(strcmp(cb->f[1], "on")==0)
 			mousehwaccel = 1;
-		else if(jehanne_strcmp(cb->f[1], "off")==0)
+		else if(strcmp(cb->f[1], "off")==0)
 			mousehwaccel = 0;
 		else
 			cmderror(cb, "bad mouse control message");
diff --git a/sys/src/kern/amd64/mp.c b/sys/src/kern/amd64/mp.c
index 1c6603f..52de86a 100644
--- a/sys/src/kern/amd64/mp.c
+++ b/sys/src/kern/amd64/mp.c
@@ -3,426 +3,588 @@
 #include "mem.h"
 #include "dat.h"
 #include "fns.h"
-
 #include "io.h"
-#include "apic.h"
+#include "ureg.h"
 
-#undef DBG
-#define	DBG	jehanne_print
-/*
- * MultiProcessor Specification Version 1.[14].
- */
-typedef struct {				/* MP Floating Pointer */
-	uint8_t	signature[4];			/* "_MP_" */
-	uint8_t	addr[4];			/* PCMP */
-	uint8_t	length;				/* 1 */
-	uint8_t	revision;			/* [14] */
-	uint8_t	checksum;
-	uint8_t	feature[5];
-} _MP_;
+#include "mp.h"
+#include "sipi.h"
 
-typedef struct {				/* MP Configuration Table */
-	uint8_t	signature[4];			/* "PCMP" */
-	uint8_t	length[2];
-	uint8_t	revision;			/* [14] */
-	uint8_t	checksum;
-	uint8_t	string[20];			/* OEM + Product ID */
-	uint8_t	oaddr[4];			/* OEM table pointer */
-	uint8_t	olength[2];			/* OEM table length */
-	uint8_t	entry[2];			/* entry count */
-	uint8_t	apicpa[4];			/* local APIC address */
-	uint8_t	xlength[2];			/* extended table length */
-	uint8_t	xchecksum;			/* extended table checksum */
-	uint8_t	reserved;
+/* filled in by pcmpinit or acpiinit */
+Bus* mpbus;
+Bus* mpbuslast;
+int mpisabus = -1;
+int mpeisabus = -1;
+Apic *mpioapic[MaxAPICNO+1];
+Apic *mpapic[MaxAPICNO+1];
 
-	uint8_t	entries[];
-} PCMP;
-
-typedef struct {
-	char	type[6];
-	int	polarity;			/* default for this bus */
-	int	trigger;			/* default for this bus */
-} Mpbus;
-
-static Mpbus mpbusdef[] = {
-	{ "PCI   ", IPlow, TMlevel, },
-	{ "ISA   ", IPhigh, TMedge, },
-};
-static Mpbus* mpbus[Nbus];
-int mpisabusno = -1;
-
-static void
-mpintrprint(char* s, uint8_t* p)
+int
+mpintrinit(Bus* bus, PCMPintr* intr, int vno, int irq)
 {
-	char buf[128], *b, *e;
-	char format[] = " type %d flags %#ux bus %d IRQ %d APIC %d INTIN %d\n";
-
-	b = buf;
-	e = b + sizeof(buf);
-	b = jehanne_seprint(b, e, "mpparse: intr:");
-	if(s != nil)
-		b = jehanne_seprint(b, e, " %s:", s);
-	jehanne_seprint(b, e, format, p[1], l16get(p+2), p[4], p[5], p[6], p[7]);
-	jehanne_print(buf);
-}
-
-static uint32_t
-mpmkintr(uint8_t* p)
-{
-	uint32_t v;
-	Lapic *apic;
-	IOapic *ioapic;
-	int n, polarity, trigger;
+	int el, po, v;
 
 	/*
-	 * Check valid bus, interrupt input pin polarity
-	 * and trigger mode. If the APIC ID is 0xff it means
-	 * all APICs of this type so those checks for useable
-	 * APIC and valid INTIN must also be done later in
-	 * the appropriate init routine in that case. It's hard
-	 * to imagine routing a signal to all IOAPICs, the
-	 * usual case is routing NMI and ExtINT to all LAPICs.
+	 * Parse an I/O or Local APIC interrupt table entry and
+	 * return the encoded vector.
 	 */
-	if(mpbus[p[4]] == nil){
-		mpintrprint("no source bus", p);
-		return 0;
-	}
-	if(p[6] != 0xff){
-		if(Napic < 256 && p[6] >= Napic){
-			mpintrprint("APIC ID out of range", p);
-			return 0;
-		}
-		switch(p[0]){
-		default:
-			mpintrprint("INTIN botch", p);
-			return 0;
-		case 3:				/* IOINTR */
-			ioapic = ioapiclookup(p[6]);
-			if(ioapic == nil){
-				mpintrprint("unuseable IO APIC", p);
-				return 0;
-			}
-			if(p[7] >= ioapic->nrdt){
-				mpintrprint("IO INTIN out of range", p);
-				return 0;
-			}
-			break;
-		case 4:				/* LINTR */
-			apic = lapiclookup(p[6]);
-			if(apic == nil){
-				mpintrprint("unuseable local APIC", p);
-				return 0;
-			}
-			if(p[7] >= nelem(apic->lvt)){
-				mpintrprint("LOCAL INTIN out of range", p);
-				return 0;
-			}
-			break;
-		}
-	}
-	n = l16get(p+2);
-	if((polarity = (n & 0x03)) == 2 || (trigger = ((n>>2) & 0x03)) == 2){
-		mpintrprint("invalid polarity/trigger", p);
-		return 0;
+	v = vno;
+
+	po = intr->flags & PcmpPOMASK;
+	el = intr->flags & PcmpELMASK;
+
+	switch(intr->intr){
+	default:				/* PcmpINT */
+		v |= ApicFIXED;			/* no-op */
+		break;
+
+	case PcmpNMI:
+		v |= ApicNMI;
+		po = PcmpHIGH;
+		el = PcmpEDGE;
+		break;
+
+	case PcmpSMI:
+		v |= ApicSMI;
+		break;
+
+	case PcmpExtINT:
+		v |= ApicExtINT;
+		/*
+		 * The AMI Goliath doesn't boot successfully with it's LINTR0
+		 * entry which decodes to low+level. The PPro manual says ExtINT
+		 * should be level, whereas the Pentium is edge. Setting the
+		 * Goliath to edge+high seems to cure the problem. Other PPro
+		 * MP tables (e.g. ASUS P/I-P65UP5 have a entry which decodes
+		 * to edge+high, so who knows.
+		 * Perhaps it would be best just to not set an ExtINT entry at
+		 * all, it shouldn't be needed for SMP mode.
+		 */
+		po = PcmpHIGH;
+		el = PcmpEDGE;
+		break;
 	}
 
 	/*
-	 * Create the low half of the vector table entry (LVT or RDT).
-	 * For the NMI, SMI and ExtINT cases, the polarity and trigger
-	 * are fixed (but are not always consistent over IA-32 generations).
-	 * For the INT case, either the polarity/trigger are given or
-	 * it defaults to that of the source bus;
-	 * whether INT is Fixed or Lowest Priority is left until later.
 	 */
-	v = Im;
-	switch(p[1]){
-	default:
-		mpintrprint("invalid type", p);
-		return 0;
-	case 0:					/* INT */
-		switch(polarity){
-		case 0:
-			v |= mpbus[p[4]]->polarity;
-			break;
-		case 1:
-			v |= IPhigh;
-			break;
-		case 3:
-			v |= IPlow;
-			break;
-		}
-		switch(trigger){
-		case 0:
-			v |= mpbus[p[4]]->trigger;
-			break;
-		case 1:
-			v |= TMedge;
-			break;
-		case 3:
-			v |= TMlevel;
-			break;
-		}
-		break;
-	case 1:					/* NMI */
-		v |= TMedge|IPhigh|MTnmi;
-		break;
-	case 2:					/* SMI */
-		v |= TMedge|IPhigh|MTsmi;
-		break;
-	case 3:					/* ExtINT */
-		v |= TMedge|IPhigh|MTei;
-		break;
+	if(bus->type == BusEISA && !po && !el /*&& !(i8259elcr & (1<<irq))*/){
+		po = PcmpHIGH;
+		el = PcmpEDGE;
+	}
+	if(!po)
+		po = bus->po;
+	if(po == PcmpLOW)
+		v |= ApicLOW;
+	else if(po != PcmpHIGH){
+		print("mpintrinit: bad polarity 0x%uX\n", po);
+		return ApicIMASK;
+	}
+
+	if(!el)
+		el = bus->el;
+	if(el == PcmpLEVEL)
+		v |= ApicLEVEL;
+	else if(el != PcmpEDGE){
+		print("mpintrinit: bad trigger 0x%uX\n", el);
+		return ApicIMASK;
 	}
 
 	return v;
 }
 
-static void
-mpparse(PCMP* pcmp)
+uint64_t
+tscticks(uint64_t *hz)
 {
-	uint32_t lo;
-	uint8_t *e, *p;
-	int i, n, bustype;
-	Lapic *apic;
+	if(hz != nil)
+		*hz = m->cpuhz;
 
-	p = pcmp->entries;
-	e = ((uint8_t*)pcmp)+l16get(pcmp->length);
-	while(p < e) switch(*p){
-	default:
-		jehanne_print("mpparse: unknown PCMP type %d (e-p %#ld)\n", *p, e-p);
-		for(i = 0; p < e; i++){
-			if(i && ((i & 0x0f) == 0))
-				jehanne_print("\n");
-			jehanne_print(" %#2.2ux", *p);
-			p++;
-		}
-		jehanne_print("\n");
-		break;
-	case 0:					/* processor */
-		/*
-		 * Initialise the APIC if it is enabled (p[3] & 0x01).
-		 * p[1] is the APIC ID, the memory mapped address comes
-		 * from the PCMP structure as the addess is local to the
-		 * CPU and identical for all. Indicate whether this is
-		 * the bootstrap processor (p[3] & 0x02).
-		 */
-		DBG("mpparse: APIC %d pa %#ux useable %d\n",
-			p[1], l32get(pcmp->apicpa), p[3] & 0x01);
-		if(p[3] & 0x01)
-			lapicinit(p[1], l32get(pcmp->apicpa), p[3] & 0x02);
-		p += 20;
-		break;
-	case 1:					/* bus */
-		DBG("mpparse: bus: %d type %6.6s\n", p[1], (char*)p+2);
-		if(mpbus[p[1]] != nil){
-			jehanne_print("mpparse: bus %d already allocated\n", p[1]);
-			p += 8;
-			break;
-		}
-		for(i = 0; i < nelem(mpbusdef); i++){
-			if(jehanne_memcmp(p+2, mpbusdef[i].type, 6) != 0)
-				continue;
-			if(jehanne_memcmp(p+2, "ISA   ", 6) == 0){
-				if(mpisabusno != -1){
-					jehanne_print("mpparse: bus %d already have ISA bus %d\n",
-						p[1], mpisabusno);
-					continue;
-				}
-				mpisabusno = p[1];
-			}
-			mpbus[p[1]] = &mpbusdef[i];
-			break;
-		}
-		if(mpbus[p[1]] == nil)
-			jehanne_print("mpparse: bus %d type %6.6s unknown\n",
-				p[1], (char*)p+2);
+	cycles(&m->tscticks);	/* Uses the rdtsc instruction */
+	return m->tscticks;
+}
 
-		p += 8;
-		break;
-	case 2:					/* IOAPIC */
-		/*
-		 * Initialise the IOAPIC if it is enabled (p[3] & 0x01).
-		 * p[1] is the APIC ID, p[4-7] is the memory mapped address.
-		 */
-		DBG("mpparse: IOAPIC %d pa %#ux useable %d\n",
-			p[1], l32get(p+4), p[3] & 0x01);
-		if(p[3] & 0x01)
-			ioapicinit(p[1], -1, l32get(p+4));
+void
+syncclock(void)
+{
+	uint64_t x;
 
-		p += 8;
-		break;
-	case 3:					/* IOINTR */
-		/*
-		 * p[1] is the interrupt type;
-		 * p[2-3] contains the polarity and trigger mode;
-		 * p[4] is the source bus;
-		 * p[5] is the IRQ on the source bus;
-		 * p[6] is the destination APIC;
-		 * p[7] is the INITIN pin on the destination APIC.
-		 */
-		if(p[6] == 0xff){
-			mpintrprint("routed to all IOAPICs", p);
-			p += 8;
-			break;
-		}
-		if((lo = mpmkintr(p)) == 0){
-			p += 8;
-			break;
-		}
-		if(DBGFLG)
-			mpintrprint(nil, p);
+	if(arch->fastclock != tscticks)
+		return;
 
-		/*
-		 * Always present the device number in the style
-		 * of a PCI Interrupt Assignment Entry. For the ISA
-		 * bus the IRQ is the device number but unencoded.
-		 * May need to handle other buses here in the future
-		 * (but unlikely).
-		 */
-		bustype = -1;
-		if(jehanne_memcmp(mpbus[p[4]]->type, "PCI   ", 6) == 0)
-			bustype = BusPCI;	/* had devno = p[5]<<2 */
-		else if(jehanne_memcmp(mpbus[p[4]]->type, "ISA   ", 6) == 0)
-			bustype = BusISA;
-		if(bustype != -1)
-			ioapicintrinit(bustype, p[4], p[6], p[7], p[5], lo);
-
-		p += 8;
-		break;
-	case 4:					/* LINTR */
-		/*
-		 * Format is the same as IOINTR above.
-		 */
-		if((lo = mpmkintr(p)) == 0){
-			p += 8;
-			break;
-		}
-		if(DBGFLG)
-			mpintrprint(nil, p);
-
-		/*
-		 * Everything was checked in mpmkintr above.
-		 */
-		if(p[6] == 0xff){
-			for(i = 0; i < Napic; i++){
-				apic = lapiclookup(i);
-				if(apic != nil)
-					apic->lvt[p[7]] = lo;
-			}
-		}
-		else{
-			apic = lapiclookup(p[6]);
-			if(apic != nil)
-				apic->lvt[p[7]] = lo;
-		}
-		p += 8;
-		break;
-	}
-
-	/*
-	 * There's nothing of real interest in the extended table,
-	 * should just move along, but check it for consistency.
-	 */
-	p = e;
-	e = p + l16get(pcmp->xlength);
-	while(p < e) switch(*p){
-	default:
-		n = p[1];
-		jehanne_print("mpparse: unknown extended entry %d length %d\n", *p, n);
-		for(i = 0; i < n; i++){
-			if(i && ((i & 0x0f) == 0))
-				jehanne_print("\n");
-			jehanne_print(" %#2.2ux", *p);
-			p++;
-		}
-		jehanne_print("\n");
-		break;
-	case 128:
-		DBG("address space mapping\n");
-		DBG(" bus %d type %d base %#llux length %#llux\n",
-			p[2], p[3], l64get(p+4), l64get(p+12));
-		p += p[1];
-		break;
-	case 129:
-		DBG("bus hierarchy descriptor\n");
-		DBG(" bus %d sd %d parent bus %d\n",
-			p[2], p[3], p[4]);
-		p += p[1];
-		break;
-	case 130:
-		DBG("compatibility bus address space modifier\n");
-		DBG(" bus %d pr %d range list %d\n",
-			p[2], p[3], l32get(p+4));
-		p += p[1];
-		break;
+	if(m->machno == 0){
+		wrmsr(0x10, 0);
+		m->tscticks = 0;
+	} else {
+		x = MACHP(0)->tscticks;
+		while(x == MACHP(0)->tscticks)
+			;
+		wrmsr(0x10, MACHP(0)->tscticks);
+		cycles(&m->tscticks);
 	}
 }
 
 void
-mpsinit(void)
+mpinit(void)
 {
-	uint8_t *p;
-	int i, n;
-	_MP_ *mp;
-	PCMP *pcmp;
+	int ncpu, i;
+	Apic *apic;
+	char *cp;
 
-	if((mp = sigsearch("_MP_")) == nil)
-		return;
-	if(DBGFLG){
-		DBG("_MP_ @ %#p, addr %#ux length %ud rev %d",
-			mp, l32get(mp->addr), mp->length, mp->revision);
-		for(i = 0; i < sizeof(mp->feature); i++)
-			DBG(" %2.2#ux", mp->feature[i]);
-		DBG("\n");
-	}
-	if(mp->revision != 1 && mp->revision != 4)
-		return;
-	if(checksum(mp, mp->length*16) != 0)
-		return;
+	i8259init();
+	syncclock();
 
-	if((pcmp = vmap(l32get(mp->addr), sizeof(PCMP))) == nil)
-		return;
-	if(pcmp->revision != 1 && pcmp->revision != 4){
-		vunmap(pcmp, sizeof(PCMP));
-		return;
-	}
-	n = l16get(pcmp->length) + l16get(pcmp->xlength);
-	vunmap(pcmp, sizeof(PCMP));
-	if((pcmp = vmap(l32get(mp->addr), n)) == nil)
-		return;
-	if(checksum(pcmp, l16get(pcmp->length)) != 0){
-		vunmap(pcmp, n);
-		return;
-	}
-	if(DBGFLG){
-		DBG("PCMP @ %#p length %#ux revision %d\n",
-			pcmp, l16get(pcmp->length), pcmp->revision);
-		DBG(" %20.20s oaddr %#ux olength %#ux\n",
-			(char*)pcmp->string, l32get(pcmp->oaddr),
-			l16get(pcmp->olength));
-		DBG(" entry %d apicpa %#ux\n",
-			l16get(pcmp->entry), l32get(pcmp->apicpa));
+	if(getconf("*apicdebug")){
+		Bus *b;
+		Aintr *ai;
+		PCMPintr *pi;
 
-		DBG(" xlength %#ux xchecksum %#ux\n",
-			l16get(pcmp->xlength), pcmp->xchecksum);
+		for(i=0; i<=MaxAPICNO; i++){
+			if(apic = mpapic[i])
+				print("LAPIC%d: pa=%lux va=%#p flags=%x\n",
+					i, apic->paddr, apic->addr, apic->flags);
+			if(apic = mpioapic[i])
+				print("IOAPIC%d: pa=%lux va=%#p flags=%x gsibase=%d mre=%d\n",
+					i, apic->paddr, apic->addr, apic->flags, apic->gsibase, apic->mre);
+		}
+		for(b = mpbus; b; b = b->next){
+			print("BUS%d type=%d flags=%x\n", b->busno, b->type, b->po|b->el);
+			for(ai = b->aintr; ai; ai = ai->next){
+				if(pi = ai->intr)
+					print("\ttype=%d irq=%d (%d [%c]) apic=%d intin=%d flags=%x\n",
+						pi->type, pi->irq, pi->irq>>2, "ABCD"[pi->irq&3],
+						pi->apicno, pi->intin, pi->flags);
+			}
+		}
 	}
-	if(pcmp->xchecksum != 0){
-		p = ((uint8_t*)pcmp) + l16get(pcmp->length);
-		i = checksum(p, l16get(pcmp->xlength));
-		if(((i+pcmp->xchecksum) & 0xff) != 0){
-			jehanne_print("extended table checksums to %#ux\n", i);
-			vunmap(pcmp, n);
-			return;
+
+	apic = nil;
+	for(i=0; i<=MaxAPICNO; i++){
+		if(mpapic[i] == nil)
+			continue;
+		if(mpapic[i]->flags & PcmpBP){
+			apic = mpapic[i];
+			break;
+		}
+	}
+
+	if(apic == nil){
+		panic("mpinit: no bootstrap processor");
+		return;
+	}
+	apic->online = 1;
+
+	lapicinit(apic);
+
+	/*
+	 * These interrupts are local to the processor
+	 * and do not appear in the I/O APIC so it is OK
+	 * to set them now.
+	 */
+	intrenable(IrqTIMER, lapicclock, 0, BUSUNKNOWN, "clock");
+	intrenable(IrqERROR, lapicerror, 0, BUSUNKNOWN, "lapicerror");
+	intrenable(IrqSPURIOUS, lapicspurious, 0, BUSUNKNOWN, "lapicspurious");
+	lapiconline();
+
+	/*
+	 * Initialise the application processors.
+	 */
+	if(cp = getconf("*ncpu")){
+		ncpu = strtol(cp, 0, 0);
+		if(ncpu < 1)
+			ncpu = 1;
+		else if(ncpu > MACHMAX)
+			ncpu = MACHMAX;
+	}
+	else
+		ncpu = MACHMAX;
+	memmove((void*)APBOOTSTRAP, sipihandler, sizeof(sipihandler));
+	for(i=0; i<nelem(mpapic); i++){
+		if((apic = mpapic[i]) == nil)
+			continue;
+		if(apic->machno >= MACHMAX)
+			continue;
+		if(ncpu <= 1)
+			break;
+		if((apic->flags & (PcmpBP|PcmpEN)) == PcmpEN){
+			mpstartap(apic);
+			sys->nmach++;
+			ncpu--;
 		}
 	}
 
 	/*
-	 * Parse the PCMP table and set up the datastructures
-	 * for later interrupt enabling and application processor
-	 * startup.
+	 *  we don't really know the number of processors till
+	 *  here.
+	 *
+	 *  set sys->copymode here if nmach > 1.
+	 *  Should look for an ExtINT line and enable it.
 	 */
-	mpparse(pcmp);
-
-	lapicdump();
-	iordtdump();
+	if(X86FAMILY(m->cpuidax) == 3 || sys->nmach > 1)
+		sys->copymode = 1;
+}
+
+static int
+mpintrcpu(void)
+{
+	static Lock physidlock;
+	static int physid;
+	int i;
+
+	/*
+	 * The bulk of this code was written ~1995, when there was
+	 * one architecture and one generation of hardware, the number
+	 * of CPUs was up to 4(8) and the choices for interrupt routing
+	 * were physical, or flat logical (optionally with lowest
+	 * priority interrupt). Logical mode hasn't scaled well with
+	 * the increasing number of packages/cores/threads, so the
+	 * fall-back is to physical mode, which works across all processor
+	 * generations, both AMD and Intel, using the APIC and xAPIC.
+	 *
+	 * Interrupt routing policy can be set here.
+	 * Currently, just assign each interrupt to a different CPU on
+	 * a round-robin basis. Some idea of the packages/cores/thread
+	 * topology would be useful here, e.g. to not assign interrupts
+	 * to more than one thread in a core, or to use a "noise" core.
+	 * But, as usual, Intel make that an onerous task.
+	 */
+	lock(&physidlock);
+	for(;;){
+		i = physid++;
+		if(physid >= nelem(mpapic))
+			physid = 0;
+		if(mpapic[i] == nil)
+			continue;
+		if(mpapic[i]->online)
+			break;
+	}
+	unlock(&physidlock);
+
+	return mpapic[i]->apicno;
+}
+
+/*
+ * With the APIC a unique vector can be assigned to each
+ * request to enable an interrupt. There are two reasons this
+ * is a good idea:
+ * 1) to prevent lost interrupts, no more than 2 interrupts
+ *    should be assigned per block of 16 vectors (there is an
+ *    in-service entry and a holding entry for each priority
+ *    level and there is one priority level per block of 16
+ *    interrupts).
+ * 2) each input pin on the IOAPIC will receive a different
+ *    vector regardless of whether the devices on that pin use
+ *    the same IRQ as devices on another pin.
+ */
+static int
+allocvector(void)
+{
+	static int round = 0, num = 0;
+	static Lock l;
+	int vno;
+
+	lock(&l);
+	vno = VectorAPIC + num;
+	if(vno < MaxVectorAPIC-7)
+		num += 8;
+	else
+		num = ++round % 8;
+	unlock(&l);
+	return vno;
+}
+
+static int
+mpintrenablex(Vctl* v, int tbdf)
+{
+	Bus *bus;
+	Aintr *aintr;
+	Apic *apic;
+	Pcidev *pcidev;
+	int bno, dno, pin, hi, irq, lo, n, type, vno;
+
+	type = BUSTYPE(tbdf);
+	bno = BUSBNO(tbdf);
+	dno = BUSDNO(tbdf);
+
+	pin = 0;
+	pcidev = nil;
+	if(type == BusPCI){
+		if(pcidev = pcimatchtbdf(tbdf))
+			pin = pcicfgr8(pcidev, PciINTP);
+	} else if(type == BusISA)
+		bno = mpisabus;
+
+Findbus:
+	for(bus = mpbus; bus != nil; bus = bus->next){
+		if(bus->type != type)
+			continue;
+		if(bus->busno == bno)
+			break;
+	}
+
+	if(bus == nil){
+		/*
+		 * if the PCI device is behind a PCI-PCI bridge thats not described
+		 * by the MP or ACPI tables then walk up the bus translating interrupt
+		 * pin to parent bus.
+		 */
+		if(pcidev && pcidev->parent && pin > 0){
+			pin = ((dno+(pin-1))%4)+1;
+			pcidev = pcidev->parent;
+			bno = BUSBNO(pcidev->tbdf);
+			dno = BUSDNO(pcidev->tbdf);
+			goto Findbus;
+		}
+		print("mpintrenable: can't find bus type %d, number %d\n", type, bno);
+		return -1;
+	}
+
+	/*
+	 * For PCI devices the interrupt pin (INT[ABCD]) and device
+	 * number are encoded into the entry irq field, so create something
+	 * to match on.
+	 */
+	if(bus->type == BusPCI){
+		if(pin > 0)
+			irq = (dno<<2)|(pin-1);
+		else
+			irq = -1;
+	}
+	else
+		irq = v->irq;
+
+	/*
+	 * Find a matching interrupt entry from the list of interrupts
+	 * attached to this bus.
+	 */
+	for(aintr = bus->aintr; aintr; aintr = aintr->next){
+		if(aintr->intr->irq != irq)
+			continue;
+		if(0){
+			PCMPintr* p = aintr->intr;
+			print("mpintrenablex: bus %d intin %d irq %d\n",
+				p->busno, p->intin, p->irq);
+		}
+		/*
+		 * Check if already enabled. Multifunction devices may share
+		 * INT[A-D]# so, if already enabled, check the polarity matches
+		 * and the trigger is level.
+		 *
+		 * Should check the devices differ only in the function number,
+		 * but that can wait for the planned enable/disable rewrite.
+		 * The RDT read here is safe for now as currently interrupts
+		 * are never disabled once enabled.
+		 */
+		apic = aintr->apic;
+		ioapicrdtr(apic, aintr->intr->intin, 0, &lo);
+		if(!(lo & ApicIMASK)){
+			vno = lo & 0xFF;
+			if(0) print("%s vector %d (!imask)\n", v->name, vno);
+			n = mpintrinit(bus, aintr->intr, vno, v->irq);
+			n |= ApicPHYSICAL;		/* no-op */
+			lo &= ~(ApicRemoteIRR|ApicDELIVS);
+			if(n != lo){
+				print("mpintrenable: multiple botch irq %d, tbdf %uX, lo %8.8uX, n %8.8uX\n",
+					v->irq, tbdf, lo, n);
+				return -1;
+			}
+			v->isr = lapicisr;
+			v->eoi = lapiceoi;
+			return vno;
+		}
+
+		vno = allocvector();
+		hi = mpintrcpu()<<24;
+		lo = mpintrinit(bus, aintr->intr, vno, v->irq);
+		lo |= ApicPHYSICAL;			/* no-op */
+		if(lo & ApicIMASK){
+			print("mpintrenable: disabled irq %d, tbdf %uX, lo %8.8uX, hi %8.8uX\n",
+				v->irq, tbdf, lo, hi);
+			return -1;
+		}
+		if((apic->flags & PcmpEN) && apic->type == PcmpIOAPIC)
+			ioapicrdtw(apic, aintr->intr->intin, hi, lo);
+
+		v->isr = lapicisr;
+		v->eoi = lapiceoi;
+		return vno;
+	}
+
+	return -1;
+}
+
+enum {
+	MSICtrl = 0x02, /* message control register (16 bit) */
+	MSIAddr = 0x04, /* message address register (64 bit) */
+	MSIData32 = 0x08, /* message data register for 32 bit MSI (16 bit) */
+	MSIData64 = 0x0C, /* message data register for 64 bit MSI (16 bit) */
+};
+
+enum {
+	HTMSIMapping	= 0xA8,
+	HTMSIFlags	= 0x02,
+	HTMSIFlagsEn	= 0x01,
+};
+
+static int
+htmsicapenable(Pcidev *p)
+{
+	return -1;
+#if 0
+	int cap, flags;
+
+	if((cap = pcihtcap(p, HTMSIMapping)) <= 0)
+		return -1;
+	flags = pcicfgr8(p, cap + HTMSIFlags);
+	if((flags & HTMSIFlagsEn) == 0)
+		pcicfgw8(p, cap + HTMSIFlags, flags | HTMSIFlagsEn);
+	return 0;
+#endif
+}
+
+static int
+htmsienable(Pcidev *pdev)
+{
+	Pcidev *p;
+
+	p = nil;
+	while((p = pcimatch(p, 0x1022, 0)) != nil)
+		if(p->did == 0x1103 || p->did == 0x1203)
+			break;
+
+	if(p == nil)
+		return 0;	/* not hypertransport platform */
+
+	p = nil;
+	while((p = pcimatch(p, 0x10de, 0)) != nil){
+		switch(p->did){
+		case 0x02f0:	/* NVIDIA NFORCE C51 MEMC0 */
+		case 0x02f1:	/* NVIDIA NFORCE C51 MEMC1 */
+		case 0x02f2:	/* NVIDIA NFORCE C51 MEMC2 */
+		case 0x02f3:	/* NVIDIA NFORCE C51 MEMC3 */
+		case 0x02f4:	/* NVIDIA NFORCE C51 MEMC4 */
+		case 0x02f5:	/* NVIDIA NFORCE C51 MEMC5 */
+		case 0x02f6:	/* NVIDIA NFORCE C51 MEMC6 */
+		case 0x02f7:	/* NVIDIA NFORCE C51 MEMC7 */
+		case 0x0369:	/* NVIDIA NFORCE MCP55 MEMC */
+			htmsicapenable(p);
+			break;
+		}
+	}
+
+	if(htmsicapenable(pdev) == 0)
+		return 0;
+
+	for(p = pdev->parent; p != nil; p = p->parent)
+		if(htmsicapenable(p) == 0)
+			return 0;
+
+	return -1;
+}
+
+static int
+msiintrenable(Vctl *v)
+{
+	int tbdf, vno, cap, cpu, ok64;
+	Pcidev *pci;
+
+	if(getconf("*nomsi") != nil)
+		return -1;
+	tbdf = v->tbdf;
+	if(tbdf == BUSUNKNOWN || BUSTYPE(tbdf) != BusPCI)
+		return -1;
+	pci = pcimatchtbdf(tbdf);
+	if(pci == nil) {
+		print("msiintrenable: could not find Pcidev for tbdf %uX\n", tbdf);
+		return -1;
+	}
+	if(htmsienable(pci) < 0)
+		return -1;
+	cap = pcicap(pci, PciCapMSI);
+	if(cap < 0)
+		return -1;
+	vno = allocvector();
+	cpu = mpintrcpu();
+	ok64 = (pcicfgr16(pci, cap + MSICtrl) & (1<<7)) != 0;
+	pcicfgw32(pci, cap + MSIAddr, (0xFEE << 20) | (cpu << 12));
+	if(ok64) pcicfgw32(pci, cap + MSIAddr + 4, 0);
+	pcicfgw16(pci, cap + (ok64 ? MSIData64 : MSIData32), vno | (1<<14));
+	pcicfgw16(pci, cap + MSICtrl, 1);
+	v->isr = lapicisr;
+	v->eoi = lapiceoi;
+	return vno;
+}
+
+int
+mpintrenable(Vctl* v)
+{
+	int irq, tbdf, vno;
+
+	vno = msiintrenable(v);
+	if(vno != -1)
+		return vno;
+
+	/*
+	 * If the bus is known, try it.
+	 * BUSUNKNOWN is given both by [E]ISA devices and by
+	 * interrupts local to the processor (local APIC, coprocessor
+	 * breakpoint and page-fault).
+	 */
+	tbdf = v->tbdf;
+	if(tbdf != BUSUNKNOWN && (vno = mpintrenablex(v, tbdf)) != -1)
+		return vno;
+
+	irq = v->irq;
+	if(irq >= IrqLINT0 && irq <= MaxIrqLAPIC){
+		if(irq != IrqSPURIOUS)
+			v->isr = lapiceoi;
+		return VectorPIC+irq;
+	}
+	if(irq < 0 || irq > MaxIrqPIC){
+		print("mpintrenable: irq %d out of range\n", irq);
+		return -1;
+	}
+
+	/*
+	 * Either didn't find it or have to try the default buses
+	 * (ISA and EISA). This hack is due to either over-zealousness
+	 * or laziness on the part of some manufacturers.
+	 *
+	 * The MP configuration table on some older systems
+	 * (e.g. ASUS PCI/E-P54NP4) has an entry for the EISA bus
+	 * but none for ISA. It also has the interrupt type and
+	 * polarity set to 'default for this bus' which wouldn't
+	 * be compatible with ISA.
+	 */
+	if(mpeisabus != -1){
+		vno = mpintrenablex(v, MKBUS(BusEISA, 0, 0, 0));
+		if(vno != -1)
+			return vno;
+	}
+	if(mpisabus != -1){
+		vno = mpintrenablex(v, MKBUS(BusISA, 0, 0, 0));
+		if(vno != -1)
+			return vno;
+	}
+	print("mpintrenable: out of choices eisa %d isa %d tbdf %uX irq %d\n",
+		mpeisabus, mpisabus, v->tbdf, v->irq);
+	return -1;
+}
+
+void
+mpshutdown(void)
+{
+	/*
+	 * Park application processors.
+	 */
+	if(m->machno != 0){
+		splhi();
+		arch->introff();
+		for(;;) idle();
+	}
+	delay(1000);
+	splhi();
+
+	/*
+	 * INIT all excluding self.
+	 */
+	lapicicrw(0, 0x000C0000|ApicINIT);
+
+	pcireset();
 }
diff --git a/sys/src/kern/amd64/mp.h b/sys/src/kern/amd64/mp.h
new file mode 100644
index 0000000..4f10cec
--- /dev/null
+++ b/sys/src/kern/amd64/mp.h
@@ -0,0 +1,261 @@
+/*
+ * MultiProcessor Specification Version 1.[14].
+ */
+typedef struct {			/* floating pointer */
+	uint8_t	signature[4];		/* "_MP_" */
+	int32_t	physaddr;		/* physical address of MP configuration table */
+	uint8_t	length;			/* 1 */
+	uint8_t	specrev;		/* [14] */
+	uint8_t	checksum;		/* all bytes must add up to 0 */
+	uint8_t	type;			/* MP system configuration type */
+	uint8_t	imcrp;
+	uint8_t	reserved[3];
+} _MP_;
+
+#define _MP_sz			(4+4+1+1+1+1+1+3)
+
+typedef struct {			/* configuration table header */
+	uint8_t		signature[4];		/* "PCMP" */
+	uint16_t	length;			/* total table length */
+	uint8_t		version;		/* [14] */
+	uint8_t		checksum;		/* all bytes must add up to 0 */
+	uint8_t		product[20];		/* product id */
+	uint32_t	oemtable;		/* OEM table pointer */
+	uint16_t	oemlength;		/* OEM table length */
+	uint16_t	entry;			/* entry count */
+	uint32_t	lapicbase;		/* address of local APIC */
+	uint16_t	xlength;		/* extended table length */
+	uint8_t		xchecksum;		/* extended table checksum */
+	uint8_t		reserved;
+} PCMP;
+
+#define PCMPsz			(4+2+1+1+20+4+2+2+4+2+1+1)
+
+typedef struct {			/* processor table entry */
+	uint8_t		type;			/* entry type (0) */
+	uint8_t		apicno;			/* local APIC id */
+	uint8_t		version;		/* local APIC verison */
+	uint8_t		flags;			/* CPU flags */
+	uint8_t		signature[4];		/* CPU signature */
+	uint32_t	feature;		/* feature flags from CPUID instruction */
+	uint8_t		reserved[8];
+} PCMPprocessor;
+
+#define PCMPprocessorsz		(1+1+1+1+4+4+8)
+
+typedef struct {			/* bus table entry */
+	uint8_t	type;			/* entry type (1) */
+	uint8_t	busno;			/* bus id */
+	char	string[6];		/* bus type string */
+} PCMPbus;
+
+#define PCMPbussz		(1+1+6)
+
+typedef struct {			/* I/O APIC table entry */
+	uint8_t	type;			/* entry type (2) */
+	uint8_t	apicno;			/* I/O APIC id */
+	uint8_t	version;		/* I/O APIC version */
+	uint8_t	flags;			/* I/O APIC flags */
+	uint32_t	addr;			/* I/O APIC address */
+} PCMPioapic;
+
+#define PCMPioapicsz		(1+1+1+1+4)
+
+typedef struct {			/* interrupt table entry */
+	uint8_t		type;			/* entry type ([34]) */
+	uint8_t		intr;			/* interrupt type */
+	uint16_t	flags;			/* interrupt flag */
+	uint8_t		busno;			/* source bus id */
+	uint8_t		irq;			/* source bus irq */
+	uint8_t		apicno;			/* destination APIC id */
+	uint8_t		intin;			/* destination APIC [L]INTIN# */
+} PCMPintr;
+
+#define PCMPintrsz		(1+1+2+1+1+1+1)
+
+typedef struct {			/* system address space mapping entry */
+	uint8_t		type;			/* entry type (128) */
+	uint8_t		length;			/* of this entry (20) */
+	uint8_t		busno;			/* bus id */
+	uint8_t		addrtype;
+	uint32_t	addrbase[2];
+	uint32_t	addrlength[2];
+} PCMPsasm;
+
+#define PCMPsasmsz		(1+1+1+1+8+8)
+
+typedef struct {			/* bus hierarchy descriptor entry */
+	uint8_t	type;			/* entry type (129) */
+	uint8_t	length;			/* of this entry (8) */
+	uint8_t	busno;			/* bus id */
+	uint8_t	info;			/* bus info */
+	uint8_t	parent;			/* parent bus */
+	uint8_t	reserved[3];
+} PCMPhierarchy;
+
+#define PCMPhirarchysz		(1+1+1+1+1+3)
+
+typedef struct {			/* compatibility bus address space modifier entry */
+	uint8_t		type;			/* entry type (130) */
+	uint8_t		length;			/* of this entry (8) */
+	uint8_t		busno;			/* bus id */
+	uint8_t		modifier;		/* address modifier */
+	uint32_t	range;			/* predefined range list */
+} PCMPcbasm;
+
+#define PCMPcbasmsz		(1+1+1+1+4)
+
+enum {					/* table entry types */
+	PcmpPROCESSOR	= 0x00,		/* one entry per processor */
+	PcmpBUS		= 0x01,		/* one entry per bus */
+	PcmpIOAPIC	= 0x02,		/* one entry per I/O APIC */
+	PcmpIOINTR	= 0x03,		/* one entry per bus interrupt source */
+	PcmpLINTR	= 0x04,		/* one entry per system interrupt source */
+
+	PcmpSASM	= 0x80,
+	PcmpHIERARCHY	= 0x81,
+	PcmpCBASM	= 0x82,
+
+					/* PCMPprocessor and PCMPioapic flags */
+	PcmpEN		= 0x01,		/* enabled */
+	PcmpBP		= 0x02,		/* bootstrap processor */
+
+					/* PCMPiointr and PCMPlintr flags */
+	PcmpPOMASK	= 0x03,		/* polarity conforms to specifications of bus */
+	PcmpHIGH	= 0x01,		/* active high */
+	PcmpLOW		= 0x03,		/* active low */
+	PcmpELMASK	= 0x0C,		/* trigger mode of APIC input signals */
+	PcmpEDGE	= 0x04,		/* edge-triggered */
+	PcmpLEVEL	= 0x0C,		/* level-triggered */
+
+					/* PCMPiointr and PCMPlintr interrupt type */
+	PcmpINT		= 0x00,		/* vectored interrupt from APIC Rdt */
+	PcmpNMI		= 0x01,		/* non-maskable interrupt */
+	PcmpSMI		= 0x02,		/* system management interrupt */
+	PcmpExtINT	= 0x03,		/* vectored interrupt from external PIC */
+
+					/* PCMPsasm addrtype */
+	PcmpIOADDR	= 0x00,		/* I/O address */
+	PcmpMADDR	= 0x01,		/* memory address */
+	PcmpPADDR	= 0x02,		/* prefetch address */
+
+					/* PCMPhierarchy info */
+	PcmpSD		= 0x01,		/* subtractive decode bus */
+
+					/* PCMPcbasm modifier */
+	PcmpPR		= 0x01,		/* predefined range list */
+};
+
+/*
+ * Condensed form of the MP Configuration Table.
+ * This is created during a single pass through the MP Configuration
+ * table.
+ */
+typedef struct Aintr Aintr;
+typedef struct Bus Bus;
+typedef struct Apic Apic;
+
+typedef struct Bus {
+	uint8_t	type;
+	uint8_t	busno;
+	uint8_t	po;
+	uint8_t	el;
+
+	Aintr*	aintr;			/* interrupts tied to this bus */
+	Bus*	next;
+} Bus;
+
+typedef struct Aintr {
+	PCMPintr* intr;
+	Apic*	apic;
+	Aintr*	next;
+} Aintr;
+
+typedef struct Apic {
+	int		type;
+	int		apicno;
+	uint32_t*	addr;			/* register base address */
+	uint32_t	paddr;
+	int		flags;			/* PcmpBP|PcmpEN */
+
+	Lock;					/* I/O APIC: register access */
+	int		mre;			/* I/O APIC: maximum redirection entry */
+	int		gsibase;		/* I/O APIC: global system interrupt base (acpi) */
+
+	int		lintr[2];		/* Local APIC */
+	int		machno;
+
+	int		online;
+} Apic;
+
+enum {
+	MaxAPICNO	= 254,		/* 255 is physical broadcast */
+};
+
+enum {					/* I/O APIC registers */
+	IoapicID	= 0x00,		/* ID */
+	IoapicVER	= 0x01,		/* version */
+	IoapicARB	= 0x02,		/* arbitration ID */
+	IoapicRDT	= 0x10,		/* redirection table */
+};
+
+/*
+ * Common bits for
+ *	I/O APIC Redirection Table Entry;
+ *	Local APIC Local Interrupt Vector Table;
+ *	Local APIC Inter-Processor Interrupt;
+ *	Local APIC Timer Vector Table.
+ */
+enum {
+	ApicFIXED	= 0x00000000,	/* [10:8] Delivery Mode */
+	ApicLOWEST	= 0x00000100,	/* Lowest priority */
+	ApicSMI		= 0x00000200,	/* System Management Interrupt */
+	ApicRR		= 0x00000300,	/* Remote Read */
+	ApicNMI		= 0x00000400,
+	ApicINIT	= 0x00000500,	/* INIT/RESET */
+	ApicSTARTUP	= 0x00000600,	/* Startup IPI */
+	ApicExtINT	= 0x00000700,
+
+	ApicPHYSICAL	= 0x00000000,	/* [11] Destination Mode (RW) */
+	ApicLOGICAL	= 0x00000800,
+
+	ApicDELIVS	= 0x00001000,	/* [12] Delivery Status (RO) */
+	ApicHIGH	= 0x00000000,	/* [13] Interrupt Input Pin Polarity (RW) */
+	ApicLOW		= 0x00002000,
+	ApicRemoteIRR	= 0x00004000,	/* [14] Remote IRR (RO) */
+	ApicEDGE	= 0x00000000,	/* [15] Trigger Mode (RW) */
+	ApicLEVEL	= 0x00008000,
+	ApicIMASK	= 0x00010000,	/* [16] Interrupt Mask */
+};
+
+extern void ioapicinit(Apic*, int);
+extern void ioapicrdtr(Apic*, int, int*, int*);
+extern void ioapicrdtw(Apic*, int, int, int);
+
+extern void lapicclock(Ureg*, void*);
+extern int lapiceoi(int);
+extern void lapicerror(Ureg*, void*);
+extern void lapicicrw(uint32_t, uint32_t);
+extern void lapicinit(Apic*);
+extern void lapicintroff(void);
+extern void lapicintron(void);
+extern int lapicisr(int);
+extern void lapicnmidisable(void);
+extern void lapicnmienable(void);
+extern void lapiconline(void);
+extern void lapicspurious(Ureg*, void*);
+extern void lapicstartap(Apic*, uintptr_t);
+extern void lapictimerset(uint64_t);
+
+extern int mpintrinit(Bus*, PCMPintr*, int, int);
+extern void mpinit(void);
+extern int mpintrenable(Vctl*);
+extern void mpshutdown(void);
+extern void mpstartap(Apic*);
+
+extern Bus* mpbus;
+extern Bus* mpbuslast;
+extern int mpisabus;
+extern int mpeisabus;
+extern Apic *mpioapic[];
+extern Apic *mpapic[];
diff --git a/sys/src/kern/amd64/mtrr.c b/sys/src/kern/amd64/mtrr.c
new file mode 100644
index 0000000..243cea0
--- /dev/null
+++ b/sys/src/kern/amd64/mtrr.c
@@ -0,0 +1,390 @@
+/*
+ * memory-type region registers.
+ *
+ * due to the possibility of extended addresses (for PAE)
+ * as large as 36 bits coming from the e820 memory map and the like,
+ * we'll use vlongs to hold addresses and lengths, even though we don't
+ * implement PAE in Plan 9.
+ */
+#include "u.h"
+#include "../port/lib.h"
+#include "mem.h"
+#include "dat.h"
+#include "fns.h"
+#include "io.h"
+
+enum {
+	/*
+	 * MTRR Physical base/mask are indexed by
+	 *	MTRRPhys{Base|Mask}N = MTRRPhys{Base|Mask}0 + 2*N
+	 */
+	MTRRPhysBase0 = 0x200,
+	MTRRPhysMask0 = 0x201,
+	MTRRDefaultType = 0x2FF,
+	MTRRCap = 0xFE,
+	Nmtrr = 8,
+
+	/* cpuid extended function codes */
+	Exthighfunc = 1ul << 31,
+	Extprocsigamd,
+	Extprocname0,
+	Extprocname1,
+	Extprocname2,
+	Exttlbl1,
+	Extl2,
+	Extapm,
+	Extaddrsz,
+
+	Paerange = 1LL << 36,
+};
+
+enum {
+	CR4PageGlobalEnable	= 1 << 7,
+	CR0CacheDisable		= 1 << 30,
+};
+
+enum {
+	Uncacheable	= 0,
+	Writecomb	= 1,
+	Unknown1	= 2,
+	Unknown2	= 3,
+	Writethru	= 4,
+	Writeprot	= 5,
+	Writeback	= 6,
+};
+
+enum {
+	Capvcnt = 0xff,		/* mask: # of variable-range MTRRs we have */
+	Capwc	= 1<<8,		/* flag: have write combining? */
+	Capfix	= 1<<10,	/* flag: have fixed MTRRs? */
+	Deftype = 0xff,		/* default MTRR type */
+	Deffixena = 1<<10,	/* fixed-range MTRR enable */
+	Defena	= 1<<11,	/* MTRR enable */
+};
+
+typedef struct Mtrreg Mtrreg;
+typedef struct Mtrrop Mtrrop;
+
+struct Mtrreg {
+	long	base;
+	long	mask;
+};
+
+static char *types[] = {
+[Uncacheable]	"uc",
+[Writecomb]	"wc",
+[Unknown1]	"uk1",
+[Unknown2]	"uk2",
+[Writethru]	"wt",
+[Writeprot]	"wp",
+[Writeback]	"wb",
+		nil
+};
+
+static int dosync;
+static Mtrreg mtrreg[Nmtrr];
+
+static char *
+type2str(int type)
+{
+	if(type < 0 || type >= nelem(types))
+		return nil;
+	return types[type];
+}
+
+static int
+str2type(char *str)
+{
+	char **p;
+
+	for(p = types; *p != nil; p++)
+		if (strcmp(str, *p) == 0)
+			return p - types;
+	return -1;
+}
+
+static unsigned long
+physmask(void)
+{
+	uint32_t regs[4];
+	static long mask = -1;
+
+	if (mask != -1)
+		return mask;
+	cpuid(Exthighfunc, regs);
+	if(regs[0] >= Extaddrsz) {			/* ax */
+		cpuid(Extaddrsz, regs);
+		mask = (1LL << (regs[0] & 0xFF)) - 1;	/* ax */
+	}
+	mask &= Paerange - 1;				/* x86 sanity */
+	return mask;
+}
+
+/* limit physical addresses to 36 bits on the x86 */
+static void
+sanity(Mtrreg *mtrr)
+{
+	mtrr->base &= Paerange - 1;
+	mtrr->mask &= Paerange - 1;
+}
+
+static int
+ispow2(unsigned long ul)
+{
+	return (ul & (ul - 1)) == 0;
+}
+
+/* true if mtrr is valid */
+static int
+mtrrdec(Mtrreg *mtrr, unsigned long *ptr, unsigned long *size, int *type)
+{
+	sanity(mtrr);
+	*ptr =  mtrr->base & ~(BY2PG-1);
+	*type = mtrr->base & 0xff;
+	*size = (physmask() ^ (mtrr->mask & ~(BY2PG-1))) + 1;
+	return (mtrr->mask >> 11) & 1;
+}
+
+static void
+mtrrenc(Mtrreg *mtrr, unsigned long ptr, unsigned long size, int type, int ok)
+{
+	mtrr->base = ptr | (type & 0xff);
+	mtrr->mask = (physmask() & ~(size - 1)) | (ok? 1<<11: 0);
+	sanity(mtrr);
+}
+
+/*
+ * i is the index of the MTRR, and is multiplied by 2 because
+ * mask and base offsets are interleaved.
+ */
+static void
+mtrrget(Mtrreg *mtrr, uint i)
+{
+	rdmsr(MTRRPhysBase0 + 2*i, &mtrr->base);
+	rdmsr(MTRRPhysMask0 + 2*i, &mtrr->mask);
+	sanity(mtrr);
+}
+
+static void
+mtrrput(Mtrreg *mtrr, uint i)
+{
+	sanity(mtrr);
+	wrmsr(MTRRPhysBase0 + 2*i, mtrr->base);
+	wrmsr(MTRRPhysMask0 + 2*i, mtrr->mask);
+}
+
+static int
+mtrrvcnt(void)
+{
+	long cap;
+	int vcnt;
+
+	rdmsr(MTRRCap, &cap);
+	vcnt = cap & Capvcnt;
+	if(vcnt > Nmtrr)
+		vcnt = Nmtrr;
+	return vcnt;
+}
+
+static int
+mtrrgetall(void)
+{
+	int i, vcnt;
+
+	vcnt = mtrrvcnt();
+	for(i = 0; i < vcnt; i++)
+		mtrrget(&mtrreg[i], i);
+	return vcnt;
+}
+
+static void
+mtrrputall(void)
+{
+	int s, i, vcnt;
+	uint32_t cr0, cr4;
+	long def;
+
+	s = splhi();
+
+	cr4 = cr4get();
+	cr4put(cr4 & ~CR4PageGlobalEnable);
+	cr0 = cr0get();
+	wbinvd();
+	cr0put(cr0 | CR0CacheDisable);
+	wbinvd();
+	rdmsr(MTRRDefaultType, &def);
+	wrmsr(MTRRDefaultType, def & ~(long)Defena);
+
+	vcnt = mtrrvcnt();
+	for(i=0; i<vcnt; i++)
+		mtrrput(&mtrreg[i], i);
+
+	wbinvd();
+	wrmsr(MTRRDefaultType, def);
+	cr0put(cr0);
+	cr4put(cr4);
+
+	splx(s);
+}
+
+void
+mtrrclock(void)				/* called from clock interrupt */
+{
+	static Ref bar1, bar2;
+	int s;
+
+	if(dosync == 0)
+		return;
+
+	s = splhi();
+
+	/*
+	 * wait for all CPUs to sync here, so that the MTRR setup gets
+	 * done at roughly the same time on all processors.
+	 */
+	incref(&bar1);
+	while(bar1.ref < sys->nmach)
+		microdelay(10);
+
+	mtrrputall();
+
+	/*
+	 * wait for all CPUs to sync up again, so that we don't continue
+	 * executing while the MTRRs are still being set up.
+	 */
+	incref(&bar2);
+	while(bar2.ref < sys->nmach)
+		microdelay(10);
+	decref(&bar1);
+	while(bar1.ref > 0)
+		microdelay(10);
+	decref(&bar2);
+
+	dosync = 0;
+	splx(s);
+}
+
+static char*
+mtrr0(unsigned long base, unsigned long size, char *tstr)
+{
+	int i, vcnt, slot, type, mtype, mok;
+	long def, cap;
+	unsigned long mp, msize;
+
+	if(!(m->cpuiddx & Mtrr))
+		return "mtrrs not supported";
+	if(base & (BY2PG-1) || size & (BY2PG-1) || size == 0)
+		return "mtrr base or size not 4k aligned or zero size";
+	if(base + size >= Paerange)
+		return "mtrr range exceeds 36 bits";
+	if(!ispow2(size))
+		return "mtrr size not power of 2";
+	if(base & (size - 1))
+		return "mtrr base not naturally aligned";
+
+	if((type = str2type(tstr)) == -1)
+		return "mtrr bad type";
+
+	rdmsr(MTRRCap, &cap);
+	rdmsr(MTRRDefaultType, &def);
+
+	switch(type){
+	default:
+		return "mtrr unknown type";
+	case Writecomb:
+		if(!(cap & Capwc))
+			return "mtrr type wc (write combining) unsupported";
+		/* fallthrough */
+	case Uncacheable:
+	case Writethru:
+	case Writeprot:
+	case Writeback:
+		break;
+	}
+
+	vcnt = mtrrgetall();
+
+	slot = -1;
+	for(i = 0; i < vcnt; i++){
+		mok = mtrrdec(&mtrreg[i], &mp, &msize, &mtype);
+		if(slot == -1 && (!mok || mtype == (def & Deftype)))
+			slot = i;	/* good, but look further for exact match */
+		if(mok && mp == base && msize == size){
+			slot = i;
+			break;
+		}
+	}
+	if(slot == -1)
+		return "no free mtrr slots";
+
+	mtrrenc(&mtrreg[slot], base, size, type, 1);
+
+	coherence();
+
+	dosync = 1;
+	mtrrclock();
+
+	return nil;
+}
+
+char*
+mtrr(unsigned long base, unsigned long size, char *tstr)
+{
+	static QLock mtrrlk;
+	char *err;
+
+	qlock(&mtrrlk);
+	err = mtrr0(base, size, tstr);
+	qunlock(&mtrrlk);
+
+	return err;
+}
+
+int
+mtrrprint(char *buf, long bufsize)
+{
+	int i, n, vcnt, type;
+	unsigned long base, size;
+	Mtrreg mtrr;
+	long def;
+
+	if(!(m->cpuiddx & Mtrr))
+		return 0;
+	rdmsr(MTRRDefaultType, &def);
+	n = snprint(buf, bufsize, "cache default %s\n",
+		type2str(def & Deftype));
+	vcnt = mtrrvcnt();
+	for(i = 0; i < vcnt; i++){
+		mtrrget(&mtrr, i);
+		if (mtrrdec(&mtrr, &base, &size, &type))
+			n += snprint(buf+n, bufsize-n,
+				"cache 0x%llux %llud %s\n",
+				base, size, type2str(type));
+	}
+	return n;
+}
+
+void
+mtrrsync(void)
+{
+	static long cap0, def0;
+	long cap, def;
+
+	rdmsr(MTRRCap, &cap);
+	rdmsr(MTRRDefaultType, &def);
+
+	if(m->machno == 0){
+		cap0 = cap;
+		def0 = def;
+		mtrrgetall();
+		return;
+	}
+
+	if(cap0 != cap)
+		print("mtrrcap%d: %lluX %lluX\n",
+			m->machno, cap0, cap);
+	if(def0 != def)
+		print("mtrrdef%d: %lluX %lluX\n",
+			m->machno, def0, def);
+	mtrrputall();
+}
diff --git a/sys/src/kern/amd64/multiboot.c b/sys/src/kern/amd64/multiboot.c
index 8a0c21c..1a7ab35 100644
--- a/sys/src/kern/amd64/multiboot.c
+++ b/sys/src/kern/amd64/multiboot.c
@@ -1,155 +1,126 @@
+/*
+ * This file is part of Jehanne.
+ *
+ * Copyright (C) 2017 Giacomo Tesio <giacomo@tesio.it>
+ *
+ * Jehanne is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 2 of the License.
+ *
+ * Jehanne is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with Jehanne.  If not, see <http://www.gnu.org/licenses/>.
+ */
 #include "u.h"
 #include "../port/lib.h"
 #include "mem.h"
 #include "dat.h"
 #include "fns.h"
+#include "ureg.h"
+#include "multiboot.h"
 
-typedef struct Mbi Mbi;
-struct Mbi {
-	uint32_t	flags;
-	uint32_t	memlower;
-	uint32_t	memupper;
-	uint32_t	bootdevice;
-	uint32_t	cmdline;
-	uint32_t	modscount;
-	uint32_t	modsaddr;
-	uint32_t	syms[4];
-	uint32_t	mmaplength;
-	uint32_t	mmapaddr;
-	uint32_t	driveslength;
-	uint32_t	drivesaddr;
-	uint32_t	configtable;
-	uint32_t	bootloadername;
-	uint32_t	apmtable;
-	uint32_t	vbe[6];
-};
+#define AT_KERNEL(p) ((void*)(p+KZERO))
 
-enum {						/* flags */
-	Fmem		= 0x00000001,		/* mem* valid */
-	Fbootdevice	= 0x00000002,		/* bootdevice valid */
-	Fcmdline	= 0x00000004,		/* cmdline valid */
-	Fmods		= 0x00000008,		/* mod* valid */
-	Fsyms		= 0x00000010,		/* syms[] has a.out info */
-	Felf		= 0x00000020,		/* syms[] has ELF info */
-	Fmmap		= 0x00000040,		/* mmap* valid */
-	Fdrives		= 0x00000080,		/* drives* valid */
-	Fconfigtable	= 0x00000100,		/* configtable* valid */
-	Fbootloadername	= 0x00000200,		/* bootloadername* valid */
-	Fapmtable	= 0x00000400,		/* apmtable* valid */
-	Fvbe		= 0x00000800,		/* vbe[] valid */
-};
-
-typedef struct Mod Mod;
-struct Mod {
-	uint32_t	modstart;
-	uint32_t	modend;
-	uint32_t	string;
-	uint32_t	reserved;
-};
-
-typedef struct MMap MMap;
-struct MMap {
-	uint32_t	size;
-	uint32_t	base[2];
-	uint32_t	length[2];
-	uint32_t	type;
-};
+extern int e820map(int type, uintptr_t base, uintptr_t top);
 
 int
-multiboot(uint32_t magic, uint32_t pmbi, int vflag)
+multiboot(int just_log)
 {
+	uint32_t magic;
 	char *p, *modname;
 	int i, n;
-	Mbi *mbi;
-	Mod *mod;
-	MMap *mmap;
+	multiboot_info_t *mbi;
+	multiboot_module_t *mod;
+	multiboot_memory_map_t *mmap;
 	uint64_t addr, len;
 
-	if(vflag)
-		jehanne_print("magic %#ux pmbi %#ux\n", magic, pmbi);
-	if(magic != 0x2badb002){
-		//return -1;
-		jehanne_print("wrong magic in multiboot\n");
-	}
+	magic = (uint32_t)sys->boot_regs->ax;
+	mbi = (multiboot_info_t*)sys->boot_regs->bx;
 
-	mbi = KADDR(pmbi);
-	if(vflag)
+	if(just_log)
+		jehanne_print("magic %#ux infos at %#p\n", magic, mbi);
+	if(magic != 0x2badb002)
+		return -1;
+
+	if(just_log)
 		jehanne_print("flags %#ux\n", mbi->flags);
-	if(mbi->flags & Fcmdline){
-		p = KADDR(mbi->cmdline);
-		if(vflag)
-			jehanne_print("cmdline <%s>\n", p);
+	if(mbi->flags & MULTIBOOT_INFO_CMDLINE){
+		p = AT_KERNEL(mbi->cmdline);
+		if(just_log)
+			jehanne_print("Multiboot Command Line:\n\t%s\n", p);
 		else
 			optionsinit(p);
 	}
-	if(mbi->flags & Fmods){
-		for(i = 0; i < mbi->modscount; i++){
-			mod = KADDR(mbi->modsaddr + i*16);
-			if(mod->string != 0)
-				p = KADDR(mod->string);
+	if(mbi->flags & MULTIBOOT_INFO_MODS){
+		if(just_log)
+			jehanne_print("Multiboot Modules:\n");
+		for(i = 0; i < mbi->mods_count; i++){
+			mod = AT_KERNEL(mbi->mods_addr);
+			if(mod->cmdline != 0)
+				p = AT_KERNEL(mod->cmdline);
 			else
 				p = "";
-			if(vflag)
-				jehanne_print("mod %#ux %#ux <%s>\n",
-					mod->modstart, mod->modend, p);
+			if(just_log)
+				jehanne_print("\tModule <%s> %#ux %#ux\n",
+					mod->mod_start, mod->mod_end, p);
 			else {
-				asmmodinit(mod->modstart, mod->modend, p);
+				asmmodinit(mod->mod_start, mod->mod_end, p);
 				modname = jehanne_strrchr(p, '/');
 				if(modname == nil)
 					modname = p;
 				if(*modname == '/')
 					++modname;
-				addbootfile(modname, KADDR(mod->modstart), mod->modend - mod->modstart);
+				addbootfile(modname, AT_KERNEL(mod->mod_start), mod->mod_end - mod->mod_start);
 			}
 		}
 	}
-	if(mbi->flags & Fmmap){
-		mmap = KADDR(mbi->mmapaddr);
+	if(mbi->flags & MULTIBOOT_INFO_MEM_MAP){
+		if(just_log)
+			jehanne_print("Multiboot Memory Map:\n");
+		mmap = AT_KERNEL(mbi->mmap_addr);
 		n = 0;
-		while(n < mbi->mmaplength){
-			addr = (((uint64_t)mmap->base[1])<<32)|mmap->base[0];
-			len = (((uint64_t)mmap->length[1])<<32)|mmap->length[0];
+		while(n < mbi->mmap_length){
+			addr = mmap->addr;
+			len = mmap->len;
 			switch(mmap->type){
 			default:
-				if(vflag)
-					jehanne_print("type %ud", mmap->type);
+				if(just_log)
+					jehanne_print("\ttype %ud ", mmap->type);
 				break;
-			case 1:
-				if(vflag)
-					jehanne_print("Memory");
-				else
-					asmmapinit(addr, len, mmap->type);
+			case MULTIBOOT_MEMORY_AVAILABLE:
+				if(just_log)
+					jehanne_print("\tMemory");
 				break;
-			case 2:
-				if(vflag)
-					jehanne_print("reserved");
-				else
-					asmmapinit(addr, len, mmap->type);
+			case MULTIBOOT_MEMORY_RESERVED:
+				if(just_log)
+					jehanne_print("\tReserved");
 				break;
 			case 3:
-				if(vflag)
-					jehanne_print("ACPI Reclaim Memory");
-				else
-					asmmapinit(addr, len, mmap->type);
+				if(just_log)
+					jehanne_print("\tACPI Reclaim Memory");
 				break;
 			case 4:
-				if(vflag)
-					jehanne_print("ACPI NVS Memory");
-				else
-					asmmapinit(addr, len, mmap->type);
+				if(just_log)
+					jehanne_print("\tACPI NVS Memory");
 				break;
 			}
-			if(vflag)
-				jehanne_print("\n\t%#16.16llux %#16.16llux (%llud)\n",
+			if(just_log)
+				jehanne_print("\n\t  %#16.16llux %#16.16llux (%llud)\n",
 					addr, addr+len, len);
+			else
+				e820map(mmap->type, addr, addr+len);
 
 			n += mmap->size+sizeof(mmap->size);
-			mmap = KADDR(mbi->mmapaddr+n);
+			mmap = AT_KERNEL(mbi->mmap_addr+n);
 		}
 	}
-	if(vflag && (mbi->flags & Fbootloadername)){
-		p = KADDR(mbi->bootloadername);
-		jehanne_print("bootloadername <%s>\n", p);
+	if(just_log && (mbi->flags & MULTIBOOT_INFO_BOOT_LOADER_NAME)){
+		p = AT_KERNEL(mbi->boot_loader_name);
+		jehanne_print("Multiboot: Boot Loader Name <%s>\n", p);
 	}
 
 	return 0;
diff --git a/sys/src/kern/amd64/multiboot.h b/sys/src/kern/amd64/multiboot.h
new file mode 100644
index 0000000..f7547d2
--- /dev/null
+++ b/sys/src/kern/amd64/multiboot.h
@@ -0,0 +1,222 @@
+/* Copyright (C) 1999,2003,2007,2008,2009  Free Software Foundation, Inc.
+ *
+ *  Permission is hereby granted, free of charge, to any person obtaining a copy
+ *  of this software and associated documentation files (the "Software"), to
+ *  deal in the Software without restriction, including without limitation the
+ *  rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ *  sell copies of the Software, and to permit persons to whom the Software is
+ *  furnished to do so, subject to the following conditions:
+ *
+ *  The above copyright notice and this permission notice shall be included in
+ *  all copies or substantial portions of the Software.
+ *
+ *  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ *  IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ *  FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL ANY
+ *  DEVELOPER OR DISTRIBUTOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *  WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
+ *  IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef MULTIBOOT_HEADER
+#define MULTIBOOT_HEADER 1
+
+/* How many bytes from the start of the file we search for the header. */
+#define MULTIBOOT_SEARCH                        8192
+
+/* The magic field should contain this. */
+#define MULTIBOOT_HEADER_MAGIC                  0x1BADB002
+
+/* This should be in %eax. */
+#define MULTIBOOT_BOOTLOADER_MAGIC              0x2BADB002
+
+/* The bits in the required part of flags field we don't support. */
+#define MULTIBOOT_UNSUPPORTED                   0x0000fffc
+
+/* Alignment of multiboot modules. */
+#define MULTIBOOT_MOD_ALIGN                     0x00001000
+
+/* Alignment of the multiboot info structure. */
+#define MULTIBOOT_INFO_ALIGN                    0x00000004
+
+/* Flags set in the 'flags' member of the multiboot header. */
+
+/* Align all boot modules on i386 page (4KB) boundaries. */
+#define MULTIBOOT_PAGE_ALIGN                    0x00000001
+
+/* Must pass memory information to OS. */
+#define MULTIBOOT_MEMORY_INFO                   0x00000002
+
+/* Must pass video information to OS. */
+#define MULTIBOOT_VIDEO_MODE                    0x00000004
+
+/* This flag indicates the use of the address fields in the header. */
+#define MULTIBOOT_AOUT_KLUDGE                   0x00010000
+
+/* Flags to be set in the 'flags' member of the multiboot info structure. */
+
+/* is there basic lower/upper memory information? */
+#define MULTIBOOT_INFO_MEMORY                   0x00000001
+/* is there a boot device set? */
+#define MULTIBOOT_INFO_BOOTDEV                  0x00000002
+/* is the command-line defined? */
+#define MULTIBOOT_INFO_CMDLINE                  0x00000004
+/* are there modules to do something with? */
+#define MULTIBOOT_INFO_MODS                     0x00000008
+
+/* These next two are mutually exclusive */
+
+/* is there a symbol table loaded? */
+#define MULTIBOOT_INFO_AOUT_SYMS                0x00000010
+/* is there an ELF section header table? */
+#define MULTIBOOT_INFO_ELF_SHDR                 0X00000020
+
+/* is there a full memory map? */
+#define MULTIBOOT_INFO_MEM_MAP                  0x00000040
+
+/* Is there drive info? */
+#define MULTIBOOT_INFO_DRIVE_INFO               0x00000080
+
+/* Is there a config table? */
+#define MULTIBOOT_INFO_CONFIG_TABLE             0x00000100
+
+/* Is there a boot loader name? */
+#define MULTIBOOT_INFO_BOOT_LOADER_NAME         0x00000200
+
+/* Is there a APM table? */
+#define MULTIBOOT_INFO_APM_TABLE                0x00000400
+
+/* Is there video information? */
+#define MULTIBOOT_INFO_VIDEO_INFO               0x00000800
+
+#ifndef __ASSEMBLER__
+
+typedef unsigned short          multiboot_uint16_t;
+typedef unsigned int            multiboot_uint32_t;
+typedef unsigned long long      multiboot_uint64_t;
+
+struct multiboot_header
+{
+	/* Must be MULTIBOOT_MAGIC - see above. */
+	multiboot_uint32_t magic;
+
+	/* Feature flags. */
+	multiboot_uint32_t flags;
+
+	/* The above fields plus this one must equal 0 mod 2^32. */
+	multiboot_uint32_t checksum;
+
+	/* These are only valid if MULTIBOOT_AOUT_KLUDGE is set. */
+	multiboot_uint32_t header_addr;
+	multiboot_uint32_t load_addr;
+	multiboot_uint32_t load_end_addr;
+	multiboot_uint32_t bss_end_addr;
+	multiboot_uint32_t entry_addr;
+
+	/* These are only valid if MULTIBOOT_VIDEO_MODE is set. */
+	multiboot_uint32_t mode_type;
+	multiboot_uint32_t width;
+	multiboot_uint32_t height;
+	multiboot_uint32_t depth;
+};
+
+/* The symbol table for a.out. */
+struct multiboot_aout_symbol_table
+{
+	multiboot_uint32_t tabsize;
+	multiboot_uint32_t strsize;
+	multiboot_uint32_t addr;
+	multiboot_uint32_t reserved;
+};
+typedef struct multiboot_aout_symbol_table multiboot_aout_symbol_table_t;
+
+/* The section header table for ELF. */
+struct multiboot_elf_section_header_table
+{
+	multiboot_uint32_t num;
+	multiboot_uint32_t size;
+	multiboot_uint32_t addr;
+	multiboot_uint32_t shndx;
+};
+typedef struct multiboot_elf_section_header_table multiboot_elf_section_header_table_t;
+
+struct multiboot_info
+{
+	/* Multiboot info version number */
+	multiboot_uint32_t flags;
+
+	/* Available memory from BIOS */
+	multiboot_uint32_t mem_lower;
+	multiboot_uint32_t mem_upper;
+
+	/* "root" partition */
+	multiboot_uint32_t boot_device;
+
+	/* Kernel command line */
+	multiboot_uint32_t cmdline;
+
+	/* Boot-Module list */
+	multiboot_uint32_t mods_count;
+	multiboot_uint32_t mods_addr;
+
+	union
+	{
+		multiboot_aout_symbol_table_t aout_sym;
+		multiboot_elf_section_header_table_t elf_sec;
+	} u;
+
+	/* Memory Mapping buffer */
+	multiboot_uint32_t mmap_length;
+	multiboot_uint32_t mmap_addr;
+
+	/* Drive Info buffer */
+	multiboot_uint32_t drives_length;
+	multiboot_uint32_t drives_addr;
+
+	/* ROM configuration table */
+	multiboot_uint32_t config_table;
+
+	/* Boot Loader Name */
+	multiboot_uint32_t boot_loader_name;
+
+	/* APM table */
+	multiboot_uint32_t apm_table;
+
+	/* Video */
+	multiboot_uint32_t vbe_control_info;
+	multiboot_uint32_t vbe_mode_info;
+	multiboot_uint16_t vbe_mode;
+	multiboot_uint16_t vbe_interface_seg;
+	multiboot_uint16_t vbe_interface_off;
+	multiboot_uint16_t vbe_interface_len;
+};
+typedef struct multiboot_info multiboot_info_t;
+
+struct multiboot_mmap_entry
+{
+	multiboot_uint32_t size;
+	multiboot_uint64_t addr;
+	multiboot_uint64_t len;
+#define MULTIBOOT_MEMORY_AVAILABLE              1
+#define MULTIBOOT_MEMORY_RESERVED               2
+	multiboot_uint32_t type;
+} __attribute__((packed));
+typedef struct multiboot_mmap_entry multiboot_memory_map_t;
+
+struct multiboot_mod_list
+{
+	/* the memory used goes from bytes 'mod_start' to 'mod_end-1' inclusive */
+	multiboot_uint32_t mod_start;
+	multiboot_uint32_t mod_end;
+
+	/* Module command line */
+	multiboot_uint32_t cmdline;
+
+	/* padding to take it to 16 bytes (must be zero) */
+	multiboot_uint32_t pad;
+};
+typedef struct multiboot_mod_list multiboot_module_t;
+
+#endif /* ! __ASSEMBLER__ */
+
+#endif /* ! MULTIBOOT_HEADER */
diff --git a/sys/src/kern/amd64/options.c b/sys/src/kern/amd64/options.c
deleted file mode 100644
index 774be19..0000000
--- a/sys/src/kern/amd64/options.c
+++ /dev/null
@@ -1,129 +0,0 @@
-#include "u.h"
-#include "../port/lib.h"
-#include "mem.h"
-#include "dat.h"
-#include "fns.h"
-
-/*
-Conf conf;
-char *confname[1] = {
-	"console",
-};
-char *confval[1] = {
-	"0 b115200",
-};
-int nconf = nelem(confname);
- */
-
-/*
- * Where configuration info is left for the loaded programme.
- * This will turn into a structure as more is done by the boot loader
- * (e.g. why parse the .ini file twice?).
- * There are 3584 bytes available at CONFADDR.
- */
-#define	CONFADDR	PTR2UINT(KADDR(0x0001200))
-
-#define BOOTLINE	((char*)CONFADDR)
-#define BOOTLINELEN	64
-#define BOOTARGS	((char*)(CONFADDR+BOOTLINELEN))
-#define	BOOTARGSLEN	(4096-0x200-BOOTLINELEN)
-#define	MAXCONF		64
-
-char *confname[MAXCONF];
-char *confval[MAXCONF];
-int nconf;
-
-void
-confoptions(void)
-{
-	long i, n;
-	char *cp, *line[MAXCONF], *p, *q;
-
-	/*
-	 *  parse configuration args from dos file plan9.ini
-	 */
-	cp = BOOTARGS;	/* where b.com leaves its config */
-	cp[BOOTARGSLEN-1] = 0;
-
-	/*
-	 * Strip out '\r', change '\t' -> ' '.
-	 */
-	p = cp;
-	for(q = cp; *q; q++){
-		if(*q == '\r')
-			continue;
-		if(*q == '\t')
-			*q = ' ';
-		*p++ = *q;
-	}
-	*p = 0;
-
-	n = jehanne_getfields(cp, line, MAXCONF, 1, "\n");
-	for(i = 0; i < n; i++){
-		if(*line[i] == '#')
-			continue;
-		cp = jehanne_strchr(line[i], '=');
-		if(cp == nil)
-			continue;
-		*cp++ = '\0';
-		confname[nconf] = line[i];
-		confval[nconf] = cp;
-		nconf++;
-	}
-}
-
-char*
-getconf(char *name)
-{
-	int i;
-
-	for(i = 0; i < nconf; i++)
-		if(jehanne_cistrcmp(confname[i], name) == 0)
-			return confval[i];
-	return 0;
-}
-
-void
-confsetenv(void)
-{
-	int i;
-
-	for(i = 0; i < nconf; i++){
-		if(confname[i][0] != '*')
-			ksetenv(confname[i], confval[i], 0);
-		ksetenv(confname[i], confval[i], 1);
-	}
-}
-
-int
-isaconfig(char *class, int ctlrno, ISAConf *isa)
-{
-	char cc[32], *p;
-	int i;
-
-	jehanne_snprint(cc, sizeof cc, "%s%d", class, ctlrno);
-	p = getconf(cc);
-	if(p == nil)
-		return 0;
-
-	isa->type = "";
-	isa->nopt = jehanne_tokenize(p, isa->opt, NISAOPT);
-	for(i = 0; i < isa->nopt; i++){
-		p = isa->opt[i];
-		if(jehanne_cistrncmp(p, "type=", 5) == 0)
-			isa->type = p + 5;
-		else if(jehanne_cistrncmp(p, "port=", 5) == 0)
-			isa->port = jehanne_strtoul(p+5, &p, 0);
-		else if(jehanne_cistrncmp(p, "irq=", 4) == 0)
-			isa->irq = jehanne_strtoul(p+4, &p, 0);
-		else if(jehanne_cistrncmp(p, "dma=", 4) == 0)
-			isa->dma = jehanne_strtoul(p+4, &p, 0);
-		else if(jehanne_cistrncmp(p, "mem=", 4) == 0)
-			isa->mem = jehanne_strtoul(p+4, &p, 0);
-		else if(jehanne_cistrncmp(p, "size=", 5) == 0)
-			isa->size = jehanne_strtoul(p+5, &p, 0);
-		else if(jehanne_cistrncmp(p, "freq=", 5) == 0)
-			isa->freq = jehanne_strtoul(p+5, &p, 0);
-	}
-	return 1;
-}
diff --git a/sys/src/kern/386/pci.c b/sys/src/kern/amd64/pci.c
similarity index 99%
rename from sys/src/kern/386/pci.c
rename to sys/src/kern/amd64/pci.c
index 0c03e8a..fa6a4bb 100644
--- a/sys/src/kern/386/pci.c
+++ b/sys/src/kern/amd64/pci.c
@@ -572,8 +572,8 @@ optiset(Pcidev *router, uint8_t link, uint8_t irq)
 	uint8_t pirq;
 
 	pirq = pcicfgr8(router, 0xb8 + (link >> 5));
-    	pirq &= (link & 0x10)? 0x0f : 0xf0;
-    	pirq |= (link & 0x10)? (irq << 4): (irq & 15);
+	pirq &= (link & 0x10)? 0x0f : 0xf0;
+	pirq |= (link & 0x10)? (irq << 4): (irq & 15);
 	pcicfgw8(router, 0xb8 + (link >> 5), pirq);
 }
 
@@ -1420,7 +1420,7 @@ enumcaps(Pcidev *p, int (*fmatch)(Pcidev*, int, int, int), int arg)
 
 	/* status register bit 4 has capabilities */
 	if((pcicfgr16(p, PciPSR) & 1<<4) == 0)
-		return -1;      
+		return -1;
 	switch(pcicfgr8(p, PciHDT) & 0x7F){
 	default:
 		return -1;
@@ -1554,7 +1554,7 @@ pcinextcap(Pcidev *pci, int offset)
 	if(offset == 0) {
 		if((pcicfgr16(pci, PciPSR) & (1<<4)) == 0)
 			return 0; /* no capabilities */
-		offset = PciCP-1;
+		offset = PciCAP-1;
 	}
 	return pcicfgr8(pci, offset+1) & ~3;
 }
diff --git a/sys/src/kern/386/pmc.h b/sys/src/kern/amd64/pmc.h
similarity index 100%
rename from sys/src/kern/386/pmc.h
rename to sys/src/kern/amd64/pmc.h
diff --git a/sys/src/kern/386/pmcio.c b/sys/src/kern/amd64/pmcio.c
similarity index 99%
rename from sys/src/kern/386/pmcio.c
rename to sys/src/kern/amd64/pmcio.c
index ea5c68e..00e0fff 100644
--- a/sys/src/kern/386/pmcio.c
+++ b/sys/src/kern/amd64/pmcio.c
@@ -36,7 +36,7 @@ enum {
 	 * section 2.16 and 3.14
 	*/
 	PeK10,
-	
+
 };
 
 enum {
@@ -53,7 +53,7 @@ enum {						/* MSRs */
 };
 
 enum {						/* HW Performance Counters Event Selector */
-    				 
+
 	PeHo		= 0x0000020000000000ull,/* Host only */
 	PeGo		= 0x0000010000000000ull,/* Guest only */
 	PeEvMskH	= 0x0000000f00000000ull,/* Event mask H */
@@ -101,7 +101,7 @@ pmcnregs(void)
 		nregs = PeNregAmd;
 		break;
 	case PeIntel:
-		cpuid(0xa, 0, info);
+		cpuid(0xa, info);
 		nregs = (info[0]>>8)&0xff;
 		break;
 	default:
@@ -124,7 +124,7 @@ pmcmsk(void)
 		msk = ~0ULL;
 		break;
 	case PeIntel:
-		cpuid(0xa, 0, info);
+		cpuid(0xa, info);
 		msk = (1<<((info[0]>>16)&0xff)) - 1;
 		break;
 	}
@@ -232,7 +232,7 @@ pmcconfigure(void)
 	int i, j, isrecog;
 
 	isrecog = 0;
-	
+
 	if(jehanne_memcmp(&m->cpuinfo[0][1], "AuthcAMDenti", 12) == 0){
 		isrecog++;
 		cfg.ctrbase = PerfCtrbaseAmd;
@@ -327,7 +327,7 @@ pmctrans(PmcCtl *p)
 }
 
 //PeHo|PeGo
-#define PeAll	(PeOS|PeUsr)	
+#define PeAll	(PeOS|PeUsr)
 #define SetEvMsk(v, e) ((v)|(((e)&PeEvMskL)|(((e)<<(PeEvMsksh-8))&PeEvMskH)))
 #define SetUMsk(v, u) ((v)|(((u)<<8ull)&PeUnMsk))
 
diff --git a/sys/src/kern/amd64/screen.c b/sys/src/kern/amd64/screen.c
index 5fe2a0c..1b3afb8 100644
--- a/sys/src/kern/amd64/screen.c
+++ b/sys/src/kern/amd64/screen.c
@@ -6,7 +6,6 @@
  * modified, propagated, or distributed except according to the terms contained
  * in the LICENSE file.
  */
-
 #include "u.h"
 #include "../port/lib.h"
 #include "mem.h"
@@ -22,40 +21,25 @@
 #include <cursor.h>
 #include "screen.h"
 
-#define RGB2K(r,g,b)	((156763*(r)+307758*(g)+59769*(b))>>19)
-
-Point ZP = {0, 0};
-
 Rectangle physgscreenr;
 
-Memdata gscreendata;
 Memimage *gscreen;
 
 VGAscr vgascreen[1];
 
-Cursor	arrow = {
-	{ -1, -1 },
-	{ 0xFF, 0xFF, 0x80, 0x01, 0x80, 0x02, 0x80, 0x0C, 
-	  0x80, 0x10, 0x80, 0x10, 0x80, 0x08, 0x80, 0x04, 
-	  0x80, 0x02, 0x80, 0x01, 0x80, 0x02, 0x8C, 0x04, 
-	  0x92, 0x08, 0x91, 0x10, 0xA0, 0xA0, 0xC0, 0x40, 
-	},
-	{ 0x00, 0x00, 0x7F, 0xFE, 0x7F, 0xFC, 0x7F, 0xF0, 
-	  0x7F, 0xE0, 0x7F, 0xE0, 0x7F, 0xF0, 0x7F, 0xF8, 
-	  0x7F, 0xFC, 0x7F, 0xFE, 0x7F, 0xFC, 0x73, 0xF8, 
-	  0x61, 0xF0, 0x60, 0xE0, 0x40, 0x40, 0x00, 0x00, 
-	},
-};
-
-int didswcursorinit;
-
-static void *softscreen;
-
 int
-screensize(int x, int y, int z, uint32_t chan)
+screensize(int x, int y, int _, uint32_t chan)
 {
 	VGAscr *scr;
-	void *oldsoft;
+
+	qlock(&drawlock);
+	if(waserror()){
+		qunlock(&drawlock);
+		nexterror();
+	}
+
+	if(memimageinit() < 0)
+		error("memimageinit failed");
 
 	lock(&vgascreenlock);
 	if(waserror()){
@@ -63,54 +47,54 @@ screensize(int x, int y, int z, uint32_t chan)
 		nexterror();
 	}
 
-	memimageinit();
 	scr = &vgascreen[0];
-	oldsoft = softscreen;
+	scr->gscreendata = nil;
+	scr->gscreen = nil;
+	if(gscreen){
+		freememimage(gscreen);
+		gscreen = nil;
+	}
 
 	if(scr->paddr == 0){
-		int width = (x*z)/BI2WD;
-		void *p;
-
-		p = jehanne_malloc(width*BY2WD*y);
-		if(p == nil)
-			error("no memory for vga soft screen");
-		gscreendata.bdata = softscreen = p;
 		if(scr->dev && scr->dev->page){
 			scr->vaddr = KADDR(VGAMEM());
 			scr->apsize = 1<<16;
 		}
-		scr->useflush = 1;
+		scr->softscreen = 1;
 	}
-	else{
-		gscreendata.bdata = scr->vaddr;
+	if(scr->softscreen){
+		gscreen = allocmemimage(Rect(0,0,x,y), chan);
+		scr->useflush = 1;
+	}else{
+		static Memdata md;
+
+		md.ref = 1;
+		if((md.bdata = scr->vaddr) == 0)
+			error("framebuffer not maped");
+		gscreen = allocmemimaged(Rect(0,0,x,y), chan, &md);
 		scr->useflush = scr->dev && scr->dev->flush;
 	}
-
-	scr->gscreen = nil;
-	if(gscreen)
-		freememimage(gscreen);
-	gscreen = allocmemimaged(Rect(0,0,x,y), chan, &gscreendata);
 	if(gscreen == nil)
 		error("no memory for vga memimage");
-	vgaimageinit(chan);
 
 	scr->palettedepth = 6;	/* default */
-	scr->gscreendata = &gscreendata;
 	scr->memdefont = getmemdefont();
 	scr->gscreen = gscreen;
+	scr->gscreendata = gscreen->data;
 
 	physgscreenr = gscreen->r;
+
+	vgaimageinit(chan);
+
 	unlock(&vgascreenlock);
 	poperror();
-	if(oldsoft)
-		jehanne_free(oldsoft);
 
-	memimagedraw(gscreen, gscreen->r, memblack, ZP, nil, ZP, S);
-	flushmemscreen(gscreen->r);
-
-	if(didswcursorinit)
-		swcursorinit();
 	drawcmap();
+	swcursorinit();
+
+	qunlock(&drawlock);
+	poperror();
+
 	return 0;
 }
 
@@ -136,8 +120,8 @@ screenaperture(int size, int align)
 	 * Need to allocate some physical address space.
 	 * The driver will tell the card to use it.
 	 */
-	size = ROUNDUP(sizeof(size), 4*KiB);
-	scr->paddr = (uint64_t)jehanne_malloc(size);
+	size = PGROUND(size);
+	scr->paddr = upaalloc(size, align);
 	if(scr->paddr == 0)
 		return -1;
 	scr->vaddr = vmap(scr->paddr, size);
@@ -148,7 +132,7 @@ screenaperture(int size, int align)
 	return 0;
 }
 
-unsigned char*
+uint8_t*
 attachscreen(Rectangle* r, uint32_t* chan, int* d, int* width, int *softscreen)
 {
 	VGAscr *scr;
@@ -161,63 +145,72 @@ attachscreen(Rectangle* r, uint32_t* chan, int* d, int* width, int *softscreen)
 	*chan = scr->gscreen->chan;
 	*d = scr->gscreen->depth;
 	*width = scr->gscreen->width;
-	*softscreen = scr->useflush;
-
+	if(scr->gscreendata->allocd){
+		/*
+		 * we use a memimage as softscreen. devdraw will create its own
+		 * screen image on the backing store of that image. when our gscreen
+		 * and devdraws screenimage gets freed, the imagedata will
+		 * be released.
+		 */
+		*softscreen = 0xa110c;
+		scr->gscreendata->ref++;
+	} else
+		*softscreen = scr->useflush ? 1 : 0;
 	return scr->gscreendata->bdata;
 }
 
-/*
- * It would be fair to say that this doesn't work for >8-bit screens.
- */
 void
 flushmemscreen(Rectangle r)
 {
 	VGAscr *scr;
-	unsigned char *sp, *disp, *sdisp, *edisp;
+	uint8_t *sp, *disp, *sdisp, *edisp;
 	int y, len, incs, off, page;
 
 	scr = &vgascreen[0];
+	if(scr->gscreen == nil || scr->useflush == 0)
+		return;
+	if(rectclip(&r, scr->gscreen->r) == 0)
+		return;
 	if(scr->dev && scr->dev->flush){
 		scr->dev->flush(scr, r);
 		return;
 	}
-	if(scr->gscreen == nil || scr->useflush == 0)
+	disp = scr->vaddr;
+	incs = scr->gscreen->width*sizeof(uint32_t);
+	off = (r.min.x*scr->gscreen->depth) / 8;
+	len = (r.max.x*scr->gscreen->depth + 7) / 8;
+	len -= off;
+	off += r.min.y*incs;
+	sp = scr->gscreendata->bdata + scr->gscreen->zero + off;
+
+	/*
+	 * Linear framebuffer with softscreen.
+	 */
+	if(scr->paddr){
+		sdisp = disp+off;
+		for(y = r.min.y; y < r.max.y; y++) {
+			memmove(sdisp, sp, len);
+			sp += incs;
+			sdisp += incs;
+		}
 		return;
+	}
+
+	/*
+	 * Paged framebuffer window.
+	 */
 	if(scr->dev == nil || scr->dev->page == nil)
 		return;
 
-	if(rectclip(&r, scr->gscreen->r) == 0)
-		return;
-
-	incs = scr->gscreen->width * BY2WD;
-
-	switch(scr->gscreen->depth){
-	default:
-		len = 0;
-		panic("flushmemscreen: depth\n");
-		break;
-	case 8:
-		len = Dx(r);
-		break;
-	}
-	if(len < 1)
-		return;
-
-	off = r.min.y*scr->gscreen->width*BY2WD+(r.min.x*scr->gscreen->depth)/8;
 	page = off/scr->apsize;
 	off %= scr->apsize;
-	disp = scr->vaddr;
 	sdisp = disp+off;
 	edisp = disp+scr->apsize;
 
-	off = r.min.y*scr->gscreen->width*BY2WD+(r.min.x*scr->gscreen->depth)/8;
-
-	sp = scr->gscreendata->bdata + off;
-
 	scr->dev->page(scr, page);
 	for(y = r.min.y; y < r.max.y; y++) {
 		if(sdisp + incs < edisp) {
-			jehanne_memmove(sdisp, sp, len);
+			memmove(sdisp, sp, len);
 			sp += incs;
 			sdisp += incs;
 		}
@@ -226,13 +219,13 @@ flushmemscreen(Rectangle r)
 			page++;
 			if(off <= len){
 				if(off > 0)
-					jehanne_memmove(sdisp, sp, off);
+					memmove(sdisp, sp, off);
 				scr->dev->page(scr, page);
 				if(len - off > 0)
-					jehanne_memmove(disp, sp+off, len - off);
+					memmove(disp, sp+off, len - off);
 			}
 			else {
-				jehanne_memmove(sdisp, sp, len);
+				memmove(sdisp, sp, len);
 				scr->dev->page(scr, page);
 			}
 			sp += incs;
@@ -261,11 +254,11 @@ getcolor(uint32_t p, uint32_t* pr, uint32_t* pg, uint32_t* pb)
 	}
 	p &= x;
 
-	lock(&cursor.l);
+	lock(&cursor);
 	*pr = scr->colormap[p][0];
 	*pg = scr->colormap[p][1];
 	*pb = scr->colormap[p][2];
-	unlock(&cursor.l);
+	unlock(&cursor);
 }
 
 int
@@ -277,7 +270,7 @@ setpalette(uint32_t p, uint32_t r, uint32_t g, uint32_t b)
 	scr = &vgascreen[0];
 	d = scr->palettedepth;
 
-	lock(&cursor.l);
+	lock(&cursor);
 	scr->colormap[p][0] = r;
 	scr->colormap[p][1] = g;
 	scr->colormap[p][2] = b;
@@ -285,7 +278,7 @@ setpalette(uint32_t p, uint32_t r, uint32_t g, uint32_t b)
 	vgao(Pdata, r>>(32-d));
 	vgao(Pdata, g>>(32-d));
 	vgao(Pdata, b>>(32-d));
-	unlock(&cursor.l);
+	unlock(&cursor);
 
 	return ~0;
 }
@@ -322,27 +315,71 @@ setcolor(uint32_t p, uint32_t r, uint32_t g, uint32_t b)
 	return setpalette(p, r, g, b);
 }
 
-int
-cursoron(int dolock)
+void
+swenable(VGAscr* _)
 {
-	VGAscr *scr;
-	int v;
-
-	scr = &vgascreen[0];
-	if(scr->cur == nil || scr->cur->move == nil)
-		return 0;
-
-	if(dolock)
-		lock(&cursor.l);
-	v = scr->cur->move(scr, mousexy());
-	if(dolock)
-		unlock(&cursor.l);
-
-	return v;
+	swcursorload(&arrow);
 }
 
 void
-cursoroff(int i)
+swdisable(VGAscr* _)
+{
+}
+
+void
+swload(VGAscr* _, Cursor *curs)
+{
+	swcursorload(curs);
+}
+
+int
+swmove(VGAscr* _, Point p)
+{
+	swcursorhide();
+	swcursordraw(p);
+	return 0;
+}
+
+VGAcur swcursor =
+{
+	"soft",
+	swenable,
+	swdisable,
+	swload,
+	swmove,
+};
+
+VGAcur vgavesacur =
+{
+	"soft",
+	swenable,
+	swdisable,
+	swload,
+	swmove,
+};
+
+void
+cursoron(void)
+{
+	VGAscr *scr;
+	VGAcur *cur;
+
+	scr = &vgascreen[0];
+	cur = scr->cur;
+	if(cur == nil || cur->move == nil)
+		return;
+
+	if(cur == &swcursor)
+		qlock(&drawlock);
+	lock(&cursor);
+	cur->move(scr, mousexy());
+	unlock(&cursor);
+	if(cur == &swcursor)
+		qunlock(&drawlock);
+}
+
+void
+cursoroff(void)
 {
 }
 
@@ -358,8 +395,8 @@ setcursor(Cursor* curs)
 	scr->cur->load(scr, curs);
 }
 
-int hwaccel = 1;
-int hwblank = 0;	/* turned on by drivers that are known good */
+int hwaccel = 0;
+int hwblank = 0;
 int panning = 0;
 
 int
@@ -367,37 +404,30 @@ hwdraw(Memdrawparam *par)
 {
 	VGAscr *scr;
 	Memimage *dst, *src, *mask;
+	Memdata *scrd;
 	int m;
 
-	if(hwaccel == 0)
-		return 0;
-
 	scr = &vgascreen[0];
-	if((dst=par->dst) == nil || dst->data == nil)
+	scrd = scr->gscreendata;
+	if(scr->gscreen == nil || scrd == nil)
 		return 0;
-	if((src=par->src) == nil || src->data == nil)
+	if((dst = par->dst) == nil || dst->data == nil)
 		return 0;
-	if((mask=par->mask) == nil || mask->data == nil)
-		return 0;
-
+	if((src = par->src) && src->data == nil)
+		src = nil;
+	if((mask = par->mask) && mask->data == nil)
+		mask = nil;
 	if(scr->cur == &swcursor){
-		/*
-		 * always calling swcursorhide here doesn't cure
-		 * leaving cursor tracks nor failing to refresh menus
-		 * with the latest libmemdraw/draw.c.
-		 */
-		if(dst->data->bdata == gscreendata.bdata)
+		if(dst->data->bdata == scrd->bdata)
 			swcursoravoid(par->r);
-		if(src->data->bdata == gscreendata.bdata)
+		if(src && src->data->bdata == scrd->bdata)
 			swcursoravoid(par->sr);
-		if(mask->data->bdata == gscreendata.bdata)
+		if(mask && mask->data->bdata == scrd->bdata)
 			swcursoravoid(par->mr);
 	}
-	
-	if(dst->data->bdata != gscreendata.bdata)
+	if(!hwaccel || scr->softscreen)
 		return 0;
-
-	if(scr->fill==nil && scr->scroll==nil)
+	if(dst->data->bdata != scrd->bdata || src == nil || mask == nil)
 		return 0;
 
 	/*
@@ -442,36 +472,62 @@ blankscreen(int blank)
 	}
 }
 
-void
-vgalinearpciid(VGAscr *scr, int vid, int did)
+static char*
+vgalinearaddr0(VGAscr *scr, uint32_t paddr, int size)
 {
-	Pcidev *p;
+	int x, nsize;
+	uint32_t npaddr;
 
-	p = nil;
-	while((p = pcimatch(p, vid, 0)) != nil){
-		if(p->ccrb != 3)	/* video card */
-			continue;
-		if(did != 0 && p->did != did)
-			continue;
-		break;
+	/*
+	 * new approach.  instead of trying to resize this
+	 * later, let's assume that we can just allocate the
+	 * entire window to start with.
+	 */
+	if(scr->paddr == paddr && size <= scr->apsize)
+		return nil;
+
+	if(scr->paddr){
+		/*
+		 * could call vunmap and vmap,
+		 * but worried about dangling pointers in devdraw
+		 */
+		return "cannot grow vga frame buffer";
 	}
-	if(p == nil)
-		error("pci video card not found");
 
-	scr->pci = p;
-	vgalinearpci(scr);
+	/* round to page boundary, just in case */
+	x = paddr&(BY2PG-1);
+	npaddr = paddr-x;
+	nsize = PGROUND(size+x);
+
+	/*
+	 * Don't bother trying to map more than 4000x4000x32 = 64MB.
+	 * We only have a 256MB window.
+	 */
+	if(nsize > 64*MB)
+		nsize = 64*MB;
+	scr->vaddr = vmap(npaddr, nsize);
+	if(scr->vaddr == 0)
+		return "cannot allocate vga frame buffer";
+
+	patwc(scr->vaddr, nsize);
+
+	scr->vaddr = (char*)scr->vaddr+x;
+	scr->paddr = paddr;
+	scr->apsize = nsize;
+
+	mtrr(npaddr, nsize, "wc");
+
+	return nil;
 }
 
-void
-vgalinearpci(VGAscr *scr)
+static char*
+vgalinearpci0(VGAscr *scr)
 {
 	uint32_t paddr;
 	int i, size, best;
 	Pcidev *p;
 	
 	p = scr->pci;
-	if(p == nil)
-		return;
 
 	/*
 	 * Scan for largest memory region on card.
@@ -500,261 +556,182 @@ vgalinearpci(VGAscr *scr)
 	if(best >= 0){
 		paddr = p->mem[best].bar & ~0x0F;
 		size = p->mem[best].size;
-		vgalinearaddr(scr, paddr, size);
-		return;
+		return vgalinearaddr0(scr, paddr, size);
 	}
-	error("no video memory found on pci card");
+	return "no video memory found on pci card";
+}
+
+void
+vgalinearpci(VGAscr *scr)
+{
+	char *err;
+
+	if(scr->pci == nil)
+		return;
+	if((err = vgalinearpci0(scr)) != nil)
+		error(err);
 }
 
 void
 vgalinearaddr(VGAscr *scr, uint32_t paddr, int size)
 {
-	int x, nsize;
-	uint32_t npaddr;
+	char *err;
 
-	/*
-	 * new approach.  instead of trying to resize this
-	 * later, let's assume that we can just allocate the
-	 * entire window to start with.
-	 */
-
-	if(scr->paddr == paddr && size <= scr->apsize)
-		return;
-
-	if(scr->paddr){
-		/*
-		 * could call vunmap and vmap,
-		 * but worried about dangling pointers in devdraw
-		 */
-		error("cannot grow vga frame buffer");
-	}
-	
-	/* round to page boundary, just in case */
-	x = paddr&(4*KiB-1);
-	npaddr = paddr-x;
-	nsize = ROUNDUP(size+x, 4*KiB);
-
-	/*
-	 * Don't bother trying to map more than 4000x4000x32 = 64MB.
-	 * We only have a 256MB window.
-	 */
-	if(nsize > 64*MB)
-		nsize = 64*MB;
-	scr->vaddr = vmap(npaddr, nsize);
-	if(scr->vaddr == 0)
-		error("cannot allocate vga frame buffer");
-	scr->vaddr = (char*)scr->vaddr+x;
-	scr->paddr = paddr;
-	scr->apsize = nsize;
+	if((err = vgalinearaddr0(scr, paddr, size)) != nil)
+		error(err);
 }
 
-
-/*
- * Software cursor. 
- */
-int	swvisible;	/* is the cursor visible? */
-int	swenabled;	/* is the cursor supposed to be on the screen? */
-Memimage*	swback;	/* screen under cursor */
-Memimage*	swimg;	/* cursor image */
-Memimage*	swmask;	/* cursor mask */
-Memimage*	swimg1;
-Memimage*	swmask1;
-
-Point	swoffset;
-Rectangle	swrect;	/* screen rectangle in swback */
-Point	swpt;	/* desired cursor location */
-Point	swvispt;	/* actual cursor location */
-int	swvers;	/* incremented each time cursor image changes */
-int	swvisvers;	/* the version on the screen */
-
-/*
- * called with drawlock locked for us, most of the time.
- * kernel prints at inopportune times might mean we don't
- * hold the lock, but memimagedraw is now reentrant so
- * that should be okay: worst case we get cursor droppings.
- */
-void
-swcursorhide(void)
+static char*
+bootmapfb(VGAscr *scr, uint32_t pa, uint32_t sz)
 {
-	if(swvisible == 0)
-		return;
-	if(swback == nil)
-		return;
-	swvisible = 0;
-	memimagedraw(gscreen, swrect, swback, ZP, memopaque, ZP, S);
-	flushmemscreen(swrect);
-}
+	uint32_t start, end;
+	Pcidev *p;
+	int i;
 
-void
-swcursoravoid(Rectangle r)
-{
-	if(swvisible && rectXrect(r, swrect))
-		swcursorhide();
-}
-
-void
-swcursordraw(void)
-{
-	if(swvisible)
-		return;
-	if(swenabled == 0)
-		return;
-	if(swback == nil || swimg1 == nil || swmask1 == nil)
-		return;
-	assert(!canqlock(&drawlock));
-	swvispt = swpt;
-	swvisvers = swvers;
-	swrect = rectaddpt(Rect(0,0,16,16), swvispt);
-	memimagedraw(swback, swback->r, gscreen, swpt, memopaque, ZP, S);
-	memimagedraw(gscreen, swrect, swimg1, ZP, swmask1, ZP, SoverD);
-	flushmemscreen(swrect);
-	swvisible = 1;
-}
-
-/*
- * Need to lock drawlock for ourselves.
- */
-void
-swenable(VGAscr *v)
-{
-	swenabled = 1;
-	if(canqlock(&drawlock)){
-		swcursordraw();
-		qunlock(&drawlock);
-	}
-}
-
-void
-swdisable(VGAscr *v)
-{
-	swenabled = 0;
-	if(canqlock(&drawlock)){
-		swcursorhide();
-		qunlock(&drawlock);
-	}
-}
-
-void
-swload(VGAscr *v, Cursor *curs)
-{
-	unsigned char *ip, *mp;
-	int i, j, set, clr;
-
-	if(!swimg || !swmask || !swimg1 || !swmask1)
-		return;
-	/*
-	 * Build cursor image and mask.
-	 * Image is just the usual cursor image
-	 * but mask is a transparent alpha mask.
-	 * 
-	 * The 16x16x8 memimages do not have
-	 * padding at the end of their scan lines.
-	 */
-	ip = byteaddr(swimg, ZP);
-	mp = byteaddr(swmask, ZP);
-	for(i=0; i<32; i++){
-		set = curs->set[i];
-		clr = curs->clr[i];
-		for(j=0x80; j; j>>=1){
-			*ip++ = set&j ? 0x00 : 0xFF;
-			*mp++ = (clr|set)&j ? 0xFF : 0x00;
+	for(p = pcimatch(nil, 0, 0); p != nil; p = pcimatch(p, 0, 0)){
+		for(i=0; i<nelem(p->mem); i++){
+			if(p->mem[i].bar & 1)
+				continue;
+			start = p->mem[i].bar & ~0xF;
+			end = start + p->mem[i].size;
+			if(pa == start && (pa + sz) <= end){
+				scr->pci = p;
+				return vgalinearpci0(scr);
+			}
 		}
 	}
-	swoffset = curs->offset;
-	swvers++;
-	memimagedraw(swimg1, swimg1->r, swimg, ZP, memopaque, ZP, S);
-	memimagedraw(swmask1, swmask1->r, swmask, ZP, memopaque, ZP, S);
+	return vgalinearaddr0(scr, pa, sz);
 }
 
-int
-swmove(VGAscr *v, Point p)
+char*
+rgbmask2chan(char *buf, int depth, uint32_t rm, uint32_t gm, uint32_t bm)
 {
-	swpt = addpt(p, swoffset);
-	return 0;
-}
+	uint32_t m[4], dm;	/* r,g,b,x */
+	char tmp[32];
+	int c, n;
 
-void
-swcursorclock(void)
-{
-	int x;
-	if(!swenabled)
-		return;
-	if(swvisible && eqpt(swpt, swvispt) && swvers==swvisvers)
-		return;
+	dm = 1<<depth-1;
+	dm |= dm-1;
 
-	x = splhi();
-	if(swenabled)
-	if(!swvisible || !eqpt(swpt, swvispt) || swvers!=swvisvers)
-	if(canqlock(&drawlock)){
-		swcursorhide();
-		swcursordraw();
-		qunlock(&drawlock);
+	m[0] = rm & dm;
+	m[1] = gm & dm;
+	m[2] = bm & dm;
+	m[3] = (~(m[0] | m[1] | m[2])) & dm;
+
+	buf[0] = 0;
+Next:
+	for(c=0; c<4; c++){
+		for(n = 0; m[c] & (1<<n); n++)
+			;
+		if(n){
+			m[0] >>= n, m[1] >>= n, m[2] >>= n, m[3] >>= n;
+			snprint(tmp, sizeof tmp, "%c%d%s", "rgbx"[c], n, buf);
+			strcpy(buf, tmp);
+			goto Next;
+		}
 	}
-	splx(x);
+	return buf;
 }
 
+/*
+ * called early on boot to attach to framebuffer
+ * setup by bootloader/firmware or plan9.
+ */
 void
-swcursorinit(void)
+bootscreeninit(void)
 {
-	static int init, warned;
+	static Memdata md;
 	VGAscr *scr;
-	didswcursorinit = 1;
+	int x, y, z;
+	uint32_t chan, pa, sz;
+	char *s, *p, *err;
+
+	/* *bootscreen=WIDTHxHEIGHTxDEPTH CHAN PA [SZ] */
+	s = getconf("*bootscreen");
+	if(s == nil)
+		return;
+
+	x = strtoul(s, &s, 0);
+	if(x == 0 || *s++ != 'x')
+		return;
+
+	y = strtoul(s, &s, 0);
+	if(y == 0 || *s++ != 'x')
+		return;
+
+	z = strtoul(s, &s, 0);
+	if(*s != ' ')
+		return;
+	if((p = strchr(++s, ' ')) == nil)
+		return;
+	*p = 0;
+	chan = strtochan(s);
+	*p = ' ';
+	if(chan == 0 || chantodepth(chan) != z)
+		return;
+
+	sz = 0;
+	pa = strtoul(p+1, &s, 0);
+	if(pa == 0)
+		return;
+	if(*s++ == ' ')
+		sz = strtoul(s, nil, 0);
+	if(sz < x * y * (z+7)/8)
+		sz = x * y * (z+7)/8;
+
+	/* map framebuffer */
 	scr = &vgascreen[0];
-	if(scr==nil || scr->gscreen==nil)
-		return;
-
-	if(scr->dev == nil || scr->dev->linear == nil){
-		if(!warned){
-			jehanne_print("cannot use software cursor on non-linear vga screen\n");
-			warned = 1;
-		}
+	if((err = bootmapfb(scr, pa, sz)) != nil){
+		print("bootmapfb: %s\n", err);
 		return;
 	}
 
-	if(swback){
-		freememimage(swback);
-		freememimage(swmask);
-		freememimage(swmask1);
-		freememimage(swimg);
-		freememimage(swimg1);
-	}
-
-	swback = allocmemimage(Rect(0,0,32,32), gscreen->chan);
-	swmask = allocmemimage(Rect(0,0,16,16), GREY8);
-	swmask1 = allocmemimage(Rect(0,0,16,16), GREY1);
-	swimg = allocmemimage(Rect(0,0,16,16), GREY8);
-	swimg1 = allocmemimage(Rect(0,0,16,16), GREY1);
-	if(swback==nil || swmask==nil || swmask1==nil || swimg==nil || swimg1 == nil){
-		jehanne_print("software cursor: allocmemimage fails");
+	if(memimageinit() < 0)
 		return;
-	}
 
-	memfillcolor(swmask, DOpaque);
-	memfillcolor(swmask1, DOpaque);
-	memfillcolor(swimg, DBlack);
-	memfillcolor(swimg1, DBlack);
-	if(!init){
-		init = 1;
-		addclock0link(swcursorclock, 10);
-	}
+	md.ref = 1;
+	md.bdata = scr->vaddr;
+	gscreen = allocmemimaged(Rect(0,0,x,y), chan, &md);
+	if(gscreen == nil)
+		return;
+
+	scr->palettedepth = 6;	/* default */
+	scr->memdefont = getmemdefont();
+	scr->gscreen = gscreen;
+	scr->gscreendata = gscreen->data;
+	scr->softscreen = 0;
+	scr->useflush = 0;
+	scr->dev = nil;
+
+	physgscreenr = gscreen->r;
+
+	vgaimageinit(chan);
+	vgascreenwin(scr);
+
+	/* turn mouse cursor on */
+	swcursorinit();
+	scr->cur = &swcursor;
+	scr->cur->enable(scr);
+	cursoron();
+
+	sys->monitor = 1;
 }
 
-VGAcur swcursor =
+/*
+ * called from devvga when the framebuffer is setup
+ * to set *bootscreen= that can be passed on to a
+ * new kernel on reboot.
+ */
+void
+bootscreenconf(VGAscr *scr)
 {
-	"soft",
-	swenable,
-	swdisable,
-	swload,
-	swmove,
-};
-
-// A bit hokey but it saves dumbness in the build tool and other code.
-VGAcur vgavesacur =
-{
-	"vesa",
-	swenable,
-	swdisable,
-	swload,
-	swmove,
-};
+	char conf[100], chan[30];
 
+	conf[0] = '\0';
+	if(scr != nil && scr->paddr != 0 && scr->gscreen != nil)
+		snprint(conf, sizeof(conf), "%dx%dx%d %s %#p %d\n",
+			scr->gscreen->r.max.x, scr->gscreen->r.max.y,
+			scr->gscreen->depth, chantostr(chan, scr->gscreen->chan),
+			scr->paddr, scr->apsize);
+	ksetenv("*bootscreen", conf, 1);
+}
diff --git a/sys/src/kern/amd64/screen.h b/sys/src/kern/amd64/screen.h
index 35d4435..eea18c3 100644
--- a/sys/src/kern/amd64/screen.h
+++ b/sys/src/kern/amd64/screen.h
@@ -1,21 +1,13 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-
 typedef struct Cursor Cursor;
 typedef struct Cursorinfo Cursorinfo;
 struct Cursorinfo {
-	Cursor c;
-	Lock l;
+	Cursor;
+	Lock;
 };
 
 /* devmouse.c */
-extern void mousetrack(int, int, int, int);
+extern void mousetrack(int, int, int, uint32_t);
+extern void absmousetrack(int, int, int, uint32_t);
 extern Point mousexy(void);
 
 extern void mouseaccelerate(int);
@@ -61,8 +53,8 @@ enum {
 #define vgai(port)		inb(port)
 #define vgao(port, data)	outb(port, data)
 
-extern int vgaxi(int32_t, unsigned char);
-extern int vgaxo(int32_t, unsigned char, unsigned char);
+extern int vgaxi(int32_t port, uint8_t index);
+extern int vgaxo(int32_t port, uint8_t index, uint8_t data);
 
 /*
  */
@@ -103,16 +95,16 @@ struct VGAscr {
 	Pcidev*	pci;
 
 	VGAcur*	cur;
-	uint32_t	storage;
-	Cursor Cursor;
+	uintptr_t	storage;
+	Cursor;
 
 	int	useflush;
 
-	uint32_t	paddr;		/* frame buffer */
+	uintptr_t	paddr;		/* frame buffer */
 	void*	vaddr;
-	int		apsize;
+	int	apsize;
 
-	uint32_t	io;				/* device specific registers */
+	uint32_t	io;		/* device specific registers */
 	uint32_t	*mmio;
 	
 	uint32_t	colormap[Pcolours][3];
@@ -126,8 +118,8 @@ struct VGAscr {
 	int	(*scroll)(VGAscr*, Rectangle, Rectangle);
 	void	(*blank)(VGAscr*, int);
 	uint32_t	id;	/* internal identifier for driver use */
-	int isblank;
-	int overlayinit;
+	int	overlayinit;
+	int	softscreen;
 };
 
 extern VGAscr vgascreen[];
@@ -137,23 +129,28 @@ enum {
 };
 
 /* mouse.c */
-extern void mousectl(Cmdbuf*);
-extern void mouseresize(void);
+extern void	mousectl(Cmdbuf*);
+extern void	mouseresize(void);
+extern void	mouseredraw(void);
 
 /* screen.c */
-extern int		hwaccel;	/* use hw acceleration; default on */
-extern int		hwblank;	/* use hw blanking; default on */
-extern int		panning;	/* use virtual screen panning; default off */
+extern int		hwaccel;	/* use hw acceleration */
+extern int		hwblank;	/* use hw blanking */
+extern int		panning;	/* use virtual screen panning */
 extern void addvgaseg(char*, uint32_t, uint32_t);
-extern unsigned char* attachscreen(Rectangle*, uint32_t*, int*, int*, int*);
+extern uint8_t* attachscreen(Rectangle*, uint32_t*, int*, int*, int*);
 extern void	flushmemscreen(Rectangle);
-extern int	cursoron(int);
-extern void	cursoroff(int);
+extern void	cursoron(void);
+extern void	cursoroff(void);
 extern void	setcursor(Cursor*);
 extern int	screensize(int, int, int, uint32_t);
 extern int	screenaperture(int, int);
 extern Rectangle physgscreenr;	/* actual monitor size */
 extern void	blankscreen(int);
+extern char*	rgbmask2chan(char *buf, int depth, uint32_t rm, uint32_t gm, uint32_t bm);
+
+extern void	bootscreeninit(void);
+extern void	bootscreenconf(VGAscr*);
 
 extern VGAcur swcursor;
 extern void swcursorinit(void);
@@ -165,22 +162,25 @@ extern void swcursorunhide(void);
 extern void	deletescreenimage(void);
 extern void	resetscreenimage(void);
 extern int		drawhasclients(void);
-extern uint32_t	blanktime;
 extern void	setscreenimageclipr(Rectangle);
 extern void	drawflush(void);
-extern int drawidletime(void);
 extern QLock	drawlock;
 
 /* vga.c */
 extern void	vgascreenwin(VGAscr*);
 extern void	vgaimageinit(uint32_t);
-extern void	vgalinearpciid(VGAscr*, int, int);
 extern void	vgalinearpci(VGAscr*);
 extern void	vgalinearaddr(VGAscr*, uint32_t, int);
 
-extern void	drawblankscreen(int);
 extern void	vgablank(VGAscr*, int);
 
 extern Lock	vgascreenlock;
 
 #define ishwimage(i)	(vgascreen[0].gscreendata && (i)->data->bdata == vgascreen[0].gscreendata->bdata)
+
+/* swcursor.c */
+void		swcursorhide(void);
+void		swcursoravoid(Rectangle);
+void		swcursordraw(Point);
+void		swcursorload(Cursor *);
+void		swcursorinit(void);
diff --git a/sys/src/kern/amd64/sdahci.c b/sys/src/kern/amd64/sdahci.c
index 4dd2e48..42b08d4 100644
--- a/sys/src/kern/amd64/sdahci.c
+++ b/sys/src/kern/amd64/sdahci.c
@@ -11,7 +11,7 @@
 #include "io.h"
 #include "../port/error.h"
 #include "../port/sd.h"
-#include "../386/fis.h"
+#include "fis.h"
 #include "../port/sdfis.h"
 #include "ahci.h"
 #include "../port/led.h"
diff --git a/sys/src/kern/amd64/sdata.c b/sys/src/kern/amd64/sdata.c
index b5fec17..26c9e5a 100644
--- a/sys/src/kern/amd64/sdata.c
+++ b/sys/src/kern/amd64/sdata.c
@@ -2185,7 +2185,7 @@ atadisable(SDev *sdev)
 	if (ctlr->idisable)
 		ctlr->idisable(ctlr);
 	jehanne_snprint(name, sizeof(name), "%s (%s)", sdev->name, sdev->ifc->name);
-	intrdisable(ctlr->vector);
+	intrdisable(ctlr->irq, atainterrupt, ctlr, ctlr->tbdf, name);
 	if (ctlr->bmiba) {
 		if (ctlr->pcidev)
 			pciclrbme(ctlr->pcidev);
diff --git a/sys/src/kern/386/sdiahci.c b/sys/src/kern/amd64/sdiahci.c
similarity index 99%
rename from sys/src/kern/386/sdiahci.c
rename to sys/src/kern/amd64/sdiahci.c
index 1c295fd..3ca1c64 100644
--- a/sys/src/kern/386/sdiahci.c
+++ b/sys/src/kern/amd64/sdiahci.c
@@ -1471,7 +1471,7 @@ iadisable(SDev *s)
 	ilock(c);
 	ahcidisable(c->hba);
 	jehanne_snprint(name, sizeof name, "%s (%s)", s->name, s->ifc->name);
-	intrdisable(c->vector);
+	intrdisable(c->pci->intl, iainterrupt, c, c->pci->tbdf, name);
 	c->enabled = 0;
 	iunlock(c);
 	return 1;
diff --git a/sys/src/kern/386/sdscsi.c b/sys/src/kern/amd64/sdscsi.c
similarity index 99%
rename from sys/src/kern/386/sdscsi.c
rename to sys/src/kern/amd64/sdscsi.c
index 8ff6093..748fa7d 100644
--- a/sys/src/kern/386/sdscsi.c
+++ b/sys/src/kern/amd64/sdscsi.c
@@ -475,4 +475,3 @@ again:
 
 	return rlen;
 }
-
diff --git a/sys/src/kern/amd64/sipi.c b/sys/src/kern/amd64/sipi.c
deleted file mode 100644
index 8c95e81..0000000
--- a/sys/src/kern/amd64/sipi.c
+++ /dev/null
@@ -1,122 +0,0 @@
-#include "u.h"
-#include "../port/lib.h"
-#include "mem.h"
-#include "dat.h"
-#include "fns.h"
-
-#include "apic.h"
-#include "sipi.h"
-
-#define SIPIHANDLER	(KZERO+0x3000)
-
-/*
- * Parameters are passed to the bootstrap code via a vector
- * in low memory indexed by the APIC number of the processor.
- * The layout, size, and location have to be kept in sync
- * with the handler code in l64sipi.s.
- */
-typedef struct Sipi Sipi;
-struct Sipi {
-	uint32_t	pml4;
-	uint32_t	_4_;
-	uintptr_t	stack;
-	Mach*	mach;
-	uintptr_t	pc;
-};
-
-void
-sipi(void)
-{
-	Lapic *apic;
-	Mach *mach;
-	Sipi *sipi;
-	int apicno, i, nproc;
-	uint8_t *sipiptr;
-	uintmem sipipa;
-	uint8_t *alloc, *p;
-	extern void squidboy(int);
-
-	/*
-	 * Move the startup code into place,
-	 * must be aligned properly.
-	 */
-	sipipa = mmuphysaddr(SIPIHANDLER);
-	if((sipipa & (4*KiB - 1)) || sipipa > (1*MiB - 2*4*KiB))
-		return;
-	sipiptr = UINT2PTR(SIPIHANDLER);
-	jehanne_memmove(sipiptr, sipihandler, sizeof(sipihandler));
-	jehanne_memset(sipiptr+4*KiB, 0, sizeof(Sipi)*Napic);
-
-	/*
-	 * Notes:
-	 * The Universal Startup Algorithm described in the MP Spec. 1.4.
-	 * The data needed per-processor is the sum of the stack, page
-	 * table pages, vsvm page and the Mach page. The layout is similar
-	 * to that described in data.h for the bootstrap processor, but
-	 * with any unused space elided.
-	 */
-	nproc = 0;
-	for(apicno = 0; apicno < Napic; apicno++){
-		apic = lapiclookup(apicno);
-		if(apic == nil || !apic->useable || apic->machno == 0)
-			continue;
-		if(++nproc >= MACHMAX){
-			jehanne_print("sipi: MACHMAX too small, need %d\n", nproc);
-			break;
-		}
-		sipi = &((Sipi*)(sipiptr+4*KiB))[apicno];
-
-		/*
-		 * NOTE: for now, share the page tables with the
-		 * bootstrap processor, until this code is worked out,
-		 * so only the Mach and stack portions are used below.
-		 */
-		alloc = jehanne_mallocalign(MACHSTKSZ+4*PTSZ+4*KiB+MACHSZ, 4096, 0, 0);
-		if(alloc == nil)
-			continue;
-		jehanne_memset(alloc, 0, MACHSTKSZ+4*PTSZ+4*KiB+MACHSZ);
-		p = alloc+MACHSTKSZ;
-
-		sipi->pml4 = cr3get();
-		sipi->stack = PTR2UINT(p);
-
-		p += 4*PTSZ+4*KiB;
-
-		/*
-		 * Committed. If the AP startup fails, can't safely
-		 * release the resources, who knows what mischief
-		 * the AP is up to. Perhaps should try to put it
-		 * back into the INIT state?
-		 */
-		mach = (Mach*)p;
-		sipi->mach = mach;
-		mach->machno = apic->machno;		/* NOT one-to-one... */
-		mach->splpc = PTR2UINT(squidboy);
-		sipi->pc = mach->splpc;
-		mach->apicno = apicno;
-		mach->stack = PTR2UINT(alloc);
-		mach->vsvm = alloc+MACHSTKSZ+4*PTSZ;
-		mach->pml4 = m->pml4;
-
-		p = KADDR(0x467);
-		*p++ = sipipa;
-		*p++ = sipipa>>8;
-		*p++ = 0;
-		*p = 0;
-
-		nvramwrite(0x0f, 0x0a);
-		lapicsipi(apicno, sipipa);
-
-		for(i = 0; i < 1000; i++){
-			if(mach->splpc == 0)
-				break;
-			millidelay(5);
-		}
-		nvramwrite(0x0f, 0x00);
-
-		DBG("apicno%d: machno %d mach %#p (%#p) %dMHz\n",
-			apicno, mach->machno,
-			mach, sys->machptr[mach->machno],
-			mach->cpumhz);
-	}
-}
diff --git a/sys/src/kern/amd64/squidboy.c b/sys/src/kern/amd64/squidboy.c
new file mode 100644
index 0000000..fc53877
--- /dev/null
+++ b/sys/src/kern/amd64/squidboy.c
@@ -0,0 +1,107 @@
+#include "u.h"
+#include "../port/lib.h"
+#include "mem.h"
+#include "dat.h"
+#include "fns.h"
+#include "io.h"
+#include "ureg.h"
+
+#include "mp.h"
+
+extern void initialize_processor(void);
+
+static void
+squidboy(Apic* apic)
+{
+	initialize_processor();
+	mmuinit();
+	cpuidentify();
+	cpuidprint();
+	syncclock();
+	active.machs[m->machno] = 1;
+	apic->online = 1;
+	m->online = 1;
+	lapicinit(apic);
+	lapiconline();
+	timersinit();
+	schedinit();
+}
+
+void
+mpstartap(Apic* apic)
+{
+	uintptr_t *apbootp, *pml4, *pdp0;
+	Segdesc *gdt;
+	Mach *mach;
+	uint8_t *p;
+	int i;
+
+	/*
+	 * Initialise the AP page-tables and Mach structure.
+	 * Xspanalloc will panic if an allocation can't be made.
+	 */
+	p = xspanalloc(2*PTSZ + BY2PG + MACHSIZE, BY2PG, 0);
+	pml4 = (uintptr*)p;
+	p += PTSZ;
+	pdp0 = (uintptr*)p;
+	p += PTSZ;
+	gdt = (Segdesc*)p;
+	p += BY2PG;
+	mach = (Mach*)p;
+
+	memset(pml4, 0, PTSZ);
+	memset(pdp0, 0, PTSZ);
+	memset(gdt, 0, BY2PG);
+	memset(mach, 0, MACHSIZE);
+
+	mach->machno = apic->machno;
+	mach->pml4 = pml4;
+	mach->gdt  = gdt;	/* filled by mmuinit */
+	MACHP(mach->machno) = mach;
+
+	/*
+	 * map KZERO (note that we share the KZERO (and VMAP)
+	 * PDP between processors.
+	 */
+	pml4[PTLX(KZERO, 3)] = MACHP(0)->pml4[PTLX(KZERO, 3)];
+	pml4[PTLX(VMAP, 3)] = MACHP(0)->pml4[PTLX(VMAP, 3)];
+
+	/* double map */
+	pml4[0] = PADDR(pdp0) | PTEWRITE|PTEVALID;
+	pdp0[0] = *mmuwalk(pml4, KZERO, 2, 0);
+
+	/*
+	 * Tell the AP where its kernel vector and pdb are.
+	 * The offsets are known in the AP bootstrap code.
+	 */
+	apbootp = (uintptr*)(APBOOTSTRAP+0x08);
+	apbootp[0] = (uintptr)squidboy;	/* assembler jumps here eventually */
+	apbootp[1] = (uintptr)PADDR(pml4);
+	apbootp[2] = (uintptr)apic;
+	apbootp[3] = (uintptr)mach;
+
+	/*
+	 * Universal Startup Algorithm.
+	 */
+	p = KADDR(0x467);		/* warm-reset vector */
+	*p++ = PADDR(APBOOTSTRAP);
+	*p++ = PADDR(APBOOTSTRAP)>>8;
+	i = (PADDR(APBOOTSTRAP) & ~0xFFFF)/16;
+	/* code assumes i==0 */
+	if(i != 0)
+		print("mp: bad APBOOTSTRAP\n");
+	*p++ = i;
+	*p = i>>8;
+	coherence();
+
+	nvramwrite(0x0F, 0x0A);		/* shutdown code: warm reset upon init ipi */
+	lapicstartap(apic, PADDR(APBOOTSTRAP));
+	for(i = 0; i < 100000; i++){
+		if(arch->fastclock == tscticks)
+			cycles(&m->tscticks);	/* for ap's syncclock(); */
+		if(apic->online)
+			break;
+		delay(1);
+	}
+	nvramwrite(0x0F, 0x00);
+}
diff --git a/sys/src/kern/amd64/syscall.c b/sys/src/kern/amd64/syscall.c
index a44453a..206094c 100644
--- a/sys/src/kern/amd64/syscall.c
+++ b/sys/src/kern/amd64/syscall.c
@@ -46,7 +46,6 @@ static void
 noted(Ureg* cur, uintptr_t arg0)
 {
 	NFrame *nf;
-	Note note;
 	Ureg *nur;
 
 	qlock(&up->debug);
@@ -55,11 +54,13 @@ noted(Ureg* cur, uintptr_t arg0)
 		pprint("suicide: call to noted when not notified\n");
 		pexit("Suicide", 0);
 	}
+	awake_gc_note(up);
 	up->notified = 0;
-	fpunoted();
 
 	nf = up->ureg;
 
+	up->fpstate &= ~FPillegal;
+
 	/* sanity clause */
 	if(!okaddr(PTR2UINT(nf), sizeof(NFrame), 0)){
 		qunlock(&up->debug);
@@ -115,17 +116,13 @@ noted(Ureg* cur, uintptr_t arg0)
 		cur->sp = PTR2UINT(nf);
 		break;
 	default:
-		jehanne_memmove(&note, &up->lastnote, sizeof(Note));
-		qunlock(&up->debug);
-		pprint("suicide: bad arg %#p in noted: %s\n", arg0, note.msg);
-		pexit(note.msg, 0);
-		break;
+		up->lastnote.flag = NDebug;
+		/* fall through */
 	case NDFLT:
-		jehanne_memmove(&note, &up->lastnote, sizeof(Note));
 		qunlock(&up->debug);
-		if(note.flag == NDebug)
-			pprint("suicide: %s\n", note.msg);
-		pexit(note.msg, note.flag != NDebug);
+		if(up->lastnote.flag == NDebug)
+			pprint("suicide: %s\n", up->lastnote.msg);
+		pexit(up->lastnote.msg, up->lastnote.flag != NDebug);
 		break;
 	}
 }
@@ -148,7 +145,11 @@ notify(Ureg* ureg)
 	if(up->nnote == 0)
 		return 0;
 
-	fpunotify(ureg);
+	if(up->fpstate == FPactive){
+		fpsave(&up->fpsave);
+		up->fpstate = FPinactive;
+	}
+	up->fpstate |= FPillegal;
 
 	s = spllo();
 	qlock(&up->debug);
@@ -238,7 +239,6 @@ syscall(Syscalls scallnr, Ureg* ureg)
 	m->syscall++;
 	up->inkernel = 1;
 	up->cursyscall = (Syscalls)scallnr;
-	up->blockingsc = 0;
 	up->pc = ureg->ip;
 	up->dbgreg = ureg;
 	if(up->trace && (pt = proctrace) != nil)
@@ -250,8 +250,6 @@ syscall(Syscalls scallnr, Ureg* ureg)
 	}
 
 	up->scallnr = scallnr;
-	if(scallnr == SysRfork)
-		fpusysrfork(ureg);
 	spllo();
 
 	startns = 0;
@@ -355,13 +353,8 @@ syscall(Syscalls scallnr, Ureg* ureg)
 	splhi();
 	if(scallnr != SysRfork && (up->procctl || up->nnote))
 		notify(ureg);
-	else if(up->blockingsc){
-		if(up->blockingsc != scallnr)
-			panic("syscall: up->blockingsc dirty");
-		if(canwakeup(scallnr))
-			awokeproc(up);
-		up->blockingsc = 0;
-	}
+	else
+		awake_awakened(up);	// we are not sleeping after all!
 
 	/* if we delayed sched because we held a lock, sched now */
 	if(up->delaysched){
@@ -412,7 +405,9 @@ sysexecregs(uintptr_t entry, uint32_t ssize)
 	ureg = up->dbgreg;
 	ureg->sp = PTR2UINT(sp);
 	ureg->ip = entry;
-	ureg->type = 64;			/* fiction for acid */
+	ureg->cs = UESEL;
+	ureg->ss = UDSEL;
+	ureg->r14 = ureg->r15 = 0;	/* extern user registers */
 	ureg->r12 = up->pid;
 
 	/*
@@ -425,7 +420,9 @@ sysexecregs(uintptr_t entry, uint32_t ssize)
 void
 sysprocsetup(Proc* p)
 {
-	fpusysprocsetup(p);
+	fpprocsetup(p);
+	cycles(&p->kentry);
+	p->pcycles = -p->kentry;
 }
 
 void
@@ -448,9 +445,9 @@ sysrforkchild(Proc* child, Proc* parent)
 	cureg = (Ureg*)(child->sched.sp+STACKPAD*BY2SE);
 	jehanne_memmove(cureg, parent->dbgreg, sizeof(Ureg));
 
+	cureg->ax = 0;
+
 	/* Things from bottom of syscall which were never executed */
 	child->psstate = 0;
 	child->inkernel = 0;
-
-	fpusysrforkchild(child, parent);
 }
diff --git a/sys/src/kern/amd64/trap.c b/sys/src/kern/amd64/trap.c
index f80c95d..dc1abd8 100644
--- a/sys/src/kern/amd64/trap.c
+++ b/sys/src/kern/amd64/trap.c
@@ -30,6 +30,8 @@
 
 #include	"amd64.h"
 
+static int trapinited;
+
 extern int notify(Ureg*);
 
 static void debugbpt(Ureg*, void*);
@@ -54,12 +56,19 @@ intrenable(int irq, void (*f)(Ureg*, void*), void* a, int tbdf, char *name)
 	Vctl *v;
 
 	if(f == nil){
-		jehanne_print("intrenable: nil handler for %d, tbdf %#ux for %s\n",
+		print("intrenable: nil handler for %d, tbdf 0x%uX for %s\n",
 			irq, tbdf, name);
 		return nil;
 	}
 
-	v = jehanne_malloc(sizeof(Vctl));
+	if(tbdf != BUSUNKNOWN && (irq == 0xff || irq == 0)){
+		print("intrenable: got unassigned irq %d, tbdf 0x%uX for %s\n",
+			irq, tbdf, name);
+		irq = -1;
+	}
+
+	if((v = xalloc(sizeof(Vctl))) == nil)
+		panic("intrenable: out of memory");
 	v->isintr = 1;
 	v->irq = irq;
 	v->tbdf = tbdf;
@@ -69,28 +78,24 @@ intrenable(int irq, void (*f)(Ureg*, void*), void* a, int tbdf, char *name)
 	v->name[KNAMELEN-1] = 0;
 
 	ilock(&vctllock);
-	vno = ioapicintrenable(v);
+	vno = arch->intrenable(v);
 	if(vno == -1){
 		iunlock(&vctllock);
-		jehanne_print("intrenable: couldn't enable irq %d, tbdf %#ux for %s\n",
+		print("intrenable: couldn't enable irq %d, tbdf 0x%uX for %s\n",
 			irq, tbdf, v->name);
-		jehanne_free(v);
+		xfree(v);
 		return nil;
 	}
 	if(vctl[vno]){
-		if(vctl[v->vno]->isr != v->isr || vctl[v->vno]->eoi != v->eoi)
+		if(vctl[vno]->isr != v->isr || vctl[vno]->eoi != v->eoi)
 			panic("intrenable: handler: %s %s %#p %#p %#p %#p",
-				vctl[v->vno]->name, v->name,
-				vctl[v->vno]->isr, v->isr, vctl[v->vno]->eoi, v->eoi);
+				vctl[vno]->name, v->name,
+				vctl[vno]->isr, v->isr, vctl[vno]->eoi, v->eoi);
+		v->next = vctl[vno];
 	}
-	v->vno = vno;
-	v->next = vctl[vno];
 	vctl[vno] = v;
 	iunlock(&vctllock);
 
-	if(v->mask != nil)
-		v->mask(v, 0);
-
 	/*
 	 * Return the assigned vector so intrdisable can find
 	 * the handler; the IRQ is useless in the wondrefule world
@@ -100,26 +105,42 @@ intrenable(int irq, void (*f)(Ureg*, void*), void* a, int tbdf, char *name)
 }
 
 int
-intrdisable(void* vector)
+intrdisable(int irq, void (*f)(Ureg *, void *), void *a, int tbdf, char *name)
 {
-	Vctl *v, **vl;
+	Vctl **pv, *v;
+	int vno;
 
+	if(arch->intrvecno == nil || (tbdf != BUSUNKNOWN && (irq == 0xff || irq == 0))){
+		/*
+		 * on APIC machine, irq is pretty meaningless
+		 * and disabling a the vector is not implemented.
+		 * however, we still want to remove the matching
+		 * Vctl entry to prevent calling Vctl.f() with a
+		 * stale Vctl.a pointer.
+		 */
+		irq = -1;
+		vno = VectorPIC;
+	} else {
+		vno = arch->intrvecno(irq);
+	}
 	ilock(&vctllock);
-	v = vector;
-	for(vl = &vctl[v->vno]; *vl != nil; vl = &(*vl)->next)
-		if(*vl == v)
+	do {
+		for(pv = &vctl[vno]; (v = *pv) != nil; pv = &v->next){
+			if(v->isintr && (v->irq == irq || irq == -1)
+			&& v->tbdf == tbdf && v->f == f && v->a == a
+			&& strcmp(v->name, name) == 0)
+				break;
+		}
+		if(v != nil){
+			*pv = v->next;
+			xfree(v);
+
+			if(irq != -1 && vctl[vno] == nil && arch->intrdisable != nil)
+				arch->intrdisable(irq);
 			break;
-	if(*vl == nil)
-		panic("intrdisable: v %#p", v);
-	if(v->mask != nil)
-		v->mask(v, 1);
-	v->f(nil, v->a);
-	*vl = v->next;
-	ioapicintrdisable(v->vno);
+		}
+	} while(irq == -1 && ++vno <= MaxVectorAPIC);
 	iunlock(&vctllock);
-
-	jehanne_free(v);
-
 	return 0;
 }
 
@@ -167,9 +188,10 @@ trapenable(int vno, void (*f)(Ureg*, void*), void* a, char *name)
 {
 	Vctl *v;
 
-	if(vno < 0 || vno >= 256)
-		panic("trapenable: vno %d\n", vno);
-	v = jehanne_malloc(sizeof(Vctl));
+	if(vno < 0 || vno >= VectorPIC)
+		panic("trapenable: vno %d", vno);
+	if((v = xalloc(sizeof(Vctl))) == nil)
+		panic("trapenable: out of memory");
 	v->tbdf = BUSUNKNOWN;
 	v->f = f;
 	v->a = a;
@@ -177,7 +199,8 @@ trapenable(int vno, void (*f)(Ureg*, void*), void* a, char *name)
 	v->name[KNAMELEN-1] = 0;
 
 	ilock(&vctllock);
-	v->next = vctl[vno];
+	if(vctl[vno])
+		v->next = vctl[vno]->next;
 	vctl[vno] = v;
 	iunlock(&vctllock);
 }
@@ -194,10 +217,48 @@ nmienable(void)
 	outb(0x70, 0);
 
 	x = inb(0x61) & 0x07;		/* Enable NMI */
-	outb(0x61, 0x08|x);
+	outb(0x61, 0x0C|x);
 	outb(0x61, x);
 }
 
+void
+trapinit0(void)
+{
+	uint32_t d1, v;
+	uintptr_t vaddr;
+	Segdesc *idt;
+
+	idt = (Segdesc*)IDTADDR;
+	vaddr = (uintptr_t)idthandlers;
+	for(v = 0; v < 256; v++){
+		d1 = (vaddr & 0xFFFF0000)|SEGP;
+		switch(v){
+
+		case VectorBPT:
+			d1 |= SEGPL(3)|SEGIG;
+			break;
+
+		case VectorSYSCALL:
+			d1 |= SEGPL(3)|SEGIG;
+			break;
+
+		default:
+			d1 |= SEGPL(0)|SEGIG;
+			break;
+		}
+
+		idt->d0 = (vaddr & 0xFFFF)|(KESEL<<16);
+		idt->d1 = d1;
+		idt++;
+
+		idt->d0 = (vaddr >> 32);
+		idt->d1 = 0;
+		idt++;
+
+		vaddr += 6;
+	}
+}
+
 void
 trapinit(void)
 {
@@ -208,48 +269,50 @@ trapinit(void)
 	 * Special traps.
 	 * Syscall() is called directly without going through trap().
 	 */
-	trapenable(IdtBP, debugbpt, 0, "#BP");
-	trapenable(IdtPF, faultamd64, 0, "#PF");
-	trapenable(IdtDF, doublefault, 0, "#DF");
-	trapenable(Idt0F, unexpected, 0, "#15");
+//	trapenable(VectorDE, debugexc, 0, "debugexc");
+	trapenable(VectorBPT, debugbpt, 0, "debugpt");
+	trapenable(VectorPF, faultamd64, 0, "faultamd64");
+	trapenable(Vector2F, doublefault, 0, "doublefault");
+	trapenable(Vector15, unexpected, 0, "unexpected");
 	nmienable();
 
 	addarchfile("irqalloc", 0444, irqallocread, nil);
+	trapinited = 1;
 }
 
 static char* excname[32] = {
-	"#DE",					/* Divide-by-Zero Error */
-	"#DB",					/* Debug */
-	"#NMI",					/* Non-Maskable-Interrupt */
-	"#BP",					/* Breakpoint */
-	"#OF",					/* Overflow */
-	"#BR",					/* Bound-Range */
-	"#UD",					/* Invalid-Opcode */
-	"#NM",					/* Device-Not-Available */
-	"#DF",					/* Double-Fault */
-	"#9 (reserved)",
-	"#TS",					/* Invalid-TSS */
-	"#NP",					/* Segment-Not-Present */
-	"#SS",					/* Stack */
-	"#GP",					/* General-Protection */
-	"#PF",					/* Page-Fault */
-	"#15 (reserved)",
-	"#MF",					/* x87 FPE-Pending */
-	"#AC",					/* Alignment-Check */
-	"#MC",					/* Machine-Check */
-	"#XF",					/* SIMD Floating-Point */
-	"#20 (reserved)",
-	"#21 (reserved)",
-	"#22 (reserved)",
-	"#23 (reserved)",
-	"#24 (reserved)",
-	"#25 (reserved)",
-	"#26 (reserved)",
-	"#27 (reserved)",
-	"#28 (reserved)",
-	"#29 (reserved)",
-	"#30 (reserved)",
-	"#31 (reserved)",
+	"divide error",
+	"debug exception",
+	"nonmaskable interrupt",
+	"breakpoint",
+	"overflow",
+	"bounds check",
+	"invalid opcode",
+	"coprocessor not available",
+	"double fault",
+	"coprocessor segment overrun",
+	"invalid TSS",
+	"segment not present",
+	"stack exception",
+	"general protection violation",
+	"page fault",
+	"15 (reserved)",
+	"coprocessor error",
+	"alignment check",
+	"machine check",
+	"simd error",
+	"20 (reserved)",
+	"21 (reserved)",
+	"22 (reserved)",
+	"23 (reserved)",
+	"24 (reserved)",
+	"25 (reserved)",
+	"26 (reserved)",
+	"27 (reserved)",
+	"28 (reserved)",
+	"29 (reserved)",
+	"30 (reserved)",
+	"31 (reserved)",
 };
 
 /*
@@ -295,6 +358,13 @@ trap(Ureg* ureg)
 	char buf[ERRMAX];
 	Vctl *ctl, *v;
 
+	if(!trapinited){
+		/* faultamd64 can give a better error message */
+		if(ureg->type == VectorPF)
+			faultamd64(ureg, nil);
+		panic("trap %llud: not ready", ureg->type);
+	}
+
 	m->perf.intrts = perfticks();
 	user = userureg(ureg);
 	if(user){
@@ -305,10 +375,11 @@ trap(Ureg* ureg)
 	clockintr = 0;
 
 	vno = ureg->type;
+
 	if(ctl = vctl[vno]){
 		if(ctl->isintr){
 			m->intr++;
-			if(vno >= IdtPIC && vno != IdtSYSCALL)
+			if(vno >= VectorPIC)
 				m->lastintr = ctl->irq;
 		}
 		if(ctl->isr)
@@ -323,10 +394,8 @@ trap(Ureg* ureg)
 		if(ctl->isintr){
 			intrtime(m, vno);
 
-			if(ctl->irq == IdtPIC+IrqCLOCK || ctl->irq == IdtTIMER){
-				checkflushmmu();
+			if(ctl->irq == IrqCLOCK || ctl->irq == IrqTIMER)
 				clockintr = 1;
-			}
 
 			if(up && !clockintr)
 				preempted();
@@ -373,33 +442,37 @@ trap(Ureg* ureg)
 		return;
 	}
 	else{
-		if(vno == IdtNMI){
-			if(active.ispanic){
-				/*
-				 * Use of m->dbgsp avoids stack confusion
-				 * caused by writing the address of the SP to
-				 * the top of the stack.
-				 */
-				m->dbgreg = ureg;
-				m->dbgsp = &ureg->sp;
-				for(;;)
-					_halt();
-			}
-			if(m->perfintr != nil){
-				m->perfintr(ureg, nil);
-				nmienable();
-				return;
-			}
+		if(vno == VectorNMI){
+			/*
+			 * Don't re-enable, it confuses the crash dumps.
 			nmienable();
+			 */
+			iprint("cpu%d: nmi PC %#p, status %ux\n",
+				m->machno, ureg->ip, inb(0x61));
+			while(m->machno != 0)
+				;
 		}
-		if(vno == 39){
-			/* We get this one and didn't track it down yet: it's ok */
-			iprint("vno %d: buggeration @ %#p...\n", vno, ureg->ip);
-		}else if(vno < nelem(excname)){
-			dumpregs(ureg);
-			panic("%s pc %#p", excname[vno], ureg->ip);
-		}else
-			panic("unknown trap/intr: %d pc %#p\n", vno, ureg->ip);
+
+		if(!user){
+			void (*pc)(void);
+
+			extern void _rdmsrinst(void);
+			extern void _wrmsrinst(void);
+
+			pc = (void*)ureg->ip;
+			if(pc == _rdmsrinst || pc == _wrmsrinst){
+				if(vno == VectorGPF){
+					ureg->bp = -1;
+					ureg->ip += 2;
+					return;
+				}
+			}
+		}
+
+		dumpregs(ureg);
+		if(vno < nelem(excname))
+			panic("%s", excname[vno]);
+		panic("unknown trap/intr: %d", vno);
 	}
 	splhi();
 
@@ -581,23 +654,21 @@ faultamd64(Ureg* ureg, void* _1)
 	void (*pt)(Proc*, int, int64_t, int64_t);
 
 	addr = cr2get();
-	user = userureg(ureg);
-
-	/*
-	 * There must be a user context.
-	 * If not, the usual problem is causing a fault during
-	 * initialisation before the system is fully up.
-	 */
-	if(up == nil){
-		panic("fault with up == nil; pc %#llux addr %#llux\n",
-			ureg->ip, addr);
-	}
 	if(ureg->error&2)
 		ftype = FaultWrite;
 	else if(ureg->error&16)
 		ftype = FaultExecute;
 	else
 		ftype = FaultRead;
+	user = userureg(ureg);
+	if(!user){
+		if(addr >= USTKTOP)
+			panic("kernel fault: bad address pc=%#p addr=%#p", ureg->ip, addr);
+		if(up == nil)
+			panic("kernel fault: no user process pc=%#p addr=%#p", ureg->ip, addr);
+	}
+	if(up == nil)
+		panic("user fault: up=0 pc=%#p addr=%#p", ureg->ip, addr);
 
 	if(up->trace && (pt = proctrace) != nil){
 		if(ftype == FaultWrite)
@@ -617,7 +688,6 @@ if(iskaddr(addr)){
 	dumpregs(ureg);
 }
 	if(fault(addr, ureg->ip, ftype) < 0){
-		splhi();
 		if(!user){
 			dumpregs(ureg);
 			panic("fault: %#llux pc %#p\n", addr, ureg->ip);
diff --git a/sys/src/kern/386/uarti8250.c b/sys/src/kern/amd64/uarti8250.c
similarity index 87%
rename from sys/src/kern/386/uarti8250.c
rename to sys/src/kern/amd64/uarti8250.c
index 07328d6..fc5ace0 100644
--- a/sys/src/kern/386/uarti8250.c
+++ b/sys/src/kern/amd64/uarti8250.c
@@ -124,13 +124,11 @@ extern PhysUart i8250physuart;
 static Ctlr i8250ctlr[2] = {
 {	.io	= Uart0,
 	.irq	= Uart0IRQ,
-	.tbdf	= -1,
-	.poll	= 0, },
+	.tbdf	= -1, },
 
 {	.io	= Uart1,
 	.irq	= Uart1IRQ,
-	.tbdf	= -1,
-	.poll	= 0, },
+	.tbdf	= -1, },
 };
 
 static Uart i8250uart[2] = {
@@ -161,7 +159,7 @@ i8250status(Uart* uart, void* buf, long n, long offset)
 	uint8_t ier, lcr, mcr, msr;
 
 	ctlr = uart->regs;
-	p = jehanne_malloc(READSTR);
+	p = smalloc(READSTR);
 	mcr = ctlr->sticky[Mcr];
 	msr = csr8r(ctlr, Msr);
 	ier = ctlr->sticky[Ier];
@@ -482,13 +480,13 @@ i8250interrupt(Ureg* _1, void* arg)
 					uart->ctsbackoff = 2;
 				iunlock(&uart->tlock);
 			}
-		 	if(r & Ddsr){
+			if(r & Ddsr){
 				old = r & Dsr;
 				if(uart->hup_dsr && uart->dsr && !old)
 					uart->dohup = 1;
 				uart->dsr = old;
 			}
-		 	if(r & Ddcd){
+			if(r & Ddcd){
 				old = r & Dcd;
 				if(uart->hup_dcd && uart->dcd && !old)
 					uart->dohup = 1;
@@ -545,8 +543,8 @@ i8250disable(Uart* uart)
 	csr8w(ctlr, Ier, ctlr->sticky[Ier]);
 
 	if(ctlr->iena != 0){
-		if(intrdisable(ctlr->vector) == 0)
-			ctlr->iena = 0;
+		ctlr->iena = 0;
+		intrdisable(ctlr->irq, i8250interrupt, uart, ctlr->tbdf, uart->name);
 	}
 }
 
@@ -688,27 +686,6 @@ i8250putc(Uart* uart, int c)
 		delay(1);
 }
 
-static void
-i8250poll(Uart* uart)
-{
-	Ctlr *ctlr;
-
-	/*
-	 * If PhysUart has a non-nil .poll member, this
-	 * routine will be called from the uartclock timer.
-	 * If the Ctlr .poll member is non-zero, when the
-	 * Uart is enabled interrupts will not be enabled
-	 * and the result is polled input and output.
-	 * Not very useful here, but ports to new hardware
-	 * or simulators can use this to get serial I/O
-	 * without setting up the interrupt mechanism.
-	 */
-	ctlr = uart->regs;
-	if(ctlr->iena || !ctlr->poll)
-		return;
-	i8250interrupt(nil, uart);
-}
-
 PhysUart i8250physuart = {
 	.name		= "i8250",
 	.pnp		= i8250pnp,
@@ -727,73 +704,27 @@ PhysUart i8250physuart = {
 	.fifo		= i8250fifo,
 	.getc		= i8250getc,
 	.putc		= i8250putc,
-	.poll		= i8250poll,
 };
 
-Uart*
-i8250console(char* cfg)
+void
+i8250console(void)
 {
-	int i;
 	Uart *uart;
-	Ctlr *ctlr;
+	int n;
 	char *cmd, *p;
-	ISAConf isa;
 
-	/*
-	 * Before i8250pnp() is run can only set the console
-	 * to 0 or 1 because those are the only uart structs which
-	 * will be the same before and after that.
-	 */
-	if((p = getconf("console")) == nil && (p = cfg) == nil)
-		return nil;
-	i = jehanne_strtoul(p, &cmd, 0);
-	if(p == cmd)
-		return nil;
-//WTF? Something to do with the PCIe-only machine?
-	if((uart = uartconsole(i, cmd)) != nil){
-		consuart = uart;
-		return uart;
-	}
-	switch(i){
-	default:
-		return nil;
-	case 0:
-		uart = &i8250uart[0];
-		break;
-	case 1:
-		uart = &i8250uart[1];
-		break;
-	}
-
-//Madness. Something to do with the PCIe-only machine?
-	jehanne_memset(&isa, 0, sizeof(isa));
-	ctlr = uart->regs;
-	if(isaconfig("eia", i, &isa) != 0){
-		if(isa.port != 0)
-			ctlr->io = isa.port;
-		if(isa.irq != 0)
-			ctlr->irq = isa.irq;
-		if(isa.freq != 0)
-			uart->freq = isa.freq;
-	}
-
-	/*
-	 * Does it exist?
-	 * Should be able to write/read
-	 * the Scratch Pad.
-	 */
-//	ctlr = uart->regs;
-//	csr8o(ctlr, Scr, 0x55);
-//	if(csr8r(ctlr, Scr) != 0x55)
-//		return nil;
+	if((p = getconf("console")) == nil)
+		return;
+	n = strtoul(p, &cmd, 0);
+	if(p == cmd || n < 0 || n >= nelem(i8250uart))
+		return;
+	uart = &i8250uart[n];
 
 	(*uart->phys->enable)(uart, 0);
-	uartctl(uart, "b9600 l8 pn s1 i1");
+	uartctl(uart, "b9600 l8 pn s1");
 	if(*cmd != '\0')
 		uartctl(uart, cmd);
 
 	consuart = uart;
 	uart->console = 1;
-
-	return uart;
 }
diff --git a/sys/src/kern/386/uartpci.c b/sys/src/kern/amd64/uartpci.c
similarity index 100%
rename from sys/src/kern/386/uartpci.c
rename to sys/src/kern/amd64/uartpci.c
diff --git a/sys/src/kern/amd64/usbohci.c b/sys/src/kern/amd64/usbohci.c
index a276cbc..e75ee70 100644
--- a/sys/src/kern/amd64/usbohci.c
+++ b/sys/src/kern/amd64/usbohci.c
@@ -1485,7 +1485,7 @@ epio(Ep *ep, Qio *io, void *a, int32_t count, int mustlock)
 		jehanne_print("\t%s\n", buf);
 	}
 	if(mustlock){
-		qlock(&io->ql);
+		eqlock(&io->ql);
 		if(waserror()){
 			qunlock(&io->ql);
 			nexterror();
@@ -1625,7 +1625,7 @@ epread(Ep *ep, void *a, int32_t count)
 	switch(ep->ttype){
 	case Tctl:
 		cio = ep->aux;
-		qlock(&cio->ql);
+		eqlock(&cio->ql);
 		if(waserror()){
 			qunlock(&cio->ql);
 			nexterror();
@@ -1698,7 +1698,7 @@ epctlio(Ep *ep, Ctlio *cio, void *a, int32_t count)
 		cio, ep->dev->nb, ep->nb, count);
 	if(count < Rsetuplen)
 		error("short usb command");
-	qlock(&cio->ql);
+	eqlock(&cio->ql);
 	jehanne_free(cio->data);
 	cio->data = nil;
 	cio->ndata = 0;
@@ -1804,7 +1804,7 @@ episowrite(Ep *ep, void *a, int32_t count)
 	iso->delay = (ep->sampledelay*ep->samplesz + ep->maxpkt-1) / ep->maxpkt;
 	iso->debug = ep->debug;
 
-	qlock(&iso->ql);
+	eqlock(&iso->ql);
 	if(waserror()){
 		qunlock(&iso->ql);
 		nexterror();
@@ -2193,7 +2193,7 @@ portreset(Hci *hp, int port, int on)
 		return 0;
 
 	ctlr = hp->aux;
-	qlock(&ctlr->resetl);
+	eqlock(&ctlr->resetl);
 	if(waserror()){
 		qunlock(&ctlr->resetl);
 		nexterror();
@@ -2225,7 +2225,7 @@ portenable(Hci *hp, int port, int on)
 
 	ctlr = hp->aux;
 	dprint("ohci: %#p port %d enable=%d\n", ctlr->ohci, port, on);
-	qlock(&ctlr->resetl);
+	eqlock(&ctlr->resetl);
 	if(waserror()){
 		qunlock(&ctlr->resetl);
 		nexterror();
diff --git a/sys/src/kern/amd64/usbuhci.c b/sys/src/kern/amd64/usbuhci.c
index c073d2a..b883f08 100644
--- a/sys/src/kern/amd64/usbuhci.c
+++ b/sys/src/kern/amd64/usbuhci.c
@@ -1031,7 +1031,7 @@ episowrite(Ep *ep, Isoio *iso, void *a, int32_t count)
 	diprint("uhci: episowrite: %#p ep%d.%d\n", iso, ep->dev->nb, ep->nb);
 
 	ctlr = ep->hp->aux;
-	qlock(&iso->ql);
+	eqlock(&iso->ql);
 	if(waserror()){
 		qunlock(&iso->ql);
 		nexterror();
@@ -1102,7 +1102,7 @@ episoread(Ep *ep, Isoio *iso, void *a, int count)
 
 	b = a;
 	ctlr = ep->hp->aux;
-	qlock(&iso->ql);
+	eqlock(&iso->ql);
 	if(waserror()){
 		qunlock(&iso->ql);
 		nexterror();
@@ -1306,7 +1306,7 @@ epio(Ep *ep, Qio *io, void *a, int32_t count, int mustlock)
 		jehanne_print("uchi epio: user data: %s\n", buf);
 	}
 	if(mustlock){
-		qlock(&io->ql);
+		eqlock(&io->ql);
 		if(waserror()){
 			qunlock(&io->ql);
 			nexterror();
@@ -1452,7 +1452,7 @@ epread(Ep *ep, void *a, int32_t count)
 	switch(ep->ttype){
 	case Tctl:
 		cio = ep->aux;
-		qlock(&cio->ql);
+		eqlock(&cio->ql);
 		if(waserror()){
 			qunlock(&cio->ql);
 			nexterror();
@@ -1525,7 +1525,7 @@ epctlio(Ep *ep, Ctlio *cio, void *a, int32_t count)
 		cio, ep->dev->nb, ep->nb, count);
 	if(count < Rsetuplen)
 		error("short usb comand");
-	qlock(&cio->ql);
+	eqlock(&cio->ql);
 	jehanne_free(cio->data);
 	cio->data = nil;
 	cio->ndata = 0;
@@ -2013,7 +2013,7 @@ portenable(Hci *hp, int port, int on)
 	ctlr = hp->aux;
 	dprint("uhci: %#x port %d enable=%d\n", ctlr->port, port, on);
 	ioport = PORT(port-1);
-	qlock(&ctlr->portlck);
+	eqlock(&ctlr->portlck);
 	if(waserror()){
 		qunlock(&ctlr->portlck);
 		nexterror();
@@ -2070,7 +2070,7 @@ portstatus(Hci *hp, int port)
 
 	ctlr = hp->aux;
 	ioport = PORT(port-1);
-	qlock(&ctlr->portlck);
+	eqlock(&ctlr->portlck);
 	if(waserror()){
 		iunlock(&ctlr->l);
 		qunlock(&ctlr->portlck);
diff --git a/sys/src/kern/amd64/vga.c b/sys/src/kern/amd64/vga.c
index 276ebe0..0b8d596 100644
--- a/sys/src/kern/amd64/vga.c
+++ b/sys/src/kern/amd64/vga.c
@@ -225,7 +225,7 @@ vgascreenwin(VGAscr* scr)
 	window.max.y = window.min.y+((window.max.y-window.min.y)/h)*h;
 	curpos = window.min;
 
-	consputs = vgascreenputs;
+	screenputs = vgascreenputs;
 }
 
 /*
@@ -275,7 +275,7 @@ cornerstring(char *s)
 	Point p;
 
 	scr = &vgascreen[0];
-	if(scr->vaddr == nil || consputs != vgascreenputs)
+	if(scr->vaddr == nil || screenputs != vgascreenputs)
 		return;
 	p = memsubfontwidth(scr->memdefont, s);
 	w = p.x;
diff --git a/sys/src/kern/386/vga.h b/sys/src/kern/amd64/vga.h
similarity index 100%
rename from sys/src/kern/386/vga.h
rename to sys/src/kern/amd64/vga.h
diff --git a/sys/src/kern/386/vgavesa.c b/sys/src/kern/amd64/vgavesa.c
similarity index 98%
rename from sys/src/kern/386/vgavesa.c
rename to sys/src/kern/amd64/vgavesa.c
index 533d4a6..d7c214b 100644
--- a/sys/src/kern/386/vgavesa.c
+++ b/sys/src/kern/amd64/vgavesa.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * This file is part of the UCB release of Plan 9. It is subject to the license
  * terms in the LICENSE file found in the top-level directory of this
  * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
@@ -78,7 +78,6 @@ vbecall(VGAreg *u)
 	pa = PADDR(RMBUF);
 	cmem->dev->write(cmem, modebuf, sizeof modebuf, pa);
 	u->trap = 0x10;
-	jehanne_print("vbecall: sizeof u is %d\n", sizeof *u);
 	creg->dev->write(creg, u, sizeof *u, 0);
 
 	creg->dev->read(creg, u, sizeof *u, 0);
diff --git a/sys/src/kern/amd64/vgax.c b/sys/src/kern/amd64/vgax.c
index 6102241..fce2330 100644
--- a/sys/src/kern/amd64/vgax.c
+++ b/sys/src/kern/amd64/vgax.c
@@ -24,7 +24,7 @@
 static Lock vgaxlock;			/* access to index registers */
 
 int
-vgaxi(int32_t port, unsigned char index)
+vgaxi(int32_t port, uint8_t index)
 {
 	unsigned char data;
 
@@ -71,7 +71,7 @@ vgaxi(int32_t port, unsigned char index)
 }
 
 int
-vgaxo(int32_t port, unsigned char index, unsigned char data)
+vgaxo(int32_t port, uint8_t index, uint8_t data)
 {
 	ilock(&vgaxlock);
 	switch(port){
diff --git a/sys/src/kern/amd64/vsvm.c b/sys/src/kern/amd64/vsvm.c
deleted file mode 100644
index cf438de..0000000
--- a/sys/src/kern/amd64/vsvm.c
+++ /dev/null
@@ -1,192 +0,0 @@
-/*
- * Vestigial Segmented Virtual Memory.
- * To do:
- *	dynamic allocation and free of descriptors;
- *	IST should perhaps point to a different handler;
- *	user-level descriptors (if not dynamic).
- */
-#include "u.h"
-#include "../port/lib.h"
-#include "mem.h"
-#include "dat.h"
-#include "fns.h"
-
-#include "amd64.h"
-#include "ureg.h"
-
-typedef struct Gd Gd;
-typedef uint64_t Sd;
-typedef uint16_t Ss;
-typedef struct Tss Tss;
-
-struct Gd {
-	Sd	sd;
-	uint64_t	hi;
-};
-
-struct Tss {
-	uint32_t	_0_;
-	uint32_t	rsp0[2];
-	uint32_t	rsp1[2];
-	uint32_t	rsp2[2];
-	uint32_t	_28_[2];
-	uint32_t	ist[14];
-	uint16_t	_92_[5];
-	uint16_t	iomap;
-};
-
-enum {
-	Ngdt		= 16,			/* max. entries in gdt */
-	Nidt		= 256,			/* max. entries in idt */
-};
-
-static Sd gdt64[Ngdt] = {
-	0ull,					/* NULL descriptor */
-	SdL|SdP|SdDPL0|SdS|SdCODE,		/* CS */
-	SdG|SdD|SdP|SdDPL0|SdS|SdW,		/* DS */
-	SdG|SdD|SdP|SdDPL3|SdS|SdCODE|SdR|Sd4G,	/* User CS 32-bit */
-	SdG|SdD|SdP|SdDPL3|SdS|SdW|Sd4G,	/* User DS */
-	SdL|SdP|SdDPL3|SdS|SdCODE,		/* User CS 64-bit */
-
-	0ull,					/* FS */
-	0ull,					/* GS */
-
-	0ull,					/* TSS lower */
-	0ull,					/* TSS upper */
-};
-//static int ngdt64 = 10;	// not used
-
-static Gd idt64[Nidt];
-
-static Sd
-mksd(uint64_t base, uint64_t limit, uint64_t bits, uint64_t* upper)
-{
-	Sd sd;
-
-	sd = bits;
-	sd |= (((limit & 0x00000000000f0000ull)>>16)<<48)
-	     |(limit & 0x000000000000ffffull);
-	sd |= (((base & 0x00000000ff000000ull)>>24)<<56)
-	     |(((base & 0x0000000000ff0000ull)>>16)<<32)
-	     |((base & 0x000000000000ffffull)<<16);
-	if(upper != nil)
-		*upper = base>>32;
-
-	return sd;
-}
-
-static void
-mkgd(Gd* gd, uint64_t offset, Ss ss, uint64_t bits, int ist)
-{
-	Sd sd;
-
-	sd = bits;
-	sd |= (((offset & 0x00000000ffff0000ull)>>16)<<48)
-	     |(offset & 0x000000000000ffffull);
-	sd |= ((ss & 0x000000000000ffffull)<<16);
-	sd |= (ist & (SdISTM>>32))<<32;
-	gd->sd = sd;
-	gd->hi = offset>>32;
-}
-
-static void
-idtinit(void)
-{
-	Gd *gd;
-	int ist, v;
-	uint64_t dpl;
-	uintptr_t offset;
-
-	gd = idt64;
-	offset = PTR2UINT(idthandlers);
-
-	for(v = 0; v < Nidt; v++){
-		ist = 0;
-		dpl = SdP|SdDPL0|SdIG;
-		switch(v){
-		default:
-			break;
-		case IdtBP:			/* #BP */
-			dpl = SdP|SdDPL3|SdIG;
-			break;
-		case IdtUD:			/* #UD */
-		case IdtDF:			/* #DF */
-			ist = 1;
-			break;
-		}
-		mkgd(gd, offset, SSEL(SiCS, SsTIGDT|SsRPL0), dpl, ist);
-		gd++;
-		offset += 6;
-	}
-}
-
-void
-tssrsp0(uintptr_t sp)
-{
-	Tss *tss;
-
-	tss = m->tss;
-	tss->rsp0[0] = sp;
-	tss->rsp0[1] = sp>>32;
-}
-
-static void
-tssinit(uintptr_t sp)
-{
-	int ist;
-	Tss *tss;
-
-	tss = m->tss;
-	jehanne_memset(tss, 0, sizeof(Tss));
-
-	tssrsp0(sp);
-
-	sp = PTR2UINT(m->vsvm+PGSZ);
-	for(ist = 0; ist < 14; ist += 2){
-		tss->ist[ist] = sp;
-		tss->ist[ist+1] = sp>>32;
-	}
-	tss->iomap = 0xdfff;
-}
-
-void
-vsvminit(int size)
-{
-	Sd *sd;
-	uint64_t r;
-
-	if(m->machno == 0)
-		idtinit();
-
-	m->gdt = m->vsvm;
-	jehanne_memmove(m->gdt, gdt64, sizeof(gdt64));
-	m->tss = &m->vsvm[ROUNDUP(sizeof(gdt64), 16)];
-
-	sd = &((Sd*)m->gdt)[SiTSS];
-	*sd = mksd(PTR2UINT(m->tss), sizeof(Tss)-1, SdP|SdDPL0|SdaTSS, sd+1);
-
-	tssinit(m->stack+size);
-
-	gdtput(sizeof(gdt64)-1, PTR2UINT(m->gdt), SSEL(SiCS, SsTIGDT|SsRPL0));
-	idtput(sizeof(idt64)-1, PTR2UINT(idt64));
-	trput(SSEL(SiTSS, SsTIGDT|SsRPL0));
-
-	wrmsr(FSbase, 0ull);
-	wrmsr(GSbase, PTR2UINT(&sys->machptr[m->machno]));
-	wrmsr(KernelGSbase, 0ull);
-
-	r = rdmsr(Efer);
-	r |= Sce;
-	wrmsr(Efer, r);
-	r = ((uint64_t)SSEL(SiU32CS, SsRPL3))<<48;
-	r |= ((uint64_t)SSEL(SiCS, SsRPL0))<<32;
-	wrmsr(Star, r);
-	wrmsr(Lstar, PTR2UINT(syscallentry));
-	wrmsr(Sfmask, If);
-}
-
-int
-userureg(Ureg* ureg)
-{
-	return ureg->cs == SSEL(SiUCS, SsRPL3);
-}
diff --git a/sys/src/kern/amd64/workhorse.json b/sys/src/kern/amd64/workhorse.json
index 0f52255..032a078 100644
--- a/sys/src/kern/amd64/workhorse.json
+++ b/sys/src/kern/amd64/workhorse.json
@@ -5,7 +5,6 @@
 		],
 		"Include": [
 			"core.json",
-			"../386/include.json",
 			"../ip/include.json",
 			"../port/include.json"
 		],
@@ -17,7 +16,6 @@
 					"int printallsyscalls;"
 				],
 				"Dev": [
-					"acpi",
 					"arch",
 					"bridge",
 					"cap",
@@ -105,7 +103,6 @@
 			"autogenerated.c",
 			"sdata.c",
 			"cga.c",
-			"devacpi.c",
 			"usbehcipc.c",
 			"usbohci.c",
 			"usbuhci.c"
diff --git a/sys/src/kern/port/alloc.c b/sys/src/kern/port/alloc.c
new file mode 100644
index 0000000..45b7922
--- /dev/null
+++ b/sys/src/kern/port/alloc.c
@@ -0,0 +1,351 @@
+#include	"u.h"
+#include	"../port/lib.h"
+#include	"mem.h"
+#include	"dat.h"
+#include	"fns.h"
+#include	"error.h"
+#include	<pool.h>
+
+static void poolprint(Pool*, char*, ...);
+static void ppanic(Pool*, char*, ...);
+static void pool_lock(Pool*);
+static void pool_unlock(Pool*);
+
+typedef struct Private	Private;
+struct Private {
+	Lock		lk;
+	char		msg[256];	/* a rock for messages to be printed at unlock */
+};
+
+static Private pmainpriv;
+static Pool pmainmem = {
+	.name=	"Main",
+	.maxsize=	4*1024*1024,
+	.minarena=	128*1024,
+	.quantum=	32,
+	.alloc=	xalloc,
+	.merge=	xmerge,
+	.flags=	POOL_TOLERANCE,
+
+	.lock=	pool_lock,
+	.unlock=	pool_unlock,
+	.print=	poolprint,
+	.panic=	ppanic,
+
+	.private=	&pmainpriv,
+};
+
+static Private pimagpriv;
+static Pool pimagmem = {
+	.name=	"Image",
+	.maxsize=	16*1024*1024,
+	.minarena=	2*1024*1024,
+	.quantum=	32,
+	.alloc=	xalloc,
+	.merge=	xmerge,
+	.flags=	0,
+
+	.lock=	pool_lock,
+	.unlock=	pool_unlock,
+	.print=	poolprint,
+	.panic=	ppanic,
+
+	.private=	&pimagpriv,
+};
+
+static Private psecrpriv;
+static Pool psecrmem = {
+	.name=	"Secrets",
+	.maxsize=	16*1024*1024,
+	.minarena=	64*1024,
+	.quantum=	32,
+	.alloc=	xalloc,
+	.merge=	xmerge,
+	.flags=	POOL_ANTAGONISM,
+
+	.lock=	pool_lock,
+	.unlock=	pool_unlock,
+	.print=	poolprint,
+	.panic=	ppanic,
+
+	.private=	&psecrpriv,
+};
+
+Pool*	mainmem = &pmainmem;
+Pool*	imagmem = &pimagmem;
+Pool*	secrmem = &psecrmem;
+
+/*
+ * because we can't print while we're holding the locks,
+ * we have the save the message and print it once we let go.
+ */
+static void
+poolprint(Pool *p, char *fmt, ...)
+{
+	va_list v;
+	Private *pv;
+
+	pv = p->private;
+	va_start(v, fmt);
+	vseprint(pv->msg+strlen(pv->msg), pv->msg+sizeof pv->msg, fmt, v);
+	va_end(v);
+}
+
+static void
+ppanic(Pool *p, char *fmt, ...)
+{
+	va_list v;
+	Private *pv;
+	char msg[sizeof pv->msg];
+
+	pv = p->private;
+	va_start(v, fmt);
+	vseprint(pv->msg+strlen(pv->msg), pv->msg+sizeof pv->msg, fmt, v);
+	va_end(v);
+	memmove(msg, pv->msg, sizeof msg);
+	iunlock(&pv->lk);
+	panic("%s", msg);
+}
+
+static void
+pool_lock(Pool *p)
+{
+	Private *pv;
+
+	pv = p->private;
+	ilock(&pv->lk);
+//	pv->lk.pc = getcallerpc();
+	pv->msg[0] = 0;
+}
+
+static void
+pool_unlock(Pool *p)
+{
+	Private *pv;
+	char msg[sizeof pv->msg];
+
+	pv = p->private;
+	if(pv->msg[0] == 0){
+		iunlock(&pv->lk);
+		return;
+	}
+
+	memmove(msg, pv->msg, sizeof msg);
+	iunlock(&pv->lk);
+	iprint("%.*s", sizeof pv->msg, msg);
+}
+
+void
+poolsummary(Pool *p)
+{
+	print("%s max %llud cur %llud free %llud alloc %llud\n", p->name,
+		(uint64_t)p->maxsize, (uint64_t)p->cursize,
+		(uint64_t)p->curfree, (uint64_t)p->curalloc);
+}
+
+void
+mallocsummary(void)
+{
+	poolsummary(mainmem);
+	poolsummary(imagmem);
+	poolsummary(secrmem);
+}
+
+/* everything from here down should be the same in libc, libdebugmalloc, and the kernel */
+/* - except the code for malloc(), which alternately doesn't clear or does. */
+/* - except the code for smalloc(), which lives only in the kernel. */
+
+/*
+ * Npadlong is the number of uint32_t's to leave at the beginning of
+ * each allocated buffer for our own bookkeeping.  We return to the callers
+ * a pointer that points immediately after our bookkeeping area.  Incoming pointers
+ * must be decremented by that much, and outgoing pointers incremented.
+ * The malloc tag is stored at MallocOffset from the beginning of the block,
+ * and the realloc tag at ReallocOffset.  The offsets are from the true beginning
+ * of the block, not the beginning the caller sees.
+ *
+ * The extra if(Npadlong != 0) in various places is a hint for the compiler to
+ * compile out function calls that would otherwise be no-ops.
+ */
+
+/*	non tracing
+ *
+enum {
+	Npadlong	= 0,
+	MallocOffset = 0,
+	ReallocOffset = 0,
+};
+ *
+ */
+
+/* tracing */
+enum {
+	Npadlong	= 2,
+	MallocOffset = 0,
+	ReallocOffset = 1
+};
+
+
+void*
+smalloc(uint32_t size)
+{
+	void *v;
+
+	while((v = poolalloc(mainmem, size+Npadlong*sizeof(uint32_t))) == nil){
+		if(!waserror()){
+			resrcwait(nil, nil);
+			poperror();
+		}
+	}
+	if(Npadlong){
+		v = (uint32_t*)v+Npadlong;
+		setmalloctag(v, getcallerpc());
+	}
+	memset(v, 0, size);
+	return v;
+}
+
+void*
+jehanne_malloc(uint32_t size)
+{
+	void *v;
+
+	v = poolalloc(mainmem, size+Npadlong*sizeof(uint32_t));
+	if(v == nil)
+		return nil;
+	if(Npadlong){
+		v = (uint32_t*)v+Npadlong;
+		setmalloctag(v, getcallerpc());
+		setrealloctag(v, 0);
+	}
+	memset(v, 0, size);
+	return v;
+}
+
+void*
+jehanne_mallocz(uint32_t size, int clr)
+{
+	void *v;
+
+	v = poolalloc(mainmem, size+Npadlong*sizeof(uint32_t));
+	if(Npadlong && v != nil){
+		v = (uint32_t*)v+Npadlong;
+		setmalloctag(v, getcallerpc());
+		setrealloctag(v, 0);
+	}
+	if(clr && v != nil)
+		memset(v, 0, size);
+	return v;
+}
+
+void*
+jehanne_mallocalign(uint32_t size, uint32_t align, long offset, uint32_t span)
+{
+	void *v;
+
+	v = poolallocalign(mainmem, size+Npadlong*sizeof(uint32_t), align, offset-Npadlong*sizeof(uint32_t), span);
+	if(Npadlong && v != nil){
+		v = (uint32_t*)v+Npadlong;
+		setmalloctag(v, getcallerpc());
+		setrealloctag(v, 0);
+	}
+	if(v)
+		memset(v, 0, size);
+	return v;
+}
+
+void
+jehanne_free(void *v)
+{
+	if(v != nil)
+		poolfree(mainmem, (uint32_t*)v-Npadlong);
+}
+
+void*
+jehanne_realloc(void *v, uint32_t size)
+{
+	void *nv;
+
+	if(v != nil)
+		v = (uint32_t*)v-Npadlong;
+	if(Npadlong !=0 && size != 0)
+		size += Npadlong*sizeof(uint32_t);
+
+	if(nv = poolrealloc(mainmem, v, size)){
+		nv = (uint32_t*)nv+Npadlong;
+		setrealloctag(nv, getcallerpc());
+		if(v == nil)
+			setmalloctag(nv, getcallerpc());
+	}
+	return nv;
+}
+
+uint32_t
+jehanne_msize(void *v)
+{
+	return poolmsize(mainmem, (uint32_t*)v-Npadlong)-Npadlong*sizeof(uint32_t);
+}
+
+/* secret memory, used to back cryptographic keys and cipher states */
+void*
+secalloc(uint32_t size)
+{
+	void *v;
+
+	while((v = poolalloc(secrmem, size+Npadlong*sizeof(uint32_t))) == nil){
+		if(!waserror()){
+			resrcwait(nil, nil);
+			poperror();
+		}
+	}
+	if(Npadlong){
+		v = (uint32_t*)v+Npadlong;
+		setmalloctag(v, getcallerpc());
+		setrealloctag(v, 0);
+	}
+	memset(v, 0, size);
+	return v;
+}
+
+void
+secfree(void *v)
+{
+	if(v != nil)
+		poolfree(secrmem, (uint32_t*)v-Npadlong);
+}
+
+void
+jehanne_setmalloctag(void *v, uintptr_t pc)
+{
+	USED(v, pc);
+	if(Npadlong <= MallocOffset || v == nil)
+		return;
+	((uint32_t*)v)[-Npadlong+MallocOffset] = (uint32_t)pc;
+}
+
+void
+jehanne_setrealloctag(void *v, uintptr_t pc)
+{
+	USED(v, pc);
+	if(Npadlong <= ReallocOffset || v == nil)
+		return;
+	((uint32_t*)v)[-Npadlong+ReallocOffset] = (uint32_t)pc;
+}
+
+uintptr_t
+jehanne_getmalloctag(void *v)
+{
+	USED(v);
+	if(Npadlong <= MallocOffset)
+		return ~0;
+	return (int)((uint32_t*)v)[-Npadlong+MallocOffset];
+}
+
+uintptr_t
+jehanne_getrealloctag(void *v)
+{
+	USED(v);
+	if(Npadlong <= ReallocOffset)
+		return ~0;
+	return (int)((uint32_t*)v)[-Npadlong+ReallocOffset];
+}
diff --git a/sys/src/kern/port/allocb.c b/sys/src/kern/port/allocb.c
index 41dc79a..6a6fb58 100644
--- a/sys/src/kern/port/allocb.c
+++ b/sys/src/kern/port/allocb.c
@@ -3,50 +3,46 @@
 #include	"mem.h"
 #include	"dat.h"
 #include	"fns.h"
+#include	"error.h"
 
 enum
 {
 	Hdrspc		= 64,		/* leave room for high-level headers */
+	Tlrspc		= 16,		/* extra room at the end for pad/crc/mac */
 	Bdead		= 0x51494F42,	/* "QIOB" */
 };
 
-struct
-{
-	Lock;
-	uint32_t	bytes;
-	uint32_t	limit;
-
-} ialloc;
-
 static Block*
-_allocb(int size, int align)
+_allocb(int size)
 {
 	Block *b;
-	uint8_t *p;
-	int n;
+	uintptr_t addr;
 
-	if(align <= 0)
-		align = BLOCKALIGN;
-	n = align + ROUNDUP(size+Hdrspc, align) + sizeof(Block);
-	if((p = jehanne_malloc(n)) == nil)
+	size += Tlrspc;
+	if((b = mallocz(sizeof(Block)+size+Hdrspc, 0)) == nil)
 		return nil;
 
-	b = (Block*)(p + n - sizeof(Block));	/* block at end of allocated space */
-	b->base = p;
 	b->next = nil;
 	b->list = nil;
-	b->free = 0;
+	b->free = nil;
 	b->flag = 0;
 
-	/* align base and bounds of data */
-	b->lim = (uint8_t*)(PTR2UINT(b) & ~(align-1));
+	/* align start of data portion by rounding up */
+	addr = (uintptr_t)b;
+	addr = ROUND(addr + sizeof(Block), BLOCKALIGN);
+	b->base = (uint8_t*)addr;
 
-	/* align start of writable data, leaving space below for added headers */
-	b->rp = b->lim - ROUNDUP(size, align);
-	b->wp = b->rp;
+	/* align end of data portion by rounding down */
+	b->lim = (uint8_t*)b + msize(b);
+	addr = (uintptr_t)b->lim;
+	addr &= ~(BLOCKALIGN-1);
+	b->lim = (uint8_t*)addr;
 
-	if(b->rp < b->base || b->lim - b->rp < size)
+	/* leave sluff at beginning for added headers */
+	b->rp = b->lim - ROUND(size, BLOCKALIGN);
+	if(b->rp < b->base)
 		panic("_allocb");
+	b->wp = b->rp;
 
 	return b;
 }
@@ -58,80 +54,44 @@ allocb(int size)
 
 	/*
 	 * Check in a process and wait until successful.
-	 * Can still error out of here, though.
 	 */
 	if(up == nil)
-		panic("allocb without up: %#p\n", getcallerpc());
-	if((b = _allocb(size, 0)) == nil){
-		mallocsummary();
-		panic("allocb: no memory for %d bytes\n", size);
+		panic("allocb without up: %#p", getcallerpc());
+	while((b = _allocb(size)) == nil){
+		if(up->nlocks || m->ilockdepth || !islo()){
+			xsummary();
+			mallocsummary();
+			panic("allocb: no memory for %d bytes", size);
+		}
+		if(!waserror()){
+			resrcwait("no memory for allocb", nil);
+			poperror();
+		}
 	}
-	jehanne_setmalloctag(b->base, getcallerpc());
+	setmalloctag(b, getcallerpc());
 
 	return b;
 }
 
-Block*
-allocbalign(int size, int align)
-{
-	Block *b;
-
-	/*
-	 * Check in a process and wait until successful.
-	 * Can still error out of here, though.
-	 */
-	if(up == nil)
-		panic("allocbalign without up: %#p\n", getcallerpc());
-	if((b = _allocb(size, align)) == nil){
-		mallocsummary();
-		panic("allocbalign: no memory for %d bytes\n", size);
-	}
-	jehanne_setmalloctag(b->base, getcallerpc());
-
-	return b;
-}
-
-void
-ialloclimit(uint32_t limit)
-{
-	ialloc.limit = limit;
-}
-
 Block*
 iallocb(int size)
 {
 	Block *b;
-	static int m1, m2, mp;
 
-	if(ialloc.bytes > ialloc.limit){
-		if((m1++%10000)==0){
-			if(mp++ > 1000){
-				active.exiting = 1;
-				exit(0);
+	if((b = _allocb(size)) == nil){
+		static uint32_t nerr;
+		if((nerr++%10000)==0){
+			if(nerr > 10000000){
+				xsummary();
+				mallocsummary();
+				panic("iallocb: out of memory");
 			}
-			iprint("iallocb: limited %lud/%lud\n",
-				ialloc.bytes, ialloc.limit);
-		}
-		return nil;
-	}
-
-	if((b = _allocb(size, 0)) == nil){
-		if((m2++%10000)==0){
-			if(mp++ > 1000){
-				active.exiting = 1;
-				exit(0);
-			}
-			iprint("iallocb: no memory %lud/%lud\n",
-				ialloc.bytes, ialloc.limit);
+			iprint("iallocb: no memory for %d bytes\n", size);
 		}
 		return nil;
 	}
+	setmalloctag(b, getcallerpc());
 	b->flag = BINTR;
-	jehanne_setmalloctag(b->base, getcallerpc());
-
-	ilock(&ialloc);
-	ialloc.bytes += b->lim - b->base;
-	iunlock(&ialloc);
 
 	return b;
 }
@@ -140,7 +100,6 @@ void
 freeb(Block *b)
 {
 	void *dead = (void*)Bdead;
-	uint8_t *p;
 
 	if(b == nil)
 		return;
@@ -149,17 +108,10 @@ freeb(Block *b)
 	 * drivers which perform non cache coherent DMA manage their own buffer
 	 * pool of uncached buffers and provide their own free routine.
 	 */
-	if(b->free) {
+	if(b->free != nil) {
 		b->free(b);
 		return;
 	}
-	if(b->flag & BINTR) {
-		ilock(&ialloc);
-		ialloc.bytes -= b->lim - b->base;
-		iunlock(&ialloc);
-	}
-
-	p = b->base;
 
 	/* poison the block in case someone is still holding onto it */
 	b->next = dead;
@@ -168,7 +120,7 @@ freeb(Block *b)
 	b->lim = dead;
 	b->base = dead;
 
-	jehanne_free(p);
+	free(b);
 }
 
 void
@@ -180,10 +132,10 @@ checkb(Block *b, char *msg)
 		panic("checkb b %s %#p", msg, b);
 	if(b->base == dead || b->lim == dead || b->next == dead
 	  || b->rp == dead || b->wp == dead){
-		jehanne_print("checkb: base %#p lim %#p next %#p\n",
+		print("checkb: base %#p lim %#p next %#p\n",
 			b->base, b->lim, b->next);
-		jehanne_print("checkb: rp %#p wp %#p\n", b->rp, b->wp);
-		panic("checkb dead: %s\n", msg);
+		print("checkb: rp %#p wp %#p\n", b->rp, b->wp);
+		panic("checkb dead: %s", msg);
 	}
 
 	if(b->base > b->lim)
@@ -197,9 +149,3 @@ checkb(Block *b, char *msg)
 	if(b->wp > b->lim)
 		panic("checkb 4 %s %#p %#p", msg, b->wp, b->lim);
 }
-
-void
-iallocsummary(void)
-{
-	jehanne_print("ialloc %lud/%lud\n", ialloc.bytes, ialloc.limit);
-}
diff --git a/sys/src/kern/port/awake.c b/sys/src/kern/port/awake.c
index 7a09356..e5bd6e4 100644
--- a/sys/src/kern/port/awake.c
+++ b/sys/src/kern/port/awake.c
@@ -21,333 +21,611 @@
 #include	"dat.h"
 #include	"fns.h"
 
-typedef struct PendingWakeup PendingWakeup;
-struct PendingWakeup
+/* Requirements:
+ * - each process can register several wakeups
+ *   - wakeups registered outside a note handler will not happen
+ *     in a note handler
+ *   - wakeups registered by a note handler will be deleted on noted()
+ *   - all pending wakeups of a process will be deleted on pexit()
+ * - future wakeups can be deleted
+ * - each wakeup will interrupt a blocking syscall
+ */
+struct AwakeAlarm	/* 24 byte */
 {
-	short notified;
-	uint64_t time;
-	Proc *p;
-	PendingWakeup *next;
+	Proc*		p;
+	AwakeAlarm*	next;
+	unsigned char	notified;
+	unsigned char	done;
+	unsigned long	time	: 48;
+};
+typedef struct AlarmPool
+{
+	AwakeAlarm*	alarms;
+	AwakeAlarm*	end;
+	int		size;
+	int		first;
+	int		nfree;
+	Lock		l;
+} AlarmPool;
+static AlarmPool awkpool;
+#define alarm2wkp(a) ~((a)->time << 16 | (a) - awkpool.alarms)
+#define wkp2alarm(a) (awkpool.alarms + (~(a) & 0xffff))
+
+static AwakeAlarm *registry;
+static Lock rl;
+
+
+typedef enum ElapsedAlarmFate
+{
+	TryAgain,
+	Forget,
+	FreeAndForget
+} ElapsedAlarmFate;
+static AwakeAlarm *elapsed, **eEnd = &elapsed;
+static Lock el;
+
+static Rendez	producer;
+static Rendez	consumer;
+
+static unsigned long next_wakeup;
+
+static const int awakeable_syscalls[] = {
+	[SysAwait]	= 1,
+	[SysAwake]	= 0,
+	[SysBind]	= 0,
+	[SysClose]	= 0,
+	[SysCreate]	= 0,
+	[SysErrstr]	= 0,
+	[SysExec]	= 0,
+	[Sys_exits]	= 0,
+	[SysFauth]	= 0,
+	[SysFd2path]	= 0,
+	[SysFstat]	= 1,
+	[SysFversion]	= 0,
+	[SysFwstat]	= 1,
+	[SysMount]	= 0,
+	[SysNoted]	= 0,
+	[SysNotify]	= 0,
+	[SysOpen]	= 1,
+	[SysPread]	= 1,
+	[SysPwrite]	= 1,
+	[SysRemove]	= 0,
+	[SysRendezvous]	= 1,
+	[SysRfork]	= 0,
+	[SysSeek]	= 0,
+	[SysSemacquire]	= 1,
+	[SysSemrelease]	= 0,
+	[SysUnmount]	= 0,
+	[SysAlarm]	= 0,
 };
 
-/* alarms: linked list, sorted by wakeup time, protected by qlock(&l)
- * wakeupafter inserts new items, forgivewakeup remove them,
- * awakekproc consume the expired ones and clearwakeups remove those
- * survived to their process.
- */
-static PendingWakeup *alarms;
-static QLock l;
+#define DEBUG
 
-static Rendez	awaker;
+#ifdef DEBUG
 
-int
-canwakeup(Syscalls scall)
+void
+awake_detect_loop(AwakeAlarm *head)
+{
+	AwakeAlarm *tail;
+	while(head != nil){
+		if(!head->p)
+			panic("awake: free alarm head: %#p, pc %#p", head, getcallerpc());
+		if(head < awkpool.alarms || head > awkpool.end)
+			panic("awake: not an alarm head: %#p, pc %#p", head, getcallerpc());
+		tail = head->next;
+		while(tail != nil){
+			if(!tail->p)
+				panic("awake: free alarm tail: %#p, pc %#p", tail, getcallerpc());
+			if(tail < awkpool.alarms || tail > awkpool.end)
+				panic("awake: not an alarm tail: %#p, pc %#p", tail, getcallerpc());
+			if(head == tail)
+				panic("awake: loop detected");
+			else
+				tail = tail->next;
+		}
+		head = head->next;
+	}
+}
+
+AwakeAlarm*
+awake_find_first_of(Proc* p, AwakeAlarm* head)
+{
+	AwakeAlarm* a = head;
+	if(head == nil)
+		return nil;
+	while(a < awkpool.end){
+		if(a->p == p)
+			return a;
+		++a;
+	}
+	return nil;
+}
+
+static int
+awake_can_interrupt(Syscalls scall)
 {
 	if(scall == 0)
-		panic("canwakeup on page fault");
-
-	switch(scall){
-	default:
-		panic("canwakeup: unknown scall %d\n", scall);
-	case SysFstat:
-	case SysFwstat:
-	case SysOpen:
-	case SysPread:
-	case SysPwrite:
-	case SysRendezvous:
-	case SysSemacquire:
-	case SysSemrelease:
-	case SysAwait:
-		return 1;
-	case SysAwake:
-	case SysBind:
-	case SysClose:
-	case SysCreate:
-	case SysErrstr:
-	case SysExec:
-	case Sys_exits:
-	case SysFauth:
-	case SysFd2path:
-	case SysFversion:
-	case SysMount:
-	case SysNoted:
-	case SysNotify:
-	case SysRemove:
-	case SysRfork:
-	case SysSeek:
-	case SysUnmount:
-	case SysAlarm:
-		return 0;
-	}
+		panic("awake_can_interrupts on page fault");
+	if(scall >= sizeof(awakeable_syscalls) - 1)
+		panic("awake_can_interrupts: unknown syscall %d", scall);
+	return awakeable_syscalls[scall];
 }
 
-/*
- * Actually wakeup a process
- */
+#else
+# define awake_detect_loop(h)
+# define awake_can_interrupt(scall)	(awakeable_syscalls[scall])
+//# undef assert
+//# define assert(a)
+#endif
+
 static void
-wakeupProc(Proc *p, unsigned long t)
+pool_init(void)
 {
-	Mpl pl;
-	Rendez *r;
-	Proc *d, **l;
+	awkpool.size = sys->nproc * (sys->nmach + 1);
+	if(awkpool.size >= 1<<16)
+		awkpool.size = 1<<16;	/* we have 16 bit in the wakeup token for the index */
+	awkpool.alarms = malloc(sizeof(AwakeAlarm) * awkpool.size);
+	awkpool.end = awkpool.alarms + awkpool.size;
+	awkpool.nfree = awkpool.size;
+	awkpool.first = 0;
+}
 
-	/* this loop is to avoid lock ordering problems. */
-	for(;;){
-		pl = splhi();
-		lock(&p->rlock);
-		r = p->r;
+static AwakeAlarm*
+alarm_new(Proc *p)
+{
+	AwakeAlarm *a;
 
-		/* waiting for a wakeup? */
-		if(r == nil)
-			break;	/* no */
-
-		/* try for the second lock */
-		if(canlock(&r->l)){
-			if(p->state != Wakeme || r->p != p)
-				panic("wakeupProc: state %d %d %d", r->p != p, p->r != r, p->state);
-			p->r = nil;
-			r->p = nil;
-			ready(p);
-			unlock(&r->l);
-			break;
-		}
-
-		/* give other process time to get out of critical section and try again */
-		unlock(&p->rlock);
-		splx(pl);
-		sched();
+	lock(&awkpool.l);
+	while(awkpool.nfree <= 2*p->nwakeups){
+		unlock(&awkpool.l);
+		resrcwait("wait-wkp", nil);
+		lock(&awkpool.l);
 	}
-	unlock(&p->rlock);
-	splx(pl);
-
-	p->pendingWakeup = t;
-	if(p->state != Rendezvous)
-		return;
-
-	/* Try and pull out of a rendezvous */
-	lock(&p->rgrp->l);
-	if(p->state == Rendezvous) {
-		p->rendval = ~0;
-		l = &REND(p->rgrp, p->rendtag);
-		for(d = *l; d; d = d->rendhash) {
-			if(d == p) {
-				*l = p->rendhash;
-				break;
-			}
-			l = &d->rendhash;
-		}
-		ready(p);
+	/* here we know that nfree > 0... */
+	if(awkpool.first == awkpool.size){
+		/* but we don't now where the first free is */
+		awkpool.first = -1;
+		while(++awkpool.first < awkpool.size && awkpool.alarms[awkpool.first].p)
+			;
 	}
-	unlock(&p->rgrp->l);
+	assert(awkpool.first < awkpool.size);
+
+	a = awkpool.alarms + awkpool.first;
+	a->p = p;
+
+	if(adec(&awkpool.nfree) > 0){
+UpdateFirst:
+		while(++awkpool.first < awkpool.size && awkpool.alarms[awkpool.first].p)
+			;
+		if(awkpool.first == awkpool.size){
+			awkpool.first = -1;
+			goto UpdateFirst;
+		}
+	} else {
+		awkpool.first = awkpool.size;
+	}
+	unlock(&awkpool.l);
+
+	ainc(&p->nwakeups);
+	a->done = 0;
+	a->notified = p->notified ? 1 : 0;
+	a->time = 0;
+	a->next = nil;
+
+	return a;
+}
+static void
+alarm_free(AwakeAlarm* a)
+{
+	Proc *p = a->p;
+#ifdef DEBUG
+	a->next = (void*)getcallerpc();
+#endif
+	a->p = nil;
+	ainc(&awkpool.nfree);
+	adec(&p->nwakeups);
 }
 
 void
-awakekproc(void* v)
+awake_fell_asleep(Proc *p)
 {
-	Proc *p;
-	PendingWakeup *tail, *toAwake, **toAwakeEnd, *toDefer, **toDeferEnd;
-	uint64_t now;
-
-	for(;;){
-		now = sys->ticks;
-		toAwake = nil;
-		toAwakeEnd = &toAwake;
-		toDefer = nil;
-		toDeferEnd = &toDefer;
-
-		/* search for processes to wakeup */
-		qlock(&l);
-		tail = alarms;
-		while(tail && tail->time <= now){
-			if(tail->p->pendingWakeup > tail->p->lastWakeup
-			&& tail->p->state >= Ready){
-				*toDeferEnd = tail;
-				toDeferEnd = &tail->next;
-			} else if (!tail->notified && tail->p->notified){
-				/* If an awake was requested outside of
-				 * a note handler, it cannot expire
-				 * while executing a note handler.
-				 * On the other hand if an awake was
-				 * requeted while executing a note handler,
-				 * it's up to the note handler to
-				 * forgive it if it's not needed anymore.
-				 */
-				*toDeferEnd = tail;
-				toDeferEnd = &tail->next;
-			} else {
-				*toAwakeEnd = tail;
-				toAwakeEnd = &tail->next;
-				--tail->p->wakeups;
-			}
-			tail = tail->next;
-		}
-		if(toAwake != nil){
-			*toAwakeEnd = nil;
-			if(toDefer != nil){
-				*toDeferEnd = tail;
-				alarms = toDefer;
-			} else {
-				alarms = tail;
-			}
-		}
-		qunlock(&l);
-
-		/* wakeup sleeping processes */
-		while(toAwake != nil){
-			p = toAwake->p;
-			if(p->lastWakeup < toAwake->time && p->state > Ready) {
-				/* debugged processes will miss wakeups,
-				 * but the alternatives seem even worse
-				 */
-				if(canqlock(&p->debug)){
-					if(!waserror()){
-						wakeupProc(p, toAwake->time);
-						poperror();
-					}
-					qunlock(&p->debug);
-				}
-			}
-			tail = toAwake->next;
-			jehanne_free(toAwake);
-			toAwake = tail;
-		}
-
-		sleep(&awaker, return0, 0);
+	Syscalls cs = p->cursyscall;
+	if(cs != 0 && cs != SysAwake){
+		/* awake_register might sleep() on alarm_new and we
+		 * don't want this sleep to be interrupted.
+		 */
+		p->wakeups[p->notified].blockingsc = cs;
+		p->wakeups[p->notified].fell_asleep = sys->ticks;
 	}
 }
 
+int
+awake_should_wake_up(Proc *p)
+{
+	AwakeAlarm *a = p->wakeups[p->notified].elapsed;
+	Syscalls blockingsc = p->wakeups[p->notified].blockingsc;
+	return a != nil
+	    && blockingsc
+	    && awake_can_interrupt(blockingsc)
+	    ;
+}
+
+void
+awake_awakened(Proc *p)
+{
+	AwakeAlarm *a;
+	Syscalls blockingsc = p->wakeups[p->notified].blockingsc;
+	if(blockingsc && awake_can_interrupt(blockingsc))
+	if(a = xchgm(&p->wakeups[p->notified].elapsed, nil)){
+		p->wakeups[p->notified].awakened = sys->ticks;
+		p->wakeups[p->notified].last = alarm2wkp(a);
+		p->wakeups[p->notified].blockingsc = 0;
+	}
+}
+
+/* called from noted() to remove all pending alarms */
+void
+awake_gc_note(Proc *p)
+{
+	AwakeAlarm *a, **last;
+
+	assert(p->notified != 0);
+
+	lock(&rl);
+	awake_detect_loop(registry);
+
+	/* first pending alarm */
+	a = xchgm(&p->wakeups[1].elapsed, nil);
+	p->wakeups[1].blockingsc = 0;
+
+	/* then clear the registry */
+	last = &registry;
+	for(a = *last; a != nil && p->wakeups[1].count > 0; a = *last) {
+		if(!a->p)
+			panic("awake_reset: free alarm in registry");
+		if(a->p == p && a->notified){
+			adec(&p->wakeups[a->notified].count);
+			*last = a->next;
+			alarm_free(a);
+		} else {
+			last = &a->next;
+		}
+	}
+	awake_detect_loop(registry);
+	if(registry)
+		next_wakeup = registry->time;
+	unlock(&rl);
+}
+
 /*
- * called on pexit
+ * called from pexit() and sysexec() to clear all pending
  */
 void
-clearwakeups(Proc *p)
+awake_gc_proc(Proc *p)
 {
-	PendingWakeup *w, **next, *freelist, **fend;
+	AwakeAlarm *a, **last;
 
-	freelist = nil;
+	/* clear all wakeups (process is exiting) */
+	lock(&rl);
+	awake_detect_loop(registry);
 
-	/* find all PendingWakeup* to free and remove them from alarms */
-	qlock(&l);
-	if(p->wakeups){
-		/* note: qlock(&l) && p->wakeups > 0 => alarms != nil */
-		next = &alarms;
-		fend = &freelist;
-clearnext:
-		w = *next;
-		while (w != nil && w->p == p) {
-			/* found one to remove */
-			*fend = w;			/* append to freelist */
-			*next = w->next;	/* remove from alarms */
-			fend = &w->next;	/* move fend to end of freelist */
-			*fend = nil;		/* clean the end of freelist */
-			--p->wakeups;
-			w = *next;			/* next to analyze */
-		}
-		/* while exited => w == nil || w->p != p */
-		if(p->wakeups){
-			/* note: p->wakeups > 0 => w != nil
-			 *       p->wakeups > 0 && w->p != p => w->next != nil
-			 */
-			next = &w->next;
-			goto clearnext;
+	/* first pending alarm */
+	p->wakeups[0].elapsed = nil;
+	p->wakeups[0].blockingsc = 0;
+	p->wakeups[1].elapsed = nil;
+	p->wakeups[1].blockingsc = 0;
+
+	/* then clear the registry */
+	last = &registry;
+	for(a = *last; a != nil && (p->wakeups[0].count > 0 || p->wakeups[1].count > 0); a = *last) {
+		if(!a->p)
+			panic("awake_reset: free alarm in registry");
+		if(a->p == p){
+			adec(&p->wakeups[a->notified].count);
+			*last = a->next;
+			alarm_free(a);
+		} else {
+			last = &a->next;
 		}
 	}
-	qunlock(&l);
+	awake_detect_loop(registry);
+	if(registry)
+		next_wakeup = registry->time;
+	unlock(&rl);
 
-	/* free the found PendingWakeup* (out of the lock) */
-	w = freelist;
-	while(w != nil) {
-		freelist = w->next;
-		jehanne_free(w);
-		w = freelist;
+	assert(p->wakeups[0].count == 0);
+	assert(p->wakeups[1].count == 0);
+
+	while(p->nwakeups > 0)
+		resrcwait(nil, nil);
+}
+
+static long
+awake_register(long ms)
+{
+	AwakeAlarm *a, *new, **last;
+
+	new = alarm_new(up);
+
+	ilock(&rl);
+	last = &registry;
+	awake_detect_loop(registry);
+
+	new->time = (sys->ticks + ms2tk(ms) + sys->nmach) & 0xffffffffffff;
+	for(a = *last; a != nil && a->time <= new->time; a = *last) {
+		if(!a->p)
+			panic("awake_register: free alarm in registry");
+		if(a->done){
+			adec(&a->p->wakeups[a->notified].count);
+			*last = a->next;
+			alarm_free(a);
+			continue;
+		}
+		if(a->time == new->time && a->p == up){
+			/* avoid two alarms at the same tick for a process */
+			++new->time;
+		}
+		last = &a->next;
 	}
+	*last = new;
+	new->next = a;
+	awake_detect_loop(registry);
+	ainc(&up->wakeups[new->notified].count);
+	assert(registry != nil);
+	next_wakeup = registry->time;
+	iunlock(&rl);
+
+	return alarm2wkp(new);
+}
+
+static long
+awake_remove(long request)
+{
+	AwakeAlarm *a;
+
+	if(request >= up->wakeups[up->notified].last)
+		return 0;	/* already free */
+
+	a = wkp2alarm(request);
+	if(a >= awkpool.end)
+		return 0;	/* should we send a note to up? */
+
+	if(a->p != up)
+		return 0;	/* should we send a note to up? */
+
+	if(a->time != (~request)>>16)
+		return 0;	/* should we send a note to up? */
+
+	lock(&rl);		/* sync with awake_timer */
+	if(!CASV(&up->wakeups[up->notified].elapsed, a, nil)){
+		a->done = 1;
+	}
+	unlock(&rl);
+
+	return request;
+}
+
+long
+sysawake(long request)
+{
+	if(request == 0)
+		return up->wakeups[up->notified].last;
+	if(request < 0)
+		return awake_remove(request);
+	return awake_register(request);
 }
 
 /*
  * called every clock tick
  */
 void
-checkwakeups(void)
+awake_tick(unsigned long now)
 {
-	PendingWakeup *p;
-	uint64_t now;
+	if(next_wakeup < now && (now&7) == 0)
+		wakeup(&producer);
+}
 
-	p = alarms;
+static void
+try_wire_process(void)
+{
+	int i;
+	/* wire to an online processor to reduce context switches
+	 * but try to avoid boot processor as it runs awake_tick
+	 */
+	if(up->mach->machno > 0)
+		procwired(up, up->mach->machno);
+	else if(sys->nmach > 1){
+		i = sys->nmach;
+		while(up->wired != nil && i > 1)
+			if(sys->machptr[--i]->online)
+				procwired(up, i);
+	}
+}
+
+void
+awake_timer(void* v)
+{
+	long now;
+	AwakeAlarm **next, *tmp, *toAwake, **toAwakeEnd;
+
+	try_wire_process();
+
+	/* initialize wakeups wkppool */
+	pool_init();
+
+CheckWakeups:
+	next_wakeup = ~0;
+
+	/* we fix time to preserve wakeup order */
 	now = sys->ticks;
 
-	if(p && p->time <= now)
-		wakeup(&awaker);
+	toAwake = nil;
+	toAwakeEnd = &toAwake;
+
+	/* search for processes to wakeup */
+	ilock(&rl);
+	next = &registry;
+	while((tmp = *next) != nil && tmp->time <= now){
+		if(tmp->p == nil)
+			panic("awake_timer: free alarm in registry");
+		if(tmp->done){
+			*next = tmp->next;
+			adec(&tmp->p->wakeups[tmp->notified].count);
+			alarm_free(tmp);
+		} else {
+			if(!CASV(&tmp->p->wakeups[tmp->notified].elapsed, nil, tmp)){
+				/* each wakeup must have a chance */
+				next = &tmp->next;
+			} else {
+				adec(&tmp->p->wakeups[tmp->notified].count);
+				*toAwakeEnd = tmp;
+				toAwakeEnd = &tmp->next;
+				*next = tmp->next;
+			}
+		}
+	}
+	if(toAwake != nil)
+		*toAwakeEnd = nil;
+
+	awake_detect_loop(registry);
+	iunlock(&rl);
+
+	if(toAwake != nil){
+		/* pass the elapsed wakeups to awake_ringer preserving order */
+		lock(&el);
+		*eEnd = toAwake;
+		eEnd = toAwakeEnd;
+		unlock(&el);
+		wakeup(&consumer);
+	}
+
+	if(registry)
+		next_wakeup = registry->time;
+
+	sleep(&producer, return0, 0);
+	goto CheckWakeups;
 }
 
-static int64_t
-wakeupafter(int64_t ms)
+/* Try to wake up a process
+ * Returns:
+ * - 0 if the alarm must be preserved in the elapsed list
+ * - 1 if the alarm must be removed from the elapsed list and freed
+ */
+static int
+awake_dispatch(AwakeAlarm *a)
 {
-	PendingWakeup *w, *new, **last;
-	int64_t when;
+	int canfree;
+	Rendez *r;
+	Proc *p;
+	Syscalls bs;
 
-	when = ms2tk(ms) + sys->ticks + 2; /* +2 against round errors and cpu's clocks misalignment */
-	new = jehanne_mallocz(sizeof(PendingWakeup), 1);
-	if(new == nil)
+	p = a->p;
+	if(p == nil)
+		panic("awake_dispatch: free alarm in elapsed list");
+
+	if(p < procalloc.arena || p > procalloc.arena + procalloc.nproc)
+		panic("awake_dispatch: dirty alarm");
+	if(!canlock(&p->rlock))
 		return 0;
-	new->p = up;
-	new->notified = up->notified;
-	new->time = when;
 
-	qlock(&l);
-	last = &alarms;
-	for(w = *last; w != nil && w->time <= when; w = w->next) {
-		last = &w->next;
+	/* sched() locks p->rlock before setting p->mach and p->state
+	 */
+	if(p->mach != nil && p->state <= Running){
+		canfree = p->state < Ready;
+		goto Done;
 	}
-	new->next = w;
-	*last = new;
-	++up->wakeups;
-	qunlock(&l);
 
-	return -when;
+	if(p->wakeups[a->notified].elapsed != a){
+		/* cleared by awake_awakened */
+		canfree = 1;
+		goto Done;
+	}
+
+	canfree = 0;
+
+	if(a->done){
+		/* already signaled, we have to wait for awake_awakened */
+		goto Done;
+	}
+
+	if(a->notified && !p->notified){
+		/* this should never happen because p is not Running:
+		 * either noted as been called previously (and thus awake_reset)
+		 * or it has not
+		 *
+		 * so if this happens it's probably a but in awake_reset
+		 */
+		unlock(&p->rlock);
+		panic("awake_dispatch: notified alarm for not notified process");
+	}
+
+	if(p->notepending && !p->notedeferred){
+		/* notes take precedence */
+		goto Done;
+	}
+
+	bs = p->wakeups[a->notified].blockingsc;
+	if(bs == 0 || !awake_can_interrupt(bs)){
+		/* wait for a chance */
+		goto Done;
+	}
+
+	r = p->r;
+	if(r != nil){
+		if(canlock(&r->l)){
+			if(p->state != Wakeme || r->p != p)
+				panic("awake_dispatch: state %d %d %d", r->p != p, p->r != r, p->state);
+			a->done = 1;
+			p->r = nil;
+			r->p = nil;
+			ready(p);
+			unlock(&r->l);
+		}
+	} else {
+		if(p->state == Rendezvous || p->state == Queueing)
+		if(proc_interrupt_finalize(p))
+			a->done = 1;
+	}
+
+Done:
+	unlock(&p->rlock);
+	return canfree;
 }
 
-static int64_t
-forgivewakeup(int64_t time)
+void
+awake_ringer(void* v)
 {
-	PendingWakeup *w, **last;
+	AwakeAlarm *pending, **pLast, **next, *a;
 
-	if(up->lastWakeup >= time || up->pendingWakeup >= time)
-		return 0;
-	qlock(&l);
-	if(alarms == nil || up->wakeups == 0){
-		qunlock(&l);
-		return 0;	// nothing to do
+	pending = nil;
+	pLast = &pending;
+
+CheckElapsed:
+	lock(&el);
+	*pLast = elapsed;
+	elapsed = nil;
+	eEnd = &elapsed;
+	unlock(&el);
+
+	pLast = &pending;
+	next = pLast;
+	while(*next != nil){
+		a = *next;
+		if(awake_dispatch(a)){
+			*next = a->next;
+			alarm_free(a);
+		} else {
+			*pLast = a;
+			next = &a->next;
+			pLast = next;
+		}
 	}
 
-	last = &alarms;
-	for(w = *last; w != nil && w->time < time; w = w->next) {
-		last = &w->next;
+	if(pending == nil){
+		assert(pLast == &pending);
+		sleep(&consumer, return0, 0);
+	} else if(elapsed == nil){
+		tsleep(&up->sleep, return0, 0, 30);
 	}
-	while(w != nil && w->time == time && w->p != up){
-		last = &w->next;
-		w = w->next;
-	}
-	if(w == nil || w->time > time || w->p != up){
-		/* wakeup not found */
-		qunlock(&l);
-		return 0;
-	}
-
-	*last = w->next;
-	--up->wakeups;
-	qunlock(&l);
-
-	jehanne_free(w);
-
-	return -time;
-}
-
-int64_t
-procawake(int64_t ms)
-{
-	if(ms == 0)
-		return -up->lastWakeup; // nothing to do
-	if(ms < 0)
-		return forgivewakeup(-ms);
-	return wakeupafter(ms);
+	goto CheckElapsed;
 }
diff --git a/sys/src/kern/port/bud.c b/sys/src/kern/port/bud.c
deleted file mode 100644
index 624789c..0000000
--- a/sys/src/kern/port/bud.c
+++ /dev/null
@@ -1,360 +0,0 @@
-#include "u.h"
-#include "../port/lib.h"
-#include "mem.h"
-#include "dat.h"
-#include "fns.h"
-
-/*
- * - locks
- * - could instead coalesce free items on demand (cf. Wulf)
- * - or lazy buddy (cf. Barkley)
- */
-
-enum{
-	MinK=		PGSHFT,		/* default minimum size (one page) */
-	Nbits=		sizeof(uintmem)*8,
-	MaxK=		Nbits-1,		/* last usable k (largest block is 2^k) */
-
-	Busy=		0x80,	/* bit set in byte map if block busy (low order bits are block size, 0=unavailable) */
-};
-
-//#define	usize	uintmem
-
-typedef struct Blk Blk;
-struct Blk{
-	Blk*	forw;	/* free list */
-	Blk*	back;
-};
-
-typedef struct Bfree Bfree;
-struct Bfree{
-	Blk		h;	/* header */
-	Lock;
-	uint32_t	avail;
-};
-
-struct Bpool{
-	Lock	lk;	/* TO DO: localise lock (need CAS update of pool->kofb) (also see Johnson & Davis 1992) */
-	Bfree	blist[Nbits];	/* increasing powers of two */
-	uint8_t*	kofb;		/* k(block_index) with top bit set if busy */
-	uint32_t	mink;
-	uint32_t	maxk;
-	uint32_t	maxb;	/* limit to block index, in minbsize blocks (pool size) */
-	Blk*	blocks;	/* free list pointers */
-	uintmem	base;
-	uintmem	minbsize;
-	uintmem	limit;
-};
-
-static uint8_t lg2table[256] = {
-	0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3,
-	4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
-	5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
-	5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
-	6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
-	6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
-	6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
-	6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
-	7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
-	7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
-	7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
-	7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
-	7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
-	7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
-	7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
-	7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
-};
-
-#define	BI(a)	((a)>>pool->mink)
-#define	IB(x)	((uintmem)(x)<<pool->mink)
-
-static int
-lg2ceil(uintmem m)
-{
-	uint32_t n, h;
-	int r;
-
-	r = (m & (m-1)) != 0;	/* not a power of two => round up */
-	n = (uint32_t)m;
-	if(sizeof(uintmem)>sizeof(uint32_t)){
-		h = (uint64_t)m>>32;
-		if(h != 0){
-			n = h;
-			r += 32;
-		}
-	}
-	if((n>>8) == 0)
-		return lg2table[n] + r;
-	if((n>>16) == 0)
-		return 8 + lg2table[n>>8] + r;
-	if((n>>24) == 0)
-		return 16 + lg2table[n>>16] + r;
-	return 24 + lg2table[n>>24] + r;
-}
-
-Bpool*
-bpoolcreate(uint32_t mink, uint32_t maxk, uintmem base, uintmem top, void* (*alloc)(usize, int))
-{
-	int k;
-	Blk *b;
-	Bpool *pool;
-
-	if(mink == 0)
-		mink = MinK;
-	if(maxk > MaxK)
-		panic("bpoolcreate");
-	pool = alloc(sizeof(Bpool), 1);
-	if(pool == nil)
-		panic("bpoolcreate alloc");
-	pool->mink = mink;
-	pool->maxk = maxk;
-	pool->base = base;
-	pool->limit = top;
-	pool->maxb = BI(top-base);
-	pool->minbsize = (uintmem)1<<mink;
-	pool->blocks = alloc((pool->maxb+1)*sizeof(*pool->blocks), 0);
-	if(pool->blocks == nil)
-		panic("bpoolinit: can't allocate %ud blocks", pool->maxb+1);
-	for(k = 0; k < nelem(pool->blist); k++){
-		b = &pool->blist[k].h;
-		b->forw = b->back = b;
-	}
-	pool->kofb = alloc((pool->maxb+1)*sizeof(*pool->kofb), 1);
-	if(pool->kofb == nil)
-		panic("physinit: can't allocate %ud kofb", pool->maxb+1);
-	jehanne_print("pool %#p space base %#P top=%#P maxb=%#ux (%d)\n", pool, base, top, pool->maxb, pool->maxb);
-	return pool;
-}
-
-uintmem
-bpoolalloc(Bpool *pool, usize size)
-{
-	int j, k;
-	Blk *b, *b2;
-	uintmem a, a2;
-	uint32_t bi;
-
-	k = lg2ceil(size);
-	if(k < pool->mink)
-		k = pool->mink;
-	if(k > pool->maxk)
-		return 0;
-	DBG("%#p size=%#P k=%d\n", pool, (uintmem)size, k);
-	lock(&pool->lk);
-	for(j = k;;){
-		b = pool->blist[j].h.forw;
-		if(b != &pool->blist[j].h)
-			break;
-		if(++j > pool->maxk){
-			unlock(&pool->lk);
-			return 0;	/* out of space */
-		}
-	}
-	if(b == nil)
-		panic("physalloc: nil");
-	/* set busy state */
-	bi = b - pool->blocks;
-	if(pool->kofb[bi] & Busy || b->forw == nil || b->back == nil)
-		panic("physalloc: inval k=%d j=%d %#p %d %#ux %#p %#p", k, j, b, bi, pool->kofb[bi], b->forw, b->back);
-	pool->kofb[bi] = k | Busy;
-	pool->blist[j].avail--;
-	b->forw->back = b->back;
-	b->back->forw = b->forw;
-	a = IB(bi);
-	while(j != k){
-		/* split */
-		j--;
-		a2 = a+((uintmem)1<<j);
-		bi = BI(a2);
-		DBG("split %#llux %#llux k=%d %#llux pool->kofb=%#ux\n", a, a2, j, (uintmem)1<<j, pool->kofb[bi]);
-		if(pool->kofb[bi] & Busy){
-			if(pool->kofb[bi] & ~Busy)
-				panic("bal: busy block %#llux k=%d\n", a, pool->kofb[bi] & ~Busy);
-		}
-		pool->kofb[bi] = j;	/* new size, not busy */
-		b2 = &pool->blocks[bi];
-		b2->forw = &pool->blist[j].h;
-		b2->back = pool->blist[j].h.back;
-		pool->blist[j].h.back = b2;
-		b2->back->forw = b2;
-		pool->blist[j].avail++;
-	}
-	unlock(&pool->lk);
-	return a + pool->base;
-}
-
-void
-bpoolfree(Bpool *pool, uintmem a, usize size)
-{
-	int k;
-	Blk *b, *b2;
-	uintmem a2;
-	uint32_t bi, bi2;
-
-	k = lg2ceil(size);	/* could look it up in pool->kofb */
-	if(k < pool->mink)
-		return;
-	if(k > pool->maxk)
-		k = pool->maxk;
-	DBG("%#p free %#llux %#P k%d\n", pool, a, (uintmem)size, k);
-	if(a < pool->base)
-		panic("bpoolfree");
-	a -= pool->base;
-	bi = BI(a);
-	lock(&pool->lk);
-	if(pool->kofb[bi] != 0 && pool->kofb[bi] != (Busy|k)){
-		unlock(&pool->lk);
-		panic("balfree: busy %#llux odd k k=%d kofb=%#ux\n", a, k, pool->kofb[bi]);
-	}
-	for(; k != pool->maxk; k++){
-		pool->kofb[bi] = Busy;
-		a2 = a ^ ((uintmem)1<<k);	/* buddy */
-		bi2 = BI(a2);
-		b2 = &pool->blocks[bi2];
-		if(bi2 >= pool->maxb || pool->kofb[bi2] != k)
-			break;
-		/* valid, not busy or empty, size k */
-		DBG("combine %#llux %#llux %d %#llux\n", a, a2, k, (uintmem)1<<k);
-		b2->back->forw = b2->forw;
-		b2->forw->back = b2->back;
-		pool->kofb[bi2] = Busy;
-		pool->blist[k].avail--;
-		if(a2 < a){
-			a = a2;
-			bi = bi2;
-		}
-	}
-	pool->kofb[bi] = k;	/* sets size and resets Busy */
-	b = &pool->blocks[bi];
-	b->forw = &pool->blist[k].h;
-	b->back = pool->blist[k].h.back;
-	pool->blist[k].h.back = b;
-	b->back->forw = b;
-	pool->blist[k].avail++;
-	unlock(&pool->lk);
-}
-
-void
-bpoolallocrange(Bpool *pool, usize *low, usize *high)
-{
-	*low = (usize)1<<pool->mink;
-	*high = (usize)1<<pool->maxk;
-}
-
-static void
-ibpoolfree(Bpool *pool, uintmem base, usize size)
-{
-	bpoolfree(pool, base+pool->base, size);
-}
-
-void
-bpoolinitfree(Bpool *pool, uintmem base, uintmem lim)
-{
-	uintmem m, size;
-	int i;
-
-	/* chop limit to min block alignment */
-	if(base >= pool->limit)
-		return;
-	if(pool->base > base)
-		base = pool->base;
-	if(lim > pool->limit)
-		lim = pool->limit;
-	base -= pool->base;
-	lim -= pool->base;
-	lim &= ~(pool->minbsize-1);
-	if(BI(lim) > pool->maxb){
-		jehanne_print("physinitfree: address space too large");
-		lim = IB(pool->maxb);
-	}
-
-	/* round base to min block alignment */
-	base = (base + pool->minbsize-1) & ~(pool->minbsize-1);
-
-	size = lim - base;
-	if(size < pool->minbsize)
-		return;
-	DBG("bpoolinitfree %#p %#P-%#P [%#P]\n", pool, pool->base+base, pool->base+lim, size);
-
-	/* move up from base in largest blocks that remain aligned */
-	for(i=pool->mink; i<pool->maxk; i++){
-		m = (uintmem)1 << i;
-		if(base & m){
-			if(size < m)
-				break;
-			if(base & (m-1)){
-				jehanne_print(" ** error: %#P %#P\n", base, m);
-				return;
-			}
-			ibpoolfree(pool, base, m);
-			base += m;
-			size -= m;
-		}
-	}
-
-	/* largest chunks, aligned */
-	m = (uintmem)1<<pool->maxk;
-	while(size >= m){
-		if(base & (m-1)){
-			jehanne_print(" ** error: %#P %#P\n", base, m);
-			return;
-		}
-		ibpoolfree(pool, base, m);
-		base += m;
-		size -= m;
-	}
-
-	/* free remaining chunks, decreasing alignment */
-	for(; size >= pool->minbsize; m >>= 1){
-		if(size & m){
-			DBG("\t%#P %#P\n", base, m);
-			if(base & (m-1)){
-				jehanne_print(" ** error: %#P %#P\n", base, m);
-				return;
-			}
-			ibpoolfree(pool, base, m);
-			base += m;
-			size &= ~m;
-		}
-	}
-}
-
-char*
-seprintbpoolstats(Bpool *pool, char *s,  char *e)
-{
-	Bfree *b;
-	int i;
-
-	lock(&pool->lk);
-	for(i = 0; i < nelem(pool->blist); i++){
-		b = &pool->blist[i];
-		if(b->avail != 0)
-			s = jehanne_seprint(s, e, "%ud %ulldK blocks avail\n",
-				b->avail, (1ull<<i)/KiB);
-	}
-	unlock(&pool->lk);
-	return s;
-}
-
-void
-bpooldump(Bpool *pool)
-{
-	uintmem a;
-	uint32_t bi;
-	int i, k;
-	Blk *b;
-
-	for(i=0; i<nelem(pool->blist); i++){
-		b = pool->blist[i].h.forw;
-		if(b != &pool->blist[i].h){
-			jehanne_print("%d	", i);
-			for(; b != &pool->blist[i].h; b = b->forw){
-				bi = b-pool->blocks;
-				a = IB(bi);
-				k = pool->kofb[bi];
-				jehanne_print(" [%#llux %d %#ux b=%#llux]", a, k, 1<<k, a^((uintmem)1<<k));
-			}
-			jehanne_print("\n");
-		}
-	}
-}
diff --git a/sys/src/kern/port/cache.c b/sys/src/kern/port/cache.c
deleted file mode 100644
index 07bff62..0000000
--- a/sys/src/kern/port/cache.c
+++ /dev/null
@@ -1,543 +0,0 @@
-#include	"u.h"
-#include	"../port/lib.h"
-#include	"mem.h"
-#include	"dat.h"
-#include	"fns.h"
-
-enum
-{
-	NHASH		= 128,
-	MAXCACHE	= 1024*1024,
-	NFILE		= 4096,
-	NEXTENT		= 200,		/* extent allocation size */
-};
-
-typedef struct Extent Extent;
-struct Extent
-{
-	uint32_t	start;
-	int	len;
-	char	*cache;
-	Extent	*next;
-};
-
-typedef struct Mntcache Mntcache;
-struct Mntcache
-{
-	Qid	qid;
-	uint32_t	devno;
-	Dev*	dev;
-	QLock;
-	Extent	 *list;
-	Mntcache *hash;
-	Mntcache *prev;
-	Mntcache *next;
-};
-
-typedef struct Cache Cache;
-struct Cache
-{
-	Lock		l;
-	int		pgno;
-	Mntcache	*head;
-	Mntcache	*tail;
-	Mntcache	*hash[NHASH];
-};
-
-typedef struct Ecache Ecache;
-struct Ecache
-{
-	Lock	l;
-	int	total;
-	int	free;
-	Extent*	head;
-};
-
-//static Image fscache;		// not used
-static Cache cache;
-static Ecache ecache;
-static int maxcache = MAXCACHE;
-
-static void
-extentfree(Extent* e)
-{
-	jehanne_free(e->cache);
-	e->cache = nil;
-	lock(&ecache.l);
-	e->next = ecache.head;
-	ecache.head = e;
-	ecache.free++;
-	unlock(&ecache.l);
-}
-
-static Extent*
-extentalloc(void)
-{
-	Extent *e;
-	int i;
-
-	lock(&ecache.l);
-	if(ecache.head == nil){
-		e = jehanne_malloc(NEXTENT*sizeof(Extent));
-		if(e == nil){
-			unlock(&ecache.l);
-			return nil;
-		}
-		for(i = 0; i < NEXTENT; i++){
-			e->next = ecache.head;
-			ecache.head = e;
-			e++;
-		}
-		ecache.free += NEXTENT;
-		ecache.total += NEXTENT;
-	}
-
-	e = ecache.head;
-	ecache.head = e->next;
-	jehanne_memset(e, 0, sizeof(Extent));
-	ecache.free--;
-	unlock(&ecache.l);
-
-	return e;
-}
-
-void
-cinit(void)
-{
-	int i;
-	Mntcache *mc;
-
-	if((cache.head = jehanne_malloc(sizeof(Mntcache)*NFILE)) == nil)
-		panic("cinit: no memory");
-	mc = cache.head;
-
-	/* a good algorithm to set maxcache would be nice */
-
-	for(i = 0; i < NFILE-1; i++) {
-		mc->next = mc+1;
-		mc->prev = mc-1;
-		mc++;
-	}
-
-	cache.tail = mc;
-	cache.tail->next = 0;
-	cache.head->prev = 0;
-}
-
-void
-cnodata(Mntcache *mc)
-{
-	Extent *e, *n;
-
-	/*
-	 * Invalidate all extent data
-	 * Image lru will waste the pages
-	 */
-	for(e = mc->list; e; e = n) {
-		n = e->next;
-		extentfree(e);
-	}
-	mc->list = 0;
-}
-
-void
-ctail(Mntcache *mc)
-{
-	/* Unlink and send to the tail */
-	if(mc->prev)
-		mc->prev->next = mc->next;
-	else
-		cache.head = mc->next;
-	if(mc->next)
-		mc->next->prev = mc->prev;
-	else
-		cache.tail = mc->prev;
-
-	if(cache.tail) {
-		mc->prev = cache.tail;
-		cache.tail->next = mc;
-		mc->next = 0;
-		cache.tail = mc;
-	}
-	else {
-		cache.head = mc;
-		cache.tail = mc;
-		mc->prev = 0;
-		mc->next = 0;
-	}
-}
-
-void
-copen(Chan *c)
-{
-	int h;
-	Extent *e, *next;
-	Mntcache *mc, *f, **l;
-
-	/* directories aren't cacheable and append-only files confuse us */
-	if(c->qid.type&(QTDIR|QTAPPEND))
-		return;
-
-	h = c->qid.path%NHASH;
-	lock(&cache.l);
-	for(mc = cache.hash[h]; mc != nil; mc = mc->hash) {
-		if(mc->qid.path == c->qid.path)
-		if(mc->qid.type == c->qid.type)
-		if(mc->devno == c->devno && mc->dev == c->dev) {
-			c->mc = mc;
-			ctail(mc);
-			unlock(&cache.l);
-
-			/* File was updated, invalidate cache */
-			if(mc->qid.vers != c->qid.vers) {
-				mc->qid.vers = c->qid.vers;
-				qlock(mc);
-				cnodata(mc);
-				qunlock(mc);
-			}
-			return;
-		}
-	}
-
-	/* LRU the cache headers */
-	mc = cache.head;
-	l = &cache.hash[mc->qid.path%NHASH];
-	for(f = *l; f; f = f->hash) {
-		if(f == mc) {
-			*l = mc->hash;
-			break;
-		}
-		l = &f->hash;
-	}
-
-	mc->qid = c->qid;
-	mc->devno = c->devno;
-	mc->dev = c->dev;
-
-	l = &cache.hash[h];
-	mc->hash = *l;
-	*l = mc;
-	ctail(mc);
-
-	qlock(mc);
-	c->mc = mc;
-	e = mc->list;
-	mc->list = 0;
-	unlock(&cache.l);
-
-	while(e) {
-		next = e->next;
-		extentfree(e);
-		e = next;
-	}
-	qunlock(mc);
-}
-
-static int
-cdev(Mntcache *mc, Chan *c)
-{
-	if(mc->qid.path != c->qid.path)
-		return 0;
-	if(mc->qid.type != c->qid.type)
-		return 0;
-	if(mc->devno != c->devno)
-		return 0;
-	if(mc->dev != c->dev)
-		return 0;
-	if(mc->qid.vers != c->qid.vers)
-		return 0;
-	return 1;
-}
-
-int
-cread(Chan *c, uint8_t *buf, int len, int64_t off)
-{
-	char *p;
-	Mntcache *mc;
-	Extent *e, **t;
-	int o, l, total;
-	uint32_t offset;
-
-	if(off+len > maxcache)
-		return 0;
-
-	mc = c->mc;
-	if(mc == nil)
-		return 0;
-
-	qlock(mc);
-	if(cdev(mc, c) == 0) {
-		qunlock(mc);
-		return 0;
-	}
-
-	offset = off;
-	t = &mc->list;
-	for(e = *t; e; e = e->next) {
-		if(offset >= e->start && offset < e->start+e->len)
-			break;
-		t = &e->next;
-	}
-
-	if(e == 0) {
-		qunlock(mc);
-		return 0;
-	}
-
-	total = 0;
-	while(len) {
-		p = e->cache;
-		if(p == nil){
-			*t = e->next;
-			extentfree(e);
-			qunlock(mc);
-			return total;
-		}
-
-		o = offset - e->start;
-		l = len;
-		if(l > e->len-o)
-			l = e->len-o;
-
-		if(waserror()) {
-			qunlock(mc);
-			nexterror();
-		}
-
-		jehanne_memmove(buf, p+o, l);
-
-		poperror();
-
-		buf += l;
-		len -= l;
-		offset += l;
-		total += l;
-		t = &e->next;
-		e = e->next;
-		if(e == 0 || e->start != offset)
-			break;
-	}
-
-	qunlock(mc);
-	return total;
-}
-
-Extent*
-cchain(uint8_t *buf, uint32_t offset, int len, Extent **tail)
-{
-	int l;
-	char *p;
-	Extent *e, *start, **t;
-
-	start = 0;
-	*tail = 0;
-	t = &start;
-	while(len) {
-		e = extentalloc();
-		if(e == 0)
-			break;
-
-		p = jehanne_mallocz(PGSZ, 0);
-		if(p == nil){
-			extentfree(e);
-			break;
-		}
-		l = len;
-		if(l > PGSZ)
-			l = PGSZ;
-
-		e->cache = p;
-		e->start = offset;
-		e->len = l;
-
-		jehanne_memmove(p, buf, l);
-
-		buf += l;
-		offset += l;
-		len -= l;
-
-		*t = e;
-		*tail = e;
-		t = &e->next;
-	}
-
-	return start;
-}
-
-int
-cpgmove(Extent *e, uint8_t *buf, int boff, int len)
-{
-	if(e->cache == nil){
-		/* shouldn't happen */
-		jehanne_print("CACHE: cpgmove %#p %d %d nil\n", e, boff, len);
-		return 0;
-	}
-
-	jehanne_memmove(e->cache+boff, buf, len);
-
-	return 1;
-}
-
-void
-cupdate(Chan *c, uint8_t *buf, int len, int64_t off)
-{
-	Mntcache *mc;
-	Extent *tail;
-	Extent *e, *f, *p;
-	int o, ee, eblock;
-	uint32_t offset;
-
-	if(off > maxcache || len == 0)
-		return;
-
-	mc = c->mc;
-	if(mc == nil)
-		return;
-	qlock(mc);
-	if(cdev(mc, c) == 0) {
-		qunlock(mc);
-		return;
-	}
-
-	/*
-	 * Find the insertion point
-	 */
-	offset = off;
-	p = 0;
-	for(f = mc->list; f; f = f->next) {
-		if(f->start > offset)
-			break;
-		p = f;
-	}
-
-	/* trim if there is a successor */
-	eblock = offset+len;
-	if(f != 0 && eblock > f->start) {
-		len -= (eblock - f->start);
-		if(len <= 0) {
-			qunlock(mc);
-			return;
-		}
-	}
-
-	if(p == 0) {		/* at the head */
-		e = cchain(buf, offset, len, &tail);
-		if(e != 0) {
-			mc->list = e;
-			tail->next = f;
-		}
-		qunlock(mc);
-		return;
-	}
-
-	/* trim to the predecessor */
-	ee = p->start+p->len;
-	if(offset < ee) {
-		o = ee - offset;
-		len -= o;
-		if(len <= 0) {
-			qunlock(mc);
-			return;
-		}
-		buf += o;
-		offset += o;
-	}
-
-	/* try and pack data into the predecessor */
-	if(offset == ee && p->len < PGSZ) {
-		o = len;
-		if(o > PGSZ - p->len)
-			o = PGSZ - p->len;
-		if(cpgmove(p, buf, p->len, o)) {
-			p->len += o;
-			buf += o;
-			len -= o;
-			offset += o;
-			if(len <= 0) {
-if(f && p->start + p->len > f->start) jehanne_print("CACHE: p->start=%uld p->len=%d f->start=%uld\n", p->start, p->len, f->start);
-				qunlock(mc);
-				return;
-			}
-		}
-	}
-
-	e = cchain(buf, offset, len, &tail);
-	if(e != 0) {
-		p->next = e;
-		tail->next = f;
-	}
-	qunlock(mc);
-}
-
-void
-cwrite(Chan* c, uint8_t *buf, int len, int64_t off)
-{
-	int o, eo;
-	Mntcache *mc;
-	uint32_t eblock, ee;
-	Extent *p, *f, *e, *tail;
-	uint32_t offset;
-
-	if(off > maxcache || len == 0)
-		return;
-
-	mc = c->mc;
-	if(mc == nil)
-		return;
-
-	qlock(mc);
-	if(cdev(mc, c) == 0) {
-		qunlock(mc);
-		return;
-	}
-
-	offset = off;
-	mc->qid.vers++;
-	c->qid.vers++;
-
-	p = 0;
-	for(f = mc->list; f; f = f->next) {
-		if(f->start >= offset)
-			break;
-		p = f;
-	}
-
-	if(p != 0) {
-		ee = p->start+p->len;
-		eo = offset - p->start;
-		/* pack in predecessor if there is space */
-		if(offset <= ee && eo < PGSZ) {
-			o = len;
-			if(o > PGSZ - eo)
-				o = PGSZ - eo;
-			if(cpgmove(p, buf, eo, o)) {
-				if(eo+o > p->len)
-					p->len = eo+o;
-				buf += o;
-				len -= o;
-				offset += o;
-			}
-		}
-	}
-
-	/* free the overlap -- it's a rare case */
-	eblock = offset+len;
-	while(f && f->start < eblock) {
-		e = f->next;
-		extentfree(f);
-		f = e;
-	}
-
-	/* link the block (if any) into the middle */
-	e = cchain(buf, offset, len, &tail);
-	if(e != 0) {
-		tail->next = f;
-		f = e;
-	}
-
-	if(p == 0)
-		mc->list = f;
-	else
-		p->next = f;
-	qunlock(mc);
-}
diff --git a/sys/src/kern/port/chan.c b/sys/src/kern/port/chan.c
index c07a6ca..18f0a84 100644
--- a/sys/src/kern/port/chan.c
+++ b/sys/src/kern/port/chan.c
@@ -151,7 +151,6 @@ newchan(void)
 	c->dri = 0;
 	c->aux = 0;
 	c->mchan = 0;
-	c->mc = 0;
 	c->mux = 0;
 	jehanne_memset(&c->mqid, 0, sizeof(c->mqid));
 	c->path = 0;
@@ -1442,9 +1441,6 @@ namec(char *aname, int amode, long omode, long perm)
 			/* save registers else error() in open has wrong value of c saved */
 			saveregisters();
 
-			if(omode == OEXEC)
-				c->flag &= ~CCACHE;
-
 			c = c->dev->open(c, omode&~OCEXEC);
 
 			if(omode & OCEXEC)
diff --git a/sys/src/kern/port/debug.c b/sys/src/kern/port/debug.c
index a5af1ab..182aa71 100644
--- a/sys/src/kern/port/debug.c
+++ b/sys/src/kern/port/debug.c
@@ -53,28 +53,3 @@ peekAtExecFaults(uintptr_t addr)
 	if (brk > 10)
 		brk = 1;
 }
-
-uint64_t
-rdmsr(uint32_t reg)
-{
-	extern uint64_t _rdmsr(uint32_t reg);
-	uint64_t res;
-#ifdef LOGMSR
-	jehanne_print("rdmsr(%#p)", reg);
-#endif
-	res = _rdmsr(reg);
-#ifdef LOGMSR
-	jehanne_print(" = %#P", res);
-#endif
-	return res;
-}
-
-void
-wrmsr(uint32_t reg, uint64_t val)
-{
-	extern void _wrmsr(uint32_t reg, uint64_t val);
-#ifdef LOGMSR
-	jehanne_print("wrmsr(%#p, %#P)", reg, val);
-#endif
-	_wrmsr(reg, val);
-}
diff --git a/sys/src/kern/port/dev.c b/sys/src/kern/port/dev.c
index 38412c5..9d8ff07 100644
--- a/sys/src/kern/port/dev.c
+++ b/sys/src/kern/port/dev.c
@@ -164,7 +164,6 @@ devclone(Chan *c)
 	nc->umh = nil;
 	nc->aux = c->aux;
 	nc->mqid = c->mqid;
-	nc->mc = c->mc;
 	return nc;
 }
 
diff --git a/sys/src/kern/port/dev9p.c b/sys/src/kern/port/dev9p.c
index f86cc93..411f353 100644
--- a/sys/src/kern/port/dev9p.c
+++ b/sys/src/kern/port/dev9p.c
@@ -24,16 +24,12 @@ struct Mntrpc
 	Mntrpc*	list;		/* Free/pending list */
 	Fcall	request;	/* Outgoing file system protocol message */
 	Fcall 	reply;		/* Incoming reply */
-	Mnt*	m;		/* Mount device during rpc */
-	Rendez	r;		/* Place to hang out */
-	uint8_t*	rpc;		/* I/O Data buffer */
-	uint32_t	rpclen;		/* len of buffer */
-	Block	*b;		/* reply blocks */
-	char	done;		/* Rpc completed */
-	uint64_t	stime;		/* start time for mnt statistics */
-	uint32_t	reqlen;		/* request length for mnt statistics */
-	uint32_t	replen;		/* reply length for mnt statistics */
+	Mnt*	mnt;		/* Mount device during rpc */
+	Rendez*	z;		/* Place to hang out */
+	Block*	w;		/* copy of write rpc for cache */
+	Block*	b;		/* reply blocks */
 	Mntrpc*	flushed;	/* message this one flushes */
+	char	done;		/* Rpc completed */
 };
 
 enum
@@ -46,49 +42,45 @@ enum
 struct Mntalloc
 {
 	Lock;
-	Mnt*	list;		/* Mount devices in use */
-	Mnt*	mntfree;	/* Free list */
-	Mntrpc*	rpcfree;
-	int	nrpcfree;
-	int	nrpcused;
+	Mnt*		list;		/* Mount devices in use */
+	Mnt*		mntfree;	/* Free list */
+	Mntrpc*		rpcfree;
+	uint32_t	nrpcfree;
+	uint32_t	nrpcused;
 	uint32_t	id;
 	uint32_t	tagmask[NMASK];
 }mntalloc;
 
-Mnt*	mntchk(Chan*);
-void	mntdirfix(uint8_t*, Chan*);
-Mntrpc*	mntflushalloc(Mntrpc*, uint32_t);
-void	mntflushfree(Mnt*, Mntrpc*);
-void	mntfree(Mntrpc*);
-void	mntgate(Mnt*);
-void	mntpntfree(Mnt*);
-void	mntqrm(Mnt*, Mntrpc*);
-Mntrpc*	mntralloc(Chan*, uint32_t);
-long	mntrdwr(int, Chan*, void*, long, int64_t);
-int	mntrpcread(Mnt*, Mntrpc*);
-void	mountio(Mnt*, Mntrpc*);
-void	mountmux(Mnt*, Mntrpc*);
-void	mountrpc(Mnt*, Mntrpc*);
-int	rpcattn(void*);
-Chan*	mntchan(void);
+static Chan*	mntchan(void);
+static Mnt*	mntchk(Chan*);
+static void	mntdirfix(uint8_t*, Chan*);
+static Mntrpc*	mntflushalloc(Mntrpc*);
+static Mntrpc*	mntflushfree(Mnt*, Mntrpc*);
+static void	mntfree(Mntrpc*);
+static void	mntgate(Mnt*);
+static void	mntqrm(Mnt*, Mntrpc*);
+static Mntrpc*	mntralloc(Chan*);
+static long	mntrdwr(int, Chan*, void*, long, int64_t);
+static int	mntrpcread(Mnt*, Mntrpc*);
+static void	mountio(Mnt*, Mntrpc*);
+static void	mountmux(Mnt*, Mntrpc*);
+static void	mountrpc(Mnt*, Mntrpc*);
+static int	rpcattn(void*);
 
 char	Esbadstat[] = "invalid directory entry received from server";
 char	Enoversion[] = "version not established for mount channel";
 
 
-void (*mntstats)(int, Chan*, uint64_t, uint32_t);
-
 static void
 mntreset(void)
 {
 	mntalloc.id = 1;
 	mntalloc.tagmask[0] = 1;			/* don't allow 0 as a tag */
 	mntalloc.tagmask[NMASK-1] = 0x80000000UL;	/* don't allow NOTAG */
-	jehanne_fmtinstall('F', fcallfmt);
-	jehanne_fmtinstall('D', dirfmt);
+	fmtinstall('F', fcallfmt);
+	fmtinstall('D', dirfmt);
 /* We can't install %M since eipfmt does and is used in the kernel [sape] */
 
-	cinit();
 }
 
 /*
@@ -101,12 +93,12 @@ mntversion(Chan *c, uint32_t msize, char *version, usize returnlen)
 	uint8_t *msg;
 	Mnt *mnt;
 	char *v;
-	long l, n;
-	usize k;
-	int64_t oo;
+	Queue *q;
+	int k, l;
+	unsigned long oo;
 	char buf[128];
 
-	qlock(&c->umqlock);	/* make sure no one else does this until we've established ourselves */
+	eqlock(&c->umqlock);	/* make sure no one else does this until we've established ourselves */
 	if(waserror()){
 		qunlock(&c->umqlock);
 		nexterror();
@@ -124,7 +116,7 @@ mntversion(Chan *c, uint32_t msize, char *version, usize returnlen)
 	/* validity */
 //	if(msize < 0)		// msize is unsigned, this is always false
 //		error("bad iounit in version call");
-	if(jehanne_strncmp(v, VERSION9P, jehanne_strlen(VERSION9P)) != 0)
+	if(strncmp(v, VERSION9P, strlen(VERSION9P)) != 0)
 		error("bad 9P version specification");
 
 	mnt = c->mux;
@@ -133,16 +125,16 @@ mntversion(Chan *c, uint32_t msize, char *version, usize returnlen)
 		qunlock(&c->umqlock);
 		poperror();
 
-		jehanne_strecpy(buf, buf+sizeof buf, mnt->version);
-		k = jehanne_strlen(buf);
-		if(jehanne_strncmp(buf, v, k) != 0){
-			jehanne_snprint(buf, sizeof buf, "incompatible 9P versions %s %s", mnt->version, v);
+		strecpy(buf, buf+sizeof buf, mnt->version);
+		k = strlen(buf);
+		if(strncmp(buf, v, k) != 0){
+			snprint(buf, sizeof buf, "incompatible 9P versions %s %s", mnt->version, v);
 			error(buf);
 		}
-		if(returnlen != 0){
+		if(returnlen > 0){
 			if(returnlen < k)
 				error(Eshort);
-			jehanne_memmove(version, buf, k);
+			memmove(version, buf, k);
 		}
 		return k;
 	}
@@ -151,11 +143,11 @@ mntversion(Chan *c, uint32_t msize, char *version, usize returnlen)
 	f.tag = NOTAG;
 	f.msize = msize;
 	f.version = v;
-	msg = jehanne_malloc(MAXRPC);
+	msg = malloc(MAXRPC);
 	if(msg == nil)
 		exhausted("version memory");
 	if(waserror()){
-		jehanne_free(msg);
+		free(msg);
 		nexterror();
 	}
 	k = convS2M(&f, msg, MAXRPC);
@@ -168,7 +160,6 @@ mntversion(Chan *c, uint32_t msize, char *version, usize returnlen)
 	unlock(&c->l);
 
 	l = c->dev->write(c, msg, k, oo);
-
 	if(l < k){
 		lock(&c->l);
 		c->offset -= k - l;
@@ -177,16 +168,17 @@ mntversion(Chan *c, uint32_t msize, char *version, usize returnlen)
 	}
 
 	/* message sent; receive and decode reply */
-	n = c->dev->read(c, msg, MAXRPC, c->offset);
-	if(n <= 0)
-		error("EOF receiving fversion reply");
+	for(k = 0; k < BIT32SZ || (k < GBIT32(msg) && k < 8192+IOHDRSZ); k += l){
+		l = c->dev->read(c, msg+k, 8192+IOHDRSZ-k, c->offset);
+		if(l <= 0)
+			error("EOF receiving fversion reply");
+		lock(&c->l);
+		c->offset += l;
+		unlock(&c->l);
+	}
 
-	lock(&c->l);
-	c->offset += n;
-	unlock(&c->l);
-
-	l = convM2S(msg, n, &f);
-	if(l != n)
+	l = convM2S(msg, k, &f);
+	if(l != k)
 		error("bad fversion conversion on reply");
 	if(f.type != Rversion){
 		if(f.type == Rerror)
@@ -197,9 +189,19 @@ mntversion(Chan *c, uint32_t msize, char *version, usize returnlen)
 		error("server tries to increase msize in fversion");
 	if(f.msize<256 || f.msize>1024*1024)
 		error("nonsense value of msize in fversion");
-	k = jehanne_strlen(f.version);
-	if(jehanne_strncmp(f.version, v, k) != 0)
+	k = strlen(f.version);
+	if(strncmp(f.version, v, k) != 0)
 		error("bad 9P version returned from server");
+	if(returnlen > 0 && returnlen < k)
+		error(Eshort);
+
+	v = nil;
+	kstrdup(&v, f.version);
+	q = qopen(10*MAXRPC, 0, nil, nil);
+	if(q == nil){
+		free(v);
+		exhausted("mount queues");
+	}
 
 	/* now build Mnt associated with this connection */
 	lock(&mntalloc);
@@ -207,33 +209,32 @@ mntversion(Chan *c, uint32_t msize, char *version, usize returnlen)
 	if(mnt != nil)
 		mntalloc.mntfree = mnt->list;
 	else {
-		mnt = jehanne_malloc(sizeof(Mnt));
+		unlock(&mntalloc);
+		mnt = malloc(sizeof(Mnt));
 		if(mnt == nil) {
-			unlock(&mntalloc);
+			qfree(q);
+			free(v);
 			exhausted("mount devices");
 		}
+		lock(&mntalloc);
 	}
 	mnt->list = mntalloc.list;
 	mntalloc.list = mnt;
-	mnt->version = nil;
-	kstrdup(&mnt->version, f.version);
+	mnt->version = v;
 	mnt->id = mntalloc.id++;
-	mnt->q = qopen(10*MAXRPC, 0, nil, nil);
+	mnt->q = q;
 	mnt->msize = f.msize;
 	unlock(&mntalloc);
 
-	if(returnlen != 0){
-		if(returnlen < k)
-			error(Eshort);
-		jehanne_memmove(version, f.version, k);
-	}
+	if(returnlen > 0)
+		memmove(version, f.version, k);	/* length was checked above */
 
 	poperror();	/* msg */
-	jehanne_free(msg);
+	free(msg);
 
 	lock(&mnt->l);
-	mnt->queue = 0;
-	mnt->rip = 0;
+	mnt->queue = nil;
+	mnt->rip = nil;
 
 	c->flag |= CMSG;
 	c->mux = mnt;
@@ -253,9 +254,8 @@ mntauth(Chan *c, char *spec)
 	Mntrpc *r;
 
 	mnt = c->mux;
-
 	if(mnt == nil){
-		mntversion(c, MAXRPC, VERSION9P, 0);
+		mntversion(c, 0, nil, 0);
 		mnt = c->mux;
 		if(mnt == nil)
 			error(Enoversion);
@@ -270,8 +270,7 @@ mntauth(Chan *c, char *spec)
 		nexterror();
 	}
 
-	r = mntralloc(0, mnt->msize);
-
+	r = mntralloc(c);
 	if(waserror()) {
 		mntfree(r);
 		nexterror();
@@ -288,6 +287,7 @@ mntauth(Chan *c, char *spec)
 	incref(&mnt->c->r);
 	c->mqid = c->qid;
 	c->mode = ORDWR;
+	c->iounit = mnt->msize-IOHDRSZ;
 
 	poperror();	/* r */
 	mntfree(r);
@@ -305,7 +305,6 @@ mntattach(Chan *c, Chan *ac, char *spec, int flags)
 	Mntrpc *r;
 
 	mnt = c->mux;
-
 	if(mnt == nil){
 		mntversion(c, 0, nil, 0);
 		mnt = c->mux;
@@ -322,13 +321,11 @@ mntattach(Chan *c, Chan *ac, char *spec, int flags)
 		nexterror();
 	}
 
-	r = mntralloc(0, mnt->msize);
-
+	r = mntralloc(c);
 	if(waserror()) {
 		mntfree(r);
 		nexterror();
 	}
-
 	r->request.type = Tattach;
 	r->request.fid = c->fid;
 	if(ac == nil)
@@ -349,12 +346,18 @@ mntattach(Chan *c, Chan *ac, char *spec, int flags)
 
 	poperror();	/* c */
 
-	if(flags & MCACHE)
-		c->flag |= CCACHE;
 	return c;
 }
+#if 0
+static Chan*
+noattach(Chan *c, Chan *ac, char *spec, int flags)
+{
+	error(Enoattach);
+	return nil;
+}
+#endif
 
-Chan*
+static Chan*
 mntchan(void)
 {
 	Chan *c;
@@ -364,7 +367,7 @@ mntchan(void)
 	c->devno = mntalloc.id++;
 	unlock(&mntalloc);
 
-	if(c->mchan)
+	if(c->mchan != nil)
 		panic("mntchan non-zero %#p", c->mchan);
 	return c;
 }
@@ -378,7 +381,7 @@ mntwalk(Chan *c, Chan *nc, char **name, int nname)
 	Walkqid *wq;
 
 	if(nc != nil)
-		jehanne_print("mntwalk: nc != nil\n");
+		print("mntwalk: nc != nil\n");
 	if(nname > MAXWELEM)
 		error("devmnt: too many name elements");
 	alloc = 0;
@@ -386,20 +389,20 @@ mntwalk(Chan *c, Chan *nc, char **name, int nname)
 	if(waserror()){
 		if(alloc && wq->clone!=nil)
 			cclose(wq->clone);
-		jehanne_free(wq);
+		free(wq);
 		return nil;
 	}
 
 	alloc = 0;
 	mnt = mntchk(c);
-	r = mntralloc(c, mnt->msize);
+	r = mntralloc(c);
 	if(nc == nil){
 		nc = devclone(c);
 		/*
-		 * Until the other side accepts this fid,
-		 * we can't mntclose it.
-		 * nc->dev remains nil for now.
+		 * Until the other side accepts this fid, we can't mntclose it.
+		 * Therefore set type to 0 for now; rootclose is known to be safe.
 		 */
+		nc->dev = nil;
 		alloc = 1;
 	}
 	wq->clone = nc;
@@ -412,7 +415,7 @@ mntwalk(Chan *c, Chan *nc, char **name, int nname)
 	r->request.fid = c->fid;
 	r->request.newfid = nc->fid;
 	r->request.nwname = nname;
-	jehanne_memmove(r->request.wname, name, nname*sizeof(char*));
+	memmove(r->request.wname, name, nname*sizeof(char*));
 
 	mountrpc(mnt, r);
 
@@ -423,7 +426,7 @@ mntwalk(Chan *c, Chan *nc, char **name, int nname)
 			cclose(nc);
 		wq->clone = nil;
 		if(r->reply.nwqid == 0){
-			jehanne_free(wq);
+			free(wq);
 			wq = nil;
 			goto Return;
 		}
@@ -433,8 +436,6 @@ mntwalk(Chan *c, Chan *nc, char **name, int nname)
 	if(wq->clone != nil){
 		if(wq->clone != c){
 			wq->clone->dev = c->dev;
-			//if(wq->clone->dev != nil)	//XDYNX
-			//	devtabincr(wq->clone->dev);
 			wq->clone->mchan = c->mchan;
 			incref(&c->mchan->r);
 		}
@@ -457,12 +458,11 @@ mntstat(Chan *c, uint8_t *dp, long n)
 {
 	Mnt *mnt;
 	Mntrpc *r;
-	usize nstat;
 
 	if(n < BIT16SZ)
 		error(Eshortstat);
 	mnt = mntchk(c);
-	r = mntralloc(c, mnt->msize);
+	r = mntralloc(c);
 	if(waserror()) {
 		mntfree(r);
 		nexterror();
@@ -472,18 +472,17 @@ mntstat(Chan *c, uint8_t *dp, long n)
 	mountrpc(mnt, r);
 
 	if(r->reply.nstat > n){
-		nstat = BIT16SZ;
+		n = BIT16SZ;
 		PBIT16(dp, r->reply.nstat-2);
 	}else{
-		nstat = r->reply.nstat;
-		jehanne_memmove(dp, r->reply.stat, nstat);
-		validstat(dp, nstat);
+		n = r->reply.nstat;
+		memmove(dp, r->reply.stat, n);
+		validstat(dp, n);
 		mntdirfix(dp, c);
 	}
 	poperror();
 	mntfree(r);
-
-	return nstat;
+	return n;
 }
 
 static unsigned long
@@ -564,7 +563,7 @@ mntopencreate(int type, Chan *c, char *name, unsigned long omode, int perm)
 	Mntrpc *r;
 
 	mnt = mntchk(c);
-	r = mntralloc(c, mnt->msize);
+	r = mntralloc(c);
 	if(waserror()) {
 		mntfree(r);
 		nexterror();
@@ -588,9 +587,6 @@ mntopencreate(int type, Chan *c, char *name, unsigned long omode, int perm)
 	poperror();
 	mntfree(r);
 
-	if(c->flag & CCACHE)
-		copen(c);
-
 	return c;
 }
 
@@ -612,13 +608,13 @@ mntclunk(Chan *c, int t)
 	Mnt *mnt;
 	Mntrpc *r;
 
+
 	mnt = mntchk(c);
-	r = mntralloc(c, mnt->msize);
+	r = mntralloc(c);
 	if(waserror()){
 		mntfree(r);
 		nexterror();
 	}
-
 	r->request.type = t;
 	r->request.fid = c->fid;
 	mountrpc(mnt, r);
@@ -629,27 +625,22 @@ mntclunk(Chan *c, int t)
 void
 muxclose(Mnt *mnt)
 {
-	Mntrpc *q, *r;
+	Mnt *f, **l;
+	Mntrpc *r;
 
-	for(q = mnt->queue; q; q = r) {
-		r = q->list;
-		mntfree(q);
+	while((r = mnt->queue) != nil){
+		mnt->queue = r->list;
+		mntfree(r);
 	}
 	mnt->id = 0;
-	jehanne_free(mnt->version);
+	free(mnt->version);
 	mnt->version = nil;
-	mntpntfree(mnt);
-}
-
-void
-mntpntfree(Mnt *mnt)
-{
-	Mnt *f, **l;
-	Queue *q;
+	qfree(mnt->q);
+	mnt->q = nil;
 
 	lock(&mntalloc);
 	l = &mntalloc.list;
-	for(f = *l; f; f = f->list) {
+	for(f = *l; f != nil; f = f->list) {
 		if(f == mnt) {
 			*l = mnt->list;
 			break;
@@ -658,10 +649,7 @@ mntpntfree(Mnt *mnt)
 	}
 	mnt->list = mntalloc.mntfree;
 	mntalloc.mntfree = mnt;
-	q = mnt->q;
 	unlock(&mntalloc);
-
-	qfree(q);
 }
 
 static void
@@ -683,7 +671,7 @@ mntwstat(Chan *c, uint8_t *dp, long n)
 	Mntrpc *r;
 
 	mnt = mntchk(c);
-	r = mntralloc(c, mnt->msize);
+	r = mntralloc(c);
 	if(waserror()) {
 		mntfree(r);
 		nexterror();
@@ -695,6 +683,7 @@ mntwstat(Chan *c, uint8_t *dp, long n)
 	mountrpc(mnt, r);
 	poperror();
 	mntfree(r);
+
 	return n;
 }
 
@@ -702,33 +691,11 @@ static long
 mntread(Chan *c, void *buf, long n, int64_t off)
 {
 	uint8_t *p, *e;
-	int nc, cache, isdir;
-	usize dirlen;
-
-	isdir = 0;
-	cache = c->flag & CCACHE;
-	if(c->qid.type & QTDIR) {
-		cache = 0;
-		isdir = 1;
-	}
+	int dirlen;
 
 	p = buf;
-	if(cache) {
-		nc = cread(c, buf, n, off);
-		if(nc > 0) {
-			n -= nc;
-			if(n == 0)
-				return nc;
-			p += nc;
-			off += nc;
-		}
-		n = mntrdwr(Tread, c, p, n, off);
-		cupdate(c, p, n, off);
-		return n + nc;
-	}
-
-	n = mntrdwr(Tread, c, buf, n, off);
-	if(isdir) {
+	n = mntrdwr(Tread, c, p, n, off);
+	if(c->qid.type & QTDIR) {
 		for(e = &p[n]; p+BIT16SZ < e; p += dirlen){
 			dirlen = BIT16SZ+GBIT16(p);
 			if(p+dirlen > e)
@@ -754,17 +721,18 @@ mntrdwr(int type, Chan *c, void *buf, long n, int64_t off)
 	Mnt *mnt;
  	Mntrpc *r;
 	char *uba;
-	int cache;
 	uint32_t cnt, nr, nreq;
 
 	mnt = mntchk(c);
 	uba = buf;
 	cnt = 0;
-	cache = c->flag & CCACHE;
-	if(c->qid.type & QTDIR)
-		cache = 0;
+
 	for(;;) {
-		r = mntralloc(c, mnt->msize);
+		nreq = n;
+		if(nreq > c->iounit)
+			nreq = c->iounit;
+
+		r = mntralloc(c);
 		if(waserror()) {
 			mntfree(r);
 			nexterror();
@@ -773,23 +741,16 @@ mntrdwr(int type, Chan *c, void *buf, long n, int64_t off)
 		r->request.fid = c->fid;
 		r->request.offset = off;
 		r->request.data = uba;
-		nr = n;
-		if(nr > c->iounit)
-			nr = c->iounit;
-		r->request.count = nr;
+		r->request.count = nreq;
 		mountrpc(mnt, r);
-		nreq = r->request.count;
 		nr = r->reply.count;
 		if(nr > nreq)
 			nr = nreq;
-
 		if(type == Tread)
-			r->b = bl2mem((uint8_t*)uba, r->b, nr);
-		else if(cache)
-			cwrite(c, (uint8_t*)uba, nr, off);
-
-		poperror();
+			nr = readblist(r->b, (uint8_t*)uba, nr, 0);
 		mntfree(r);
+		poperror();
+
 		off += nr;
 		uba += nr;
 		cnt += nr;
@@ -826,7 +787,7 @@ mountrpc(Mnt *mnt, Mntrpc *r)
 		cn = "?";
 		if(r->c != nil && r->c->path != nil)
 			cn = r->c->path->s;
-		jehanne_print("mnt: proc %s %d: mismatch from %s %s rep %#p tag %d fid %d T%d R%d rp %d\n",
+		print("mnt: proc %s %d: mismatch from %s %s rep %#p tag %d fid %d T%d R%d rp %d\n",
 			up->text, up->pid, sn, cn,
 			r, r->request.tag, r->request.fid, r->request.type,
 			r->reply.type, r->reply.tag);
@@ -837,42 +798,58 @@ mountrpc(Mnt *mnt, Mntrpc *r)
 void
 mountio(Mnt *mnt, Mntrpc *r)
 {
+	Block *b;
 	int n;
 
 	while(waserror()) {
 		if(mnt->rip == up)
 			mntgate(mnt);
-		if(jehanne_strcmp(up->errstr, Eintr) != 0){
-			mntflushfree(mnt, r);
+		if(strcmp(up->errstr, Eintr) != 0 || waserror()){
+			r = mntflushfree(mnt, r);
+			switch(r->request.type){
+			case Tremove:
+			case Tclunk:
+				/* botch, abandon fid */
+				if(strcmp(up->errstr, Ehungup) != 0)
+					r->c->fid = 0;
+			}
 			nexterror();
 		}
-		r = mntflushalloc(r, mnt->msize);
+		r = mntflushalloc(r);
+		poperror();
 	}
 
 	lock(&mnt->l);
-	r->m = mnt;
+	r->z = &up->sleep;
+	r->mnt = mnt;
 	r->list = mnt->queue;
 	mnt->queue = r;
 	unlock(&mnt->l);
 
 	/* Transmit a file system rpc */
-	if(mnt->msize == 0)
-		panic("msize");
-	n = convS2M(&r->request, r->rpc, mnt->msize);
-	if(n < 0)
-		panic("bad message type in mountio");
-	if(mnt->c->dev->write(mnt->c, r->rpc, n, 0) != n)
+	n = sizeS2M(&r->request);
+	b = allocb(n);
+	if(waserror()){
+		freeb(b);
+		nexterror();
+	}
+	n = convS2M(&r->request, b->wp, n);
+	if(n <= 0 || n > mnt->msize) {
+		print("mountio: proc %s %lud: convS2M returned %d for tag %d fid %d T%d\n",
+			up->text, up->pid, n, r->request.tag, r->request.fid, r->request.type);
 		error(Emountrpc);
-	r->stime = fastticks(nil);
-	r->reqlen = n;
+	}
+	b->wp += n;
+	poperror();
+	mnt->c->dev->bwrite(mnt->c, b, 0);
 
 	/* Gate readers onto the mount point one at a time */
 	for(;;) {
 		lock(&mnt->l);
-		if(mnt->rip == 0)
+		if(mnt->rip == nil)
 			break;
 		unlock(&mnt->l);
-		sleep(&r->r, rpcattn, r);
+		sleep(r->z, rpcattn, r);
 		if(r->done){
 			poperror();
 			mntflushfree(mnt, r);
@@ -898,18 +875,13 @@ doread(Mnt *mnt, int len)
 
 	while(qlen(mnt->q) < len){
 		b = mnt->c->dev->bread(mnt->c, mnt->msize, 0);
-		if(b == nil)
+		if(b == nil || qaddlist(mnt->q, b) == 0)
 			return -1;
-		if(blocklen(b) == 0){
-			freeblist(b);
-			return -1;
-		}
-		qaddlist(mnt->q, b);
 	}
 	return 0;
 }
 
-int
+static int
 mntrpcread(Mnt *mnt, Mntrpc *r)
 {
 	int i, t, len, hlen;
@@ -946,7 +918,7 @@ mntrpcread(Mnt *mnt, Mntrpc *r)
 
 	if(convM2S(nb->rp, len, &r->reply) <= 0){
 		/* bad message, dump it */
-		jehanne_print("mntrpcread: convM2S failed\n");
+		print("mntrpcread: convM2S failed\n");
 		qdiscard(mnt->q, len);
 		return -1;
 	}
@@ -969,7 +941,7 @@ mntrpcread(Mnt *mnt, Mntrpc *r)
 		} else {
 			/* split block and put unused bit back */
 			nb = allocb(i-len);
-			jehanne_memmove(nb->wp, b->rp+len, i-len);
+			memmove(nb->wp, b->rp+len, i-len);
 			b->wp = b->rp+len;
 			nb->wp += i-len;
 			qputback(mnt->q, nb);
@@ -987,10 +959,10 @@ mntgate(Mnt *mnt)
 	Mntrpc *q;
 
 	lock(&mnt->l);
-	mnt->rip = 0;
-	for(q = mnt->queue; q; q = q->list) {
+	mnt->rip = nil;
+	for(q = mnt->queue; q != nil; q = q->list) {
 		if(q->done == 0)
-		if(wakeup(&q->r))
+		if(wakeup(q->z))
 			break;
 	}
 	unlock(&mnt->l);
@@ -1000,6 +972,7 @@ void
 mountmux(Mnt *mnt, Mntrpc *r)
 {
 	Mntrpc **l, *q;
+	Rendez *z;
 
 	lock(&mnt->l);
 	l = &mnt->queue;
@@ -1007,42 +980,41 @@ mountmux(Mnt *mnt, Mntrpc *r)
 		/* look for a reply to a message */
 		if(q->request.tag == r->reply.tag) {
 			*l = q->list;
-			if(q != r) {
-				/*
-				 * Completed someone else.
-				 * Trade pointers to receive buffer.
-				 */
-				q->reply = r->reply;
-				q->b = r->b;
-				r->b = nil;
+			if(q == r) {
+				q->done = 1;
+				unlock(&mnt->l);
+				return;
 			}
+			/*
+			 * Completed someone else.
+			 * Trade pointers to receive buffer.
+			 */
+			q->reply = r->reply;
+			q->b = r->b;
+			r->b = nil;
+			z = q->z;
+			coherence();
 			q->done = 1;
-			if(mntstats != nil)
-				(*mntstats)(q->request.type,
-					mnt->c, q->stime,
-					q->reqlen + r->replen);
-			if(q != r)
-				wakeup(&q->r);
+			wakeup(z);
 			unlock(&mnt->l);
 			return;
 		}
 		l = &q->list;
 	}
 	unlock(&mnt->l);
-	jehanne_print("unexpected reply tag %ud; type %d\n", r->reply.tag, r->reply.type);
+	print("unexpected reply tag %ud; type %d\n", r->reply.tag, r->reply.type);
 }
 
 /*
  * Create a new flush request and chain the previous
  * requests from it
  */
-Mntrpc*
-mntflushalloc(Mntrpc *r, uint32_t iounit)
+static Mntrpc*
+mntflushalloc(Mntrpc *r)
 {
 	Mntrpc *fr;
 
-	fr = mntralloc(0, iounit);
-
+	fr = mntralloc(r->c);
 	fr->request.type = Tflush;
 	if(r->request.type == Tflush)
 		fr->request.oldtag = r->request.oldtag;
@@ -1058,23 +1030,25 @@ mntflushalloc(Mntrpc *r, uint32_t iounit)
  *  flush and the original message from the unanswered
  *  request queue.  Mark the original message as done
  *  and if it hasn't been answered set the reply to to
- *  Rflush.
+ *  Rflush. Return the original rpc.
  */
-void
+static Mntrpc*
 mntflushfree(Mnt *mnt, Mntrpc *r)
 {
 	Mntrpc *fr;
 
-	while(r){
+	while(r != nil){
 		fr = r->flushed;
 		if(!r->done){
 			r->reply.type = Rflush;
 			mntqrm(mnt, r);
 		}
-		if(fr)
-			mntfree(r);
+		if(fr == nil)
+			break;
+		mntfree(r);
 		r = fr;
 	}
+	return r;
 }
 
 int
@@ -1097,52 +1071,33 @@ alloctag(void)
 	return NOTAG;
 }
 
-void
+static void
 freetag(int t)
 {
 	mntalloc.tagmask[t>>TAGSHIFT] &= ~(1<<(t&TAGMASK));
 }
 
-Mntrpc*
-mntralloc(Chan *c, uint32_t msize)
+static Mntrpc*
+mntralloc(Chan *c)
 {
 	Mntrpc *new;
 
-	lock(&mntalloc);
-	new = mntalloc.rpcfree;
-	if(new == nil){
-		new = jehanne_malloc(sizeof(Mntrpc));
+	if(mntalloc.nrpcfree == 0) {
+	Alloc:
+		new = malloc(sizeof(Mntrpc));
+		if(new == nil)
+			exhausted("mount rpc header");
+		lock(&mntalloc);
+		new->request.tag = alloctag();
+	} else {
+		lock(&mntalloc);
+		new = mntalloc.rpcfree;
 		if(new == nil) {
 			unlock(&mntalloc);
-			exhausted("mount rpc header");
+			goto Alloc;
 		}
-		/*
-		 * The header is split from the data buffer as
-		 * mountmux may swap the buffer with another header.
-		 */
-		new->rpc = jehanne_mallocz(msize, 0);
-		if(new->rpc == nil){
-			jehanne_free(new);
-			unlock(&mntalloc);
-			exhausted("mount rpc buffer");
-		}
-		new->rpclen = msize;
-		new->request.tag = alloctag();
-	}
-	else {
 		mntalloc.rpcfree = new->list;
 		mntalloc.nrpcfree--;
-		if(new->rpclen < msize){
-			jehanne_free(new->rpc);
-			new->rpc = jehanne_mallocz(msize, 0);
-			if(new->rpc == nil){
-				jehanne_free(new);
-				mntalloc.nrpcused--;
-				unlock(&mntalloc);
-				exhausted("mount rpc buffer");
-			}
-			new->rpclen = msize;
-		}
 	}
 	mntalloc.nrpcused++;
 	unlock(&mntalloc);
@@ -1150,27 +1105,27 @@ mntralloc(Chan *c, uint32_t msize)
 	new->done = 0;
 	new->flushed = nil;
 	new->b = nil;
+	new->w = nil;
 	return new;
 }
 
-void
+static void
 mntfree(Mntrpc *r)
 {
-	if(r->b != nil)
-		freeblist(r->b);
+	freeb(r->w);
+	freeblist(r->b);
 	lock(&mntalloc);
-	if(mntalloc.nrpcfree >= 10){
-		jehanne_free(r->rpc);
-		freetag(r->request.tag);
-		jehanne_free(r);
-	}
-	else{
+	mntalloc.nrpcused--;
+	if(mntalloc.nrpcfree < 32) {
 		r->list = mntalloc.rpcfree;
 		mntalloc.rpcfree = r;
 		mntalloc.nrpcfree++;
+		unlock(&mntalloc);
+		return;
 	}
-	mntalloc.nrpcused--;
+	freetag(r->request.tag);
 	unlock(&mntalloc);
+	free(r);
 }
 
 void
@@ -1182,7 +1137,7 @@ mntqrm(Mnt *mnt, Mntrpc *r)
 	r->done = 1;
 
 	l = &mnt->queue;
-	for(f = *l; f; f = f->list) {
+	for(f = *l; f != nil; f = f->list) {
 		if(f == r) {
 			*l = r->list;
 			break;
@@ -1198,14 +1153,12 @@ mntchk(Chan *c)
 	Mnt *mnt;
 
 	/* This routine is mostly vestiges of prior lives; now it's just sanity checking */
-
 	if(c->mchan == nil)
 		panic("mntchk 1: nil mchan c %s\n", chanpath(c));
 
 	mnt = c->mchan->mux;
-
 	if(mnt == nil)
-		jehanne_print("mntchk 2: nil mux c %s c->mchan %s \n", chanpath(c), chanpath(c->mchan));
+		print("mntchk 2: nil mux c %s c->mchan %s \n", chanpath(c), chanpath(c->mchan));
 
 	/*
 	 * Was it closed and reused (was error(Eshutdown); now, it cannot happen)
@@ -1221,7 +1174,7 @@ mntchk(Chan *c)
  * reflect local values.  These entries are known to be
  * the first two in the Dir encoding after the count.
  */
-void
+static void
 mntdirfix(uint8_t *dirbuf, Chan *c)
 {
 	uint32_t r;
@@ -1239,7 +1192,7 @@ rpcattn(void *v)
 	Mntrpc *r;
 
 	r = v;
-	return r->done || r->m->rip == 0;
+	return r->done || r->mnt->rip == nil;
 }
 
 Dev ninepdevtab = {
diff --git a/sys/src/kern/port/devcons.c b/sys/src/kern/port/devcons.c
index ba841a1..f251314 100644
--- a/sys/src/kern/port/devcons.c
+++ b/sys/src/kern/port/devcons.c
@@ -44,7 +44,7 @@ struct Consdev
 };
 
 void	(*consdebug)(void) = nil;
-void	(*consputs)(char*, int) = nil;
+void	(*screenputs)(char*, int) = nil;
 
 static void kmesgputs(char *, int);
 static void kprintputs(char*, int);
@@ -64,7 +64,7 @@ static	Queue*	kbdqs[Nconsdevs];
 static	int	kbdprocs[Nconsdevs];
 static	Queue*	kbdq;		/* unprocessed console input */
 static	Queue*	lineq;		/* processed console input */
-//static	Queue*	serialoq;	/* serial console output */ // not used
+	Queue*	serialoq;	/* serial console output */
 static	Queue*	kprintoq;	/* console output, for /dev/kprint */
 static	uint32_t	kprintinuse;	/* test and set whether /dev/kprint is open */
 
@@ -124,8 +124,8 @@ Cmdtab rebootmsg[] =
 static void
 kprintputs(char *s, int n)
 {
-	if(consputs != nil)
-		consputs(s, n);
+	if(screenputs != nil)
+		screenputs(s, n);
 }
 
 int
@@ -352,12 +352,6 @@ putstrn(char *str, int n)
 	putstrn0(str, n, 0);
 }
 
-void
-jehanne__assert(const char *s)
-{
-	panic("assert failed at %#p: %s\n", getcallerpc(), s);
-}
-
 int
 jehanne_print(char *fmt, ...)
 {
@@ -400,7 +394,7 @@ int
 iprint(char *fmt, ...)
 {
 	Mreg s;
-	int i, n, locked, mlocked;
+	int i, n, locked; //, mlocked;
 	va_list arg;
 	char buf[PRINTSIZE];
 
@@ -408,13 +402,13 @@ iprint(char *fmt, ...)
 	va_start(arg, fmt);
 	n = jehanne_vseprint(buf, buf+sizeof(buf), fmt, arg) - buf;
 	va_end(arg);
-	mlocked = malloclocked();
+//	mlocked = malloclocked();
 	locked = iprintcanlock(&iprintlock);
 	for(i = 0; i < nconsdevs; i++){
 		if((consdevs[i].flags&Ciprint) != 0){
-			if(consdevs[i].q != nil && !mlocked)
-				qiwrite(consdevs[i].q, buf, n);
-			else
+//			if(consdevs[i].q != nil && !mlocked)
+//				qiwrite(consdevs[i].q, buf, n);
+//			else
 				consdevs[i].fn(buf, n);
 		}
 	}
@@ -438,8 +432,8 @@ panic(char *fmt, ...)
 
 	panicking = 1;
 
-	if(malloclocked())
-		consdevs[2].q = nil;	/* force direct uart output */
+//	if(malloclocked())
+//		consdevs[2].q = nil;	/* force direct uart output */
 	consdevs[1].q = nil;	/* don't try to write to /dev/kprint */
 
 	splhi();
@@ -464,7 +458,7 @@ panic(char *fmt, ...)
 #pragma profile 1
 /* libmp at least contains a few calls to sysfatal; simulate with panic */
 void
-sysfatal(char *fmt, ...)
+jehanne_sysfatal(char *fmt, ...)
 {
 	char err[256];
 	va_list arg;
@@ -476,7 +470,7 @@ sysfatal(char *fmt, ...)
 }
 
 void
-_assert(char *fmt)
+jehanne__assert(const char *fmt)
 {
 	panic("assert failed at %#p: %s", getcallerpc(), fmt);
 }
@@ -554,7 +548,6 @@ echo(char *buf, int n)
 			dumpstack();
 			return;
 		case 'x':
-			ixsummary();
 			mallocsummary();
 			return;
 		case 'd':
diff --git a/sys/src/kern/port/devdraw.c b/sys/src/kern/port/devdraw.c
index eec6f2c..2488c35 100644
--- a/sys/src/kern/port/devdraw.c
+++ b/sys/src/kern/port/devdraw.c
@@ -59,8 +59,6 @@ typedef struct Refresh Refresh;
 typedef struct Refx Refx;
 typedef struct DName DName;
 
-uint32_t blanktime = 30;	/* in minutes; a half hour */
-
 struct Draw
 {
 	int		clientid;
@@ -70,9 +68,6 @@ struct Draw
 	DName*		name;
 	int		vers;
 	int		softscreen;
-	int		blanked;	/* screen turned off */
-	uint64_t	blanktime;	/* time of last operation */
-	uint32_t	savemap[3*256];
 };
 
 struct Client
@@ -82,7 +77,8 @@ struct Client
 	CScreen*	cscreen;
 	Refresh*	refresh;
 	Rendez		refrend;
-	unsigned char*		readdata;
+	QLock		refq;
+	uint8_t*		readdata;
 	int		nreaddata;
 	int		busy;
 	int		clientid;
@@ -117,10 +113,10 @@ struct FChar
 {
 	int		minx;	/* left edge of bits */
 	int		maxx;	/* right edge of bits */
-	unsigned char		miny;	/* first non-zero scan-line */
-	unsigned char		maxy;	/* last non-zero scan-line + 1 */
-	char		left;	/* offset of baseline */
-	unsigned char		width;	/* width of baseline */
+	uint8_t		miny;	/* first non-zero scan-line */
+	uint8_t		maxy;	/* last non-zero scan-line + 1 */
+	int8_t		left;	/* offset of baseline */
+	uint8_t		width;	/* width of baseline */
 };
 
 /*
@@ -192,10 +188,9 @@ static	char Ewriteoutside[] =	"writeimage outside image";
 static	char Enotfont[] =	"image not a font";
 static	char Eindex[] =		"character index out of range";
 static	char Enoclient[] =	"no such draw client";
-//static	char Edepth[] =		"image has bad depth";
 static	char Enameused[] =	"image name in use";
 static	char Enoname[] =	"no image with that name";
-static	char Eoldname[] =	"named image no int32_ter valid";
+static	char Eoldname[] =	"named image no longer valid";
 static	char Enamed[] = 	"image already has name";
 static	char Ewrongname[] = 	"wrong name for image";
 
@@ -205,11 +200,13 @@ dlock(void)
 	qlock(&drawlock);
 }
 
+#if 0
 static int
 candlock(void)
 {
 	return canqlock(&drawlock);
 }
+#endif
 
 static void
 dunlock(void)
@@ -218,7 +215,7 @@ dunlock(void)
 }
 
 static int
-drawgen(Chan *c, char *cc, Dirtab *dt, int i, int s, Dir *dp)
+drawgen(Chan *c, char* _, Dirtab* __, int ___, int s, Dir *dp)
 {
 	int t;
 	Qid q;
@@ -237,10 +234,9 @@ drawgen(Chan *c, char *cc, Dirtab *dt, int i, int s, Dir *dp)
 		case Q3rd:
 			cl = drawclientofpath(c->qid.path);
 			if(cl == nil)
-				jehanne_strncpy(up->genbuf, "??", sizeof up->genbuf);
+				strcpy(up->genbuf, "??");
 			else
-				jehanne_snprint(up->genbuf, sizeof up->genbuf,
-					"%d", cl->clientid);
+				sprint(up->genbuf, "%d", cl->clientid);
 			mkqid(&q, Q2nd, 0, QTDIR);
 			devdir(c, q, up->genbuf, 0, eve, 0500, dp);
 			break;
@@ -254,25 +250,17 @@ drawgen(Chan *c, char *cc, Dirtab *dt, int i, int s, Dir *dp)
 	 * Top level directory contains the name of the device.
 	 */
 	t = QID(c->qid);
-	if(t == Qtopdir){
-		switch(s){
-		case 0:
-			mkqid(&q, Q2nd, 0, QTDIR);
-			devdir(c, q, "draw", 0, eve, 0555, dp);
-			break;
-		case 1:
+	if(t == Qtopdir || t == Qwinname){
+		if(s == 1 || t == Qwinname){
 			mkqid(&q, Qwinname, 0, QTFILE);
 			devdir(c, q, "winname", 0, eve, 0444, dp);
-			break;
-		default:
-			return -1;
 		}
-		return 1;
-	}
-
-	if(t == Qwinname){
-		mkqid(&q, Qwinname, 0, QTFILE);
-		devdir(c, q, "winname", 0, eve, 0444, dp);
+		else if(s == 0){
+			mkqid(&q, Q2nd, 0, QTDIR);
+			devdir(c, q, "draw", 0, eve, 0555, dp);
+		}
+		else
+			return -1;
 		return 1;
 	}
 
@@ -288,8 +276,7 @@ drawgen(Chan *c, char *cc, Dirtab *dt, int i, int s, Dir *dp)
 			cl = sdraw.client[s-1];
 			if(cl == 0)
 				return 0;
-			jehanne_snprint(up->genbuf, sizeof up->genbuf, "%d",
-				cl->clientid);
+			sprint(up->genbuf, "%d", cl->clientid);
 			mkqid(&q, (s<<QSHIFT)|Q3rd, 0, QTDIR);
 			devdir(c, q, up->genbuf, 0, eve, 0555, dp);
 			return 1;
@@ -350,7 +337,7 @@ drawrefreshscreen(DImage *l, Client *client)
 
 static
 void
-drawrefresh(Memimage *m, Rectangle r, void *v)
+drawrefresh(Memimage* _, Rectangle r, void *v)
 {
 	Refx *x;
 	DImage *d;
@@ -367,7 +354,7 @@ drawrefresh(Memimage *m, Rectangle r, void *v)
 			combinerect(&ref->r, r);
 			return;
 		}
-	ref = jehanne_malloc(sizeof(Refresh));
+	ref = malloc(sizeof(Refresh));
 	if(ref){
 		ref->dimage = d;
 		ref->r = r;
@@ -382,9 +369,8 @@ addflush(Rectangle r)
 	int abb, ar, anbb;
 	Rectangle nbb;
 
-	if(sdraw.softscreen==0 || !rectclip(&r, screenimage->r))
+	if(sdraw.softscreen==0 || screenimage == nil || !rectclip(&r, screenimage->r))
 		return;
-
 	if(flushrect.min.x >= flushrect.max.x){
 		flushrect = r;
 		waste = 0;
@@ -430,13 +416,7 @@ dstflush(int dstid, Memimage *dst, Rectangle r)
 		combinerect(&flushrect, r);
 		return;
 	}
-	/* how can this happen? -rsc, dec 12 2002 */
-	if(dst == 0){
-		jehanne_print("nil dstflush\n");
-		return;
-	}
-	l = dst->layer;
-	if(l == nil)
+	if(screenimage == nil || dst == nil || (l = dst->layer) == nil)
 		return;
 	do{
 		if(l->screen->image->data != screenimage->data)
@@ -450,7 +430,7 @@ dstflush(int dstid, Memimage *dst, Rectangle r)
 void
 drawflush(void)
 {
-	if(flushrect.min.x < flushrect.max.x)
+	if(screenimage && flushrect.min.x < flushrect.max.x)
 		flushmemscreen(flushrect);
 	flushrect = Rect(10000, 10000, -10000, -10000);
 }
@@ -459,9 +439,9 @@ static
 int
 drawcmp(char *a, char *b, int n)
 {
-	if(jehanne_strlen(a) != n)
+	if(strlen(a) != n)
 		return 1;
-	return jehanne_memcmp(a, b, n);
+	return memcmp(a, b, n);
 }
 
 DName*
@@ -489,7 +469,7 @@ drawgoodname(DImage *d)
 			return 0;
 	if(d->name == nil)
 		return 1;
-	n = drawlookupname(jehanne_strlen(d->name), d->name);
+	n = drawlookupname(strlen(d->name), d->name);
 	if(n==nil || n->vers!=d->vers)
 		return 0;
 	return 1;
@@ -548,7 +528,7 @@ allocdimage(Memimage *i)
 {
 	DImage *d;
 
-	d = jehanne_malloc(sizeof(DImage));
+	d = malloc(sizeof(DImage));
 	if(d == 0)
 		return 0;
 	d->ref = 1;
@@ -582,22 +562,22 @@ drawinstallscreen(Client *client, DScreen *d, int id, DImage *dimage, DImage *df
 	Memscreen *s;
 	CScreen *c;
 
-	c = jehanne_malloc(sizeof(CScreen));
+	c = malloc(sizeof(CScreen));
 	if(dimage && dimage->image && dimage->image->chan == 0)
 		panic("bad image %p in drawinstallscreen", dimage->image);
 
 	if(c == 0)
 		return 0;
 	if(d == 0){
-		d = jehanne_malloc(sizeof(DScreen));
+		d = malloc(sizeof(DScreen));
 		if(d == 0){
-			jehanne_free(c);
+			free(c);
 			return 0;
 		}
-		s = jehanne_malloc(sizeof(Memscreen));
+		s = malloc(sizeof(Memscreen));
 		if(s == 0){
-			jehanne_free(c);
-			jehanne_free(d);
+			free(c);
+			free(d);
 			return 0;
 		}
 		s->frontmost = 0;
@@ -632,8 +612,9 @@ drawdelname(DName *name)
 {
 	int i;
 
+	free(name->name);
 	i = name-sdraw.name;
-	jehanne_memmove(name, name+1, (sdraw.nname-(i+1))*sizeof(DName));
+	memmove(name, name+1, (sdraw.nname-(i+1))*sizeof(DName));
 	sdraw.nname--;
 }
 
@@ -644,7 +625,7 @@ drawfreedscreen(DScreen *this)
 
 	this->ref--;
 	if(this->ref < 0)
-		jehanne_print("negative ref in drawfreedscreen\n");
+		print("negative ref in drawfreedscreen\n");
 	if(this->ref > 0)
 		return;
 	ds = dscreen;
@@ -666,8 +647,8 @@ drawfreedscreen(DScreen *this)
 		drawfreedimage(this->dimage);
 	if(this->dfill)
 		drawfreedimage(this->dfill);
-	jehanne_free(this->screen);
-	jehanne_free(this);
+	free(this->screen);
+	free(this);
 }
 
 void
@@ -679,7 +660,7 @@ drawfreedimage(DImage *dimage)
 
 	dimage->ref--;
 	if(dimage->ref < 0)
-		jehanne_print("negative ref in drawfreedimage\n");
+		print("negative ref in drawfreedimage\n");
 	if(dimage->ref > 0)
 		return;
 
@@ -693,15 +674,13 @@ drawfreedimage(DImage *dimage)
 		drawfreedimage(dimage->fromname);
 		goto Return;
 	}
-//	if(dimage->image == screenimage)	/* don't free the display */
-//		goto Return;
 	ds = dimage->dscreen;
 	if(ds){
 		l = dimage->image;
-		if(l->data == screenimage->data)
+		if(screenimage && l->data == screenimage->data)
 			addflush(l->layer->screenr);
 		if(l->layer->refreshfn == drawrefresh)	/* else true owner will clean up */
-			jehanne_free(l->layer->refreshptr);
+			free(l->layer->refreshptr);
 		l->layer->refreshptr = nil;
 		if(drawgoodname(dimage))
 			memldelete(l);
@@ -711,8 +690,8 @@ drawfreedimage(DImage *dimage)
 	}else
 		freememimage(dimage->image);
     Return:
-	jehanne_free(dimage->fchar);
-	jehanne_free(dimage);
+	free(dimage->fchar);
+	free(dimage);
 }
 
 void
@@ -724,14 +703,14 @@ drawuninstallscreen(Client *client, CScreen *this)
 	if(cs == this){
 		client->cscreen = this->next;
 		drawfreedscreen(this->dscreen);
-		jehanne_free(this);
+		free(this);
 		return;
 	}
 	while(next = cs->next){	/* assign = */
 		if(next == this){
 			cs->next = this->next;
 			drawfreedscreen(this->dscreen);
-			jehanne_free(this);
+			free(this);
 			return;
 		}
 		cs = next;
@@ -772,14 +751,13 @@ drawaddname(Client *client, DImage *di, int n, char *str)
 	for(; name<ename; name++)
 		if(drawcmp(name->name, str, n) == 0)
 			error(Enameused);
-	t = sqmalloc((sdraw.nname+1)*sizeof(DName));
-	jehanne_memmove(t, sdraw.name, sdraw.nname*sizeof(DName));
-	jehanne_free(sdraw.name);
+	t = smalloc((sdraw.nname+1)*sizeof(DName));
+	memmove(t, sdraw.name, sdraw.nname*sizeof(DName));
+	free(sdraw.name);
 	sdraw.name = t;
 	new = &sdraw.name[sdraw.nname++];
-	jehanne_memset(new, 0, sizeof(DName));	// clear the new element.
-	new->name = sqmalloc(n+1);
-	jehanne_memmove(new->name, str, n);
+	new->name = smalloc(n+1);
+	memmove(new->name, str, n);
 	new->name[n] = 0;
 	new->dimage = di;
 	new->client = client;
@@ -798,19 +776,19 @@ drawnewclient(void)
 			break;
 	}
 	if(i == sdraw.nclient){
-		cp = jehanne_malloc((sdraw.nclient+1)*sizeof(Client*));
+		cp = malloc((sdraw.nclient+1)*sizeof(Client*));
 		if(cp == 0)
 			return 0;
-		jehanne_memmove(cp, sdraw.client, sdraw.nclient*sizeof(Client*));
-		jehanne_free(sdraw.client);
+		memmove(cp, sdraw.client, sdraw.nclient*sizeof(Client*));
+		free(sdraw.client);
 		sdraw.client = cp;
 		sdraw.nclient++;
 		cp[i] = 0;
 	}
-	cl = jehanne_malloc(sizeof(Client));
+	cl = malloc(sizeof(Client));
 	if(cl == 0)
 		return 0;
-	jehanne_memset(cl, 0, sizeof(Client));
+	memset(cl, 0, sizeof(Client));
 	cl->slot = i;
 	cl->clientid = ++sdraw.clientid;
 	cl->op = SoverD;
@@ -867,7 +845,7 @@ drawclient(Chan *c)
 }
 
 Memimage*
-drawimage(Client *client, unsigned char *a)
+drawimage(Client *client, uint8_t *a)
 {
 	DImage *d;
 
@@ -878,7 +856,7 @@ drawimage(Client *client, unsigned char *a)
 }
 
 void
-drawrectangle(Rectangle *r, unsigned char *a)
+drawrectangle(Rectangle *r, uint8_t *a)
 {
 	r->min.x = BGLONG(a+0*4);
 	r->min.y = BGLONG(a+1*4);
@@ -887,7 +865,7 @@ drawrectangle(Rectangle *r, unsigned char *a)
 }
 
 void
-drawpoint(Point *p, unsigned char *a)
+drawpoint(Point *p, uint8_t *a)
 {
 	p->x = BGLONG(a+0*4);
 	p->y = BGLONG(a+1*4);
@@ -947,34 +925,44 @@ makescreenimage(void)
 	Memdata *md;
 	Memimage *i;
 	Rectangle r;
+	uint8_t *data;
 
-	md = jehanne_malloc(sizeof *md);
-	if(md == nil)
-		return nil;
-	md->allocd = 1;
-	md->base = nil;
-	md->bdata = attachscreen(&r, &chan, &depth, &width, &sdraw.softscreen);
-	if(md->bdata == nil){
-		jehanne_free(md);
-		return nil;
-	}
-	md->ref = 1;
-	i = allocmemimaged(r, chan, md);
-	if(i == nil){
-		jehanne_free(md);
+	if((data = attachscreen(&r, &chan, &depth, &width, &sdraw.softscreen)) == nil)
 		return nil;
+	if(sdraw.softscreen == 0xa110c){
+		/* hack: softscreen is memimage. */
+		md = *((Memdata**)(data - sizeof(uint32_t) - sizeof(Memdata*)));
+
+		assert(md->bdata == data);
+		assert(md->ref > 1);
+		assert(md->allocd);
+
+		if((i = allocmemimaged(r, chan, md)) == nil){
+			md->ref--;
+			return nil;
+		}
+	}else{
+		if((md = malloc(sizeof *md)) == nil)
+			return nil;
+		md->allocd = 1;
+		md->base = nil;
+		md->bdata = data;
+		md->ref = 1;
+		if((i = allocmemimaged(r, chan, md)) == nil){
+			free(md);
+			return nil;
+		}
 	}
 	i->width = width;
 	i->clipr = r;
-
 	di = allocdimage(i);
 	if(di == nil){
 		freememimage(i);	/* frees md */
 		return nil;
 	}
 	if(!waserror()){
-		jehanne_snprint(screenname, sizeof screenname, "noborder.screen.%d", ++screennameid);
-		drawaddname(nil, di, jehanne_strlen(screenname), screenname);
+		snprint(screenname, sizeof screenname, "noborder.screen.%d", ++screennameid);
+		drawaddname(nil, di, strlen(screenname), screenname);
 		poperror();
 	}
 	return di;
@@ -1083,7 +1071,7 @@ drawopen(Chan *c, unsigned long omode)
 			error(Einuse);
 		cl->busy = 1;
 		flushrect = Rect(10000, 10000, -10000, -10000);
-		dn = drawlookupname(jehanne_strlen(screenname), screenname);
+		dn = drawlookupname(strlen(screenname), screenname);
 		if(dn == 0)
 			error("draw: cannot happen 2");
 		if(drawinstall(cl, 0, dn->dimage->image, 0) == 0)
@@ -1092,8 +1080,8 @@ drawopen(Chan *c, unsigned long omode)
 		if(di == 0)
 			error("draw: cannot happen 1");
 		di->vers = dn->vers;
-		di->name = sqmalloc(jehanne_strlen(screenname)+1);
-		jehanne_strcpy(di->name, screenname);
+		di->name = smalloc(strlen(screenname)+1);
+		strcpy(di->name, screenname);
 		di->fromname = dn->dimage;
 		di->fromname->ref++;
 		incref(&cl->r);
@@ -1137,7 +1125,7 @@ drawclose(Chan *c)
 	if((c->flag&COPEN) && (decref(&cl->r)==0)){
 		while(r = cl->refresh){	/* assign = */
 			cl->refresh = r->next;
-			jehanne_free(r);
+			free(r);
 		}
 		/* free names */
 		for(i=0; i<sdraw.nname; )
@@ -1158,7 +1146,7 @@ drawclose(Chan *c)
 		}
 		sdraw.client[cl->slot] = 0;
 		drawflush();	/* to erase visible, now dead windows */
-		jehanne_free(cl);
+		free(cl);
 	}
 	dunlock();
 	poperror();
@@ -1170,7 +1158,7 @@ drawread(Chan *c, void *a, long n, int64_t off)
 	int index, m;
 	uint32_t red, green, blue;
 	Client *cl;
-	unsigned char *p;
+	uint8_t *p;
 	Refresh *r;
 	DImage *di;
 	Memimage *i;
@@ -1204,30 +1192,25 @@ drawread(Chan *c, void *a, long n, int64_t off)
 				error(Enodrawimage);
 			i = di->image;
 		}
-		n = jehanne_snprint(a, n,
-			"%11d %11d %11s %11d %11d %11d %11d %11d %11d %11d %11d %11d ",
-			cl->clientid, cl->infoid, chantostr(buf, i->chan),
-			(i->flags&Frepl)==Frepl,
+		n = sprint(a, "%11d %11d %11s %11d %11d %11d %11d %11d %11d %11d %11d %11d",
+			cl->clientid, cl->infoid, chantostr(buf, i->chan), (i->flags&Frepl)==Frepl,
 			i->r.min.x, i->r.min.y, i->r.max.x, i->r.max.y,
-			i->clipr.min.x, i->clipr.min.y, i->clipr.max.x,
-			i->clipr.max.y);
+			i->clipr.min.x, i->clipr.min.y, i->clipr.max.x, i->clipr.max.y);
+		((char*)a)[n++] = ' ';
 		cl->infoid = -1;
 		break;
 
 	case Qcolormap:
-		drawactive(1);	/* to restore map from backup */
-		p = jehanne_malloc(4*12*256+1);
+		p = malloc(4*12*256+1);
 		if(p == 0)
 			error(Enomem);
 		m = 0;
 		for(index = 0; index < 256; index++){
 			getcolor(index, &red, &green, &blue);
-			m += jehanne_snprint((char*)p+m, 4*12*256+1 - m,
-				"%11d %11lud %11lud %11lud\n", index,
-				red>>24, green>>24, blue>>24);
+			m += sprint((char*)p+m, "%11d %11lud %11lud %11lud\n", index, red>>24, green>>24, blue>>24);
 		}
 		n = readstr(offset, a, n, (char*)p);
-		jehanne_free(p);
+		free(p);
 		break;
 
 	case Qdata:
@@ -1236,8 +1219,8 @@ drawread(Chan *c, void *a, long n, int64_t off)
 		if(n < cl->nreaddata)
 			error(Eshortread);
 		n = cl->nreaddata;
-		jehanne_memmove(a, cl->readdata, cl->nreaddata);
-		jehanne_free(cl->readdata);
+		memmove(a, cl->readdata, cl->nreaddata);
+		free(cl->readdata);
 		cl->readdata = nil;
 		break;
 
@@ -1249,11 +1232,18 @@ drawread(Chan *c, void *a, long n, int64_t off)
 				break;
 			dunlock();
 			if(waserror()){
-				dlock();	/* restore lock for waserror() above */
+				dlock();
+				nexterror();
+			}
+			eqlock(&cl->refq);
+			if(waserror()){
+				qunlock(&cl->refq);
 				nexterror();
 			}
 			sleep(&cl->refrend, drawrefactive, cl);
 			poperror();
+			qunlock(&cl->refq);
+			poperror();
 			dlock();
 		}
 		p = a;
@@ -1265,12 +1255,12 @@ drawread(Chan *c, void *a, long n, int64_t off)
 			BPLONG(p+3*4, r->r.max.x);
 			BPLONG(p+4*4, r->r.max.y);
 			cl->refresh = r->next;
-			jehanne_free(r);
+			free(r);
 			p += 5*4;
 			n -= 5*4;
 		}
 		cl->refreshme = 0;
-		n = p-(unsigned char*)a;
+		n = p-(uint8_t*)a;
 		break;
 	}
 	dunlock();
@@ -1292,7 +1282,7 @@ drawwakeall(void)
 }
 
 static long
-drawwrite(Chan *c, void *a, long n, int64_t nn)
+drawwrite(Chan *c, void *a, long n, int64_t _)
 {
 	char buf[128], *fields[4], *q;
 	Client *cl;
@@ -1311,18 +1301,17 @@ drawwrite(Chan *c, void *a, long n, int64_t nn)
 	case Qctl:
 		if(n != 4)
 			error("unknown draw control request");
-		cl->infoid = BGLONG((unsigned char*)a);
+		cl->infoid = BGLONG((uint8_t*)a);
 		break;
 
 	case Qcolormap:
-		drawactive(1);	/* to restore map from backup */
 		m = n;
 		n = 0;
 		while(m > 0){
 			x = m;
 			if(x > sizeof(buf)-1)
 				x = sizeof(buf)-1;
-			q = jehanne_memccpy(buf, a, '\n', x);
+			q = memccpy(buf, a, '\n', x);
 			if(q == 0)
 				break;
 			i = q-buf;
@@ -1330,12 +1319,12 @@ drawwrite(Chan *c, void *a, long n, int64_t nn)
 			a = (char*)a + i;
 			m -= i;
 			*q = 0;
-			if(jehanne_tokenize(buf, fields, nelem(fields)) != 4)
+			if(tokenize(buf, fields, nelem(fields)) != 4)
 				error(Ebadarg);
-			i = jehanne_strtoul(fields[0], 0, 0);
-			red = jehanne_strtoul(fields[1], 0, 0);
-			green = jehanne_strtoul(fields[2], 0, 0);
-			blue = jehanne_strtoul(fields[3], &q, 0);
+			i = strtoul(fields[0], 0, 0);
+			red = strtoul(fields[1], 0, 0);
+			green = strtoul(fields[2], 0, 0);
+			blue = strtoul(fields[3], &q, 0);
 			if(fields[3] == q)
 				error(Ebadarg);
 			if(red>255 || green>255 || blue>255 || i<0 || i>255)
@@ -1363,8 +1352,8 @@ drawwrite(Chan *c, void *a, long n, int64_t nn)
 	return n;
 }
 
-unsigned char*
-drawcoord(unsigned char *p, unsigned char *maxp, int oldx, int *newx)
+uint8_t*
+drawcoord(uint8_t *p, uint8_t *maxp, int oldx, int *newx)
 {
 	int b, x;
 
@@ -1389,48 +1378,45 @@ drawcoord(unsigned char *p, unsigned char *maxp, int oldx, int *newx)
 }
 
 static void
-printmesg(char *fmt, unsigned char *a, int plsprnt)
+printmesg(char *fmt, uint8_t *a, int plsprnt)
 {
 	char buf[256];
 	char *p, *q;
-	int left;
 
 	if(1|| plsprnt==0){
-		SET(q); SET(p);
-		USED(fmt); USED(a); USED(buf); USED(p); USED(q);
+		SET(s,q,p);
+		USED(fmt, a, buf, p, q, s);
 		return;
 	}
 	q = buf;
 	*q++ = *a++;
 	for(p=fmt; *p; p++){
-		left = sizeof buf - 2 - (q - buf);	/* 2 for \n\0 */
 		switch(*p){
 		case 'l':
-			q += jehanne_snprint(q, left, " %ld", (int32_t)BGLONG(a));
+			q += sprint(q, " %ld", (long)BGLONG(a));
 			a += 4;
 			break;
 		case 'L':
-			q += jehanne_snprint(q, left, " %.8lux", (uint32_t)BGLONG(a));
+			q += sprint(q, " %.8lux", (uint32_t)BGLONG(a));
 			a += 4;
 			break;
 		case 'R':
-			q += jehanne_snprint(q, left, " [%d %d %d %d]", BGLONG(a),
-				BGLONG(a+4), BGLONG(a+8), BGLONG(a+12));
+			q += sprint(q, " [%d %d %d %d]", BGLONG(a), BGLONG(a+4), BGLONG(a+8), BGLONG(a+12));
 			a += 16;
 			break;
 		case 'P':
-			q += jehanne_snprint(q, left, " [%d %d]", BGLONG(a), BGLONG(a+4));
+			q += sprint(q, " [%d %d]", BGLONG(a), BGLONG(a+4));
 			a += 8;
 			break;
 		case 'b':
-			q += jehanne_snprint(q, left, " %d", *a++);
+			q += sprint(q, " %d", *a++);
 			break;
 		case 's':
-			q += jehanne_snprint(q, left, " %d", BGSHORT(a));
+			q += sprint(q, " %d", BGSHORT(a));
 			a += 2;
 			break;
 		case 'S':
-			q += jehanne_snprint(q, left, " %.4ux", BGSHORT(a));
+			q += sprint(q, " %.4ux", BGSHORT(a));
 			a += 2;
 			break;
 		}
@@ -1444,7 +1430,7 @@ void
 drawmesg(Client *client, void *av, int n)
 {
 	int c, repl, m, y, dstid, scrnid, ni, ci, j, nw, e0, e1, op, ox, oy, oesize, esize, doflush;
-	unsigned char *u, *a, refresh;
+	uint8_t *u, *a, refresh;
 	char *fmt;
 	uint32_t value, chan;
 	Rectangle r, clipr;
@@ -1481,7 +1467,7 @@ drawmesg(Client *client, void *av, int n)
 			if(n < m)
 				error(Eshortdraw);
 			dstid = BGLONG(a+1);
-			scrnid = BGSHORT(a+5);
+			scrnid = BGLONG(a+5);
 			refresh = a[9];
 			chan = BGLONG(a+10);
 			repl = a[14];
@@ -1522,7 +1508,7 @@ drawmesg(Client *client, void *av, int n)
 				if(reffn){
 					refx = nil;
 					if(reffn == drawrefresh){
-						refx = jehanne_malloc(sizeof(Refx));
+						refx = malloc(sizeof(Refx));
 						if(refx == 0){
 							drawuninstall(client, dstid);
 							error(Edrawmem);
@@ -1609,7 +1595,6 @@ drawmesg(Client *client, void *av, int n)
 			m = 1+1;
 			if(n < m)
 				error(Eshortdraw);
-			drawdebug = a[1];
 			continue;
 
 		/* ellipse: 'e' dstid[4] srcid[4] center[2*4] a[4] b[4] thick[4] sp[2*4] alpha[4] phi[4]*/
@@ -1686,11 +1671,11 @@ drawmesg(Client *client, void *av, int n)
 			ni = BGLONG(a+5);
 			if(ni<=0 || ni>4096)
 				error("bad font size (4096 chars max)");
-			jehanne_free(font->fchar);	/* should we complain if non-zero? */
-			font->fchar = jehanne_malloc(ni*sizeof(FChar));
+			free(font->fchar);	/* should we complain if non-zero? */
+			font->fchar = malloc(ni*sizeof(FChar));
 			if(font->fchar == 0)
 				error("no memory for font");
-			jehanne_memset(font->fchar, 0, ni*sizeof(FChar));
+			memset(font->fchar, 0, ni*sizeof(FChar));
 			font->nfchar = ni;
 			font->ascent = a[9];
 			continue;
@@ -1785,10 +1770,10 @@ drawmesg(Client *client, void *av, int n)
 			if(di == 0)
 				error("draw: cannot happen");
 			di->vers = dn->vers;
-			di->name = sqmalloc(j+1);
+			di->name = smalloc(j+1);
 			di->fromname = dn->dimage;
 			di->fromname->ref++;
-			jehanne_memmove(di->name, a+6, j);
+			memmove(di->name, a+6, j);
 			di->name[j] = 0;
 			client->infoid = dstid;
 			continue;
@@ -1880,11 +1865,11 @@ drawmesg(Client *client, void *av, int n)
 			drawpoint(&sp, a+23);
 			drawpoint(&p, a+31);
 			ni++;
-			pp = jehanne_malloc(ni*sizeof(Point));
+			pp = malloc(ni*sizeof(Point));
 			if(pp == nil)
 				error(Enomem);
 			doflush = 0;
-			if(dstid==0 || (dst->layer && dst->layer->screen->image->data == screenimage->data))
+			if(dstid==0 || (screenimage && dst->layer && dst->layer->screen->image->data == screenimage->data))
 				doflush = 1;	/* simplify test in loop */
 			ox = oy = 0;
 			esize = 0;
@@ -1928,7 +1913,7 @@ drawmesg(Client *client, void *av, int n)
 				mempoly(dst, pp, ni, e0, e1, j, src, sp, op);
 			else
 				memfillpoly(dst, pp, ni, e0, src, sp, op);
-			jehanne_free(pp);
+			free(pp);
 			m = u-a;
 			continue;
 
@@ -1944,13 +1929,13 @@ drawmesg(Client *client, void *av, int n)
 				error(Ereadoutside);
 			c = bytesperline(r, i->depth);
 			c *= Dy(r);
-			jehanne_free(client->readdata);
-			client->readdata = jehanne_mallocz(c, 0);
+			free(client->readdata);
+			client->readdata = mallocz(c, 0);
 			if(client->readdata == nil)
 				error("readimage malloc failed");
 			client->nreaddata = memunload(i, r, client->readdata, c);
 			if(client->nreaddata < 0){
-				jehanne_free(client->readdata);
+				free(client->readdata);
 				client->readdata = nil;
 				error("bad readimage call");
 			}
@@ -2055,11 +2040,11 @@ drawmesg(Client *client, void *av, int n)
 			m += nw*4;
 			if(n < m)
 				error(Eshortdraw);
-			lp = jehanne_malloc(nw*sizeof(Memimage*));
+			lp = malloc(nw*sizeof(Memimage*));
 			if(lp == 0)
 				error(Enomem);
 			if(waserror()){
-				jehanne_free(lp);
+				free(lp);
 				nexterror();
 			}
 			for(j=0; j<nw; j++)
@@ -2073,13 +2058,13 @@ drawmesg(Client *client, void *av, int n)
 				memltofrontn(lp, nw);
 			else
 				memltorearn(lp, nw);
-			if(lp[0]->layer->screen->image->data == screenimage->data)
+			if(screenimage && lp[0]->layer->screen->image->data == screenimage->data)
 				for(j=0; j<nw; j++)
 					addflush(lp[j]->layer->screenr);
 			ll = drawlookup(client, BGLONG(a+1+1+2), 1);
 			drawrefreshscreen(ll, client);
 			poperror();
-			jehanne_free(lp);
+			free(lp);
 			continue;
 
 		/* visible: 'v' */
@@ -2145,7 +2130,6 @@ drawcmap(void)
 	int num, den;
 	int i, j;
 
-	drawactive(1);	/* to restore map from backup */
 	for(r=0,i=0; r!=4; r++)
 	    for(v=0; v!=4; v++,i+=16){
 		for(g=0,j=v-r; g!=4; g++)
@@ -2168,61 +2152,3 @@ drawcmap(void)
 		    }
 	}
 }
-
-void
-drawblankscreen(int blank)
-{
-	int i, nc;
-	uint32_t *p;
-
-	if(blank == sdraw.blanked)
-		return;
-	if(!candlock())
-		return;
-	if(screenimage == nil){
-		dunlock();
-		return;
-	}
-	p = sdraw.savemap;
-	nc = screenimage->depth > 8 ? 256 : 1<<screenimage->depth;
-
-	/*
-	 * blankscreen uses the hardware to blank the screen
-	 * when possible.  to help in cases when it is not possible,
-	 * we set the color map to be all black.
-	 */
-	if(blank == 0){	/* turn screen on */
-		for(i=0; i<nc; i++, p+=3)
-			setcolor(i, p[0], p[1], p[2]);
-		blankscreen(0);
-	}else{	/* turn screen off */
-		blankscreen(1);
-		for(i=0; i<nc; i++, p+=3){
-			getcolor(i, &p[0], &p[1], &p[2]);
-			setcolor(i, 0, 0, 0);
-		}
-	}
-	sdraw.blanked = blank;
-	dunlock();
-}
-
-/*
- * record activity on screen, changing blanking as appropriate
- */
-void
-drawactive(int active)
-{
-	if(active){
-		drawblankscreen(0);
-		sdraw.blanktime = sys->ticks;
-	}else{
-		if(blanktime && sdraw.blanktime && TK2SEC(sys->ticks - sdraw.blanktime)/60 >= blanktime)
-			drawblankscreen(1);
-	}
-}
-
-int
-drawidletime(void)
-{
-	return TK2SEC(m->ticks - sdraw.blanktime)/60;
-}
diff --git a/sys/src/kern/port/devmouse.c b/sys/src/kern/port/devmouse.c
index 3fc30c7..8d218b5 100644
--- a/sys/src/kern/port/devmouse.c
+++ b/sys/src/kern/port/devmouse.c
@@ -40,25 +40,21 @@ struct Mousestate
 
 struct Mouseinfo
 {
-	Lock 		_lock;
+	Lock;
 	Mousestate;
-	int		dx;
-	int		dy;
-	int		track;		/* dx & dy updated */
+	int		inbuttons;	/* buttons from /dev/mousein */
 	int		redraw;		/* update cursor on screen */
+	Rendez		redrawr;	/* wait for cursor screen updates */
 	uint32_t	lastcounter;	/* value when /dev/mouse read */
-	uint32_t	lastresize;
-	uint32_t	resize;
-	Rendez		rend;
-	Ref 		r;
-	QLock		ql;
+	int		resize;		/* generate resize event */
+	Rendez		r;
+	Ref;
 	int		open;
 	int		acceleration;
 	int		maxacc;
 	Mousestate	queue[16];	/* circular buffer of click events */
-	int		ri;		/* read index into queue */
-	int		wi;		/* write index into queue */
-	unsigned char	qfull;		/* queue is full */
+	uint32_t	ri;		/* read index into queue */
+	uint32_t	wi;		/* write index into queue */
 };
 
 enum
@@ -66,6 +62,9 @@ enum
 	CMbuttonmap,
 	CMscrollswap,
 	CMswap,
+	CMblank,
+	CMblanktime,
+	CMtwitch,
 	CMwildcard,
 };
 
@@ -74,20 +73,20 @@ static Cmdtab mousectlmsg[] =
 	CMbuttonmap,	"buttonmap",	0,
 	CMscrollswap,	"scrollswap",	0,
 	CMswap,		"swap",		1,
+	CMblank,	"blank",	1,
+	CMblanktime,	"blanktime",	2,
+	CMtwitch,	"twitch",	1,
 	CMwildcard,	"*",		0,
 };
 
 Mouseinfo	mouse;
 Cursorinfo	cursor;
-int		mouseshifted;
-int		kbdbuttons;
-void		(*kbdmouse)(int);
 Cursor		curs;
 
 void	Cursortocursor(Cursor*);
+void	mouseblankscreen(int);
 int	mousechanged(void*);
-
-static void mouseclock(void);
+void	mouseredraw(void);
 
 enum{
 	Qdir,
@@ -98,37 +97,45 @@ enum{
 };
 
 static Dirtab mousedir[]={
-	".",	{Qdir, 0, QTDIR},	0,			DMDIR|0555,
-	"cursor",	{Qcursor},	0,			0666,
-	"mouse",	{Qmouse},	0,			0666,
-	"mousein",	{Qmousein},	0,			0220,
-	"mousectl",	{Qmousectl},	0,			0220,
+	".",		{Qdir, 0, QTDIR},	0,	DMDIR|0555,
+	"cursor",	{Qcursor},		0,	0666,
+	"mouse",	{Qmouse},		0,	0666,
+	"mousein",	{Qmousein},		0,	0220,
+	"mousectl",	{Qmousectl},		0,	0220,
 };
 
-static unsigned char buttonmap[8] = {
+static uint8_t buttonmap[8] = {
 	0, 1, 2, 3, 4, 5, 6, 7,
 };
 static int mouseswap;
 static int scrollswap;
 static uint32_t mousetime;
+static uint32_t blanktime = 30;	/* in minutes; a half hour */
 
 extern Memimage* gscreen;
-extern uint32_t kerndate;
+
+Cursor	arrow = {
+	{ -1, -1 },
+	{ 0xFF, 0xFF, 0x80, 0x01, 0x80, 0x02, 0x80, 0x0C,
+	  0x80, 0x10, 0x80, 0x10, 0x80, 0x08, 0x80, 0x04,
+	  0x80, 0x02, 0x80, 0x01, 0x80, 0x02, 0x8C, 0x04,
+	  0x92, 0x08, 0x91, 0x10, 0xA0, 0xA0, 0xC0, 0x40,
+	},
+	{ 0x00, 0x00, 0x7F, 0xFE, 0x7F, 0xFC, 0x7F, 0xF0,
+	  0x7F, 0xE0, 0x7F, 0xE0, 0x7F, 0xF0, 0x7F, 0xF8,
+	  0x7F, 0xFC, 0x7F, 0xFE, 0x7F, 0xFC, 0x73, 0xF8,
+	  0x61, 0xF0, 0x60, 0xE0, 0x40, 0x40, 0x00, 0x00,
+	},
+};
 
 static void
 mousereset(void)
 {
+	if(!sys->monitor)
+		return;
+
 	curs = arrow;
 	Cursortocursor(&arrow);
-	/* redraw cursor about 30 times per second */
-	addclock0link(mouseclock, 33);
-}
-
-static void
-mousefromkbd(int buttons)
-{
-	kbdbuttons = buttons;
-	mousetrack(0, 0, 0, TK2MS(sys->ticks));
 }
 
 static int
@@ -142,35 +149,38 @@ mousedevgen(Chan *c, char *name, Dirtab *tab, int ntab, int i, Dir *dp)
 	return rc;
 }
 
+static void mouseproc(void*);
+
 static void
 mouseinit(void)
 {
+	if(!sys->monitor)
+		return;
+
 	curs = arrow;
 	Cursortocursor(&arrow);
-	cursoron(1);
-	kbdmouse = mousefromkbd;
+	cursoron();
 	mousetime = seconds();
+
+	kproc("mouse", mouseproc, 0);
 }
 
 static Chan*
 mouseattach(Chan *c, Chan *ac, char *spec, int flags)
 {
+	if(!sys->monitor)
+		error(Egreg);
 	return devattach('m', spec);
 }
 
 static Walkqid*
 mousewalk(Chan *c, Chan *nc, char **name, int nname)
 {
-	Walkqid *wq;
-
 	/*
 	 * We use devgen() and not mousedevgen() here
 	 * see "Ugly problem" in dev.c/devwalk()
 	 */
-	wq = devwalk(c, nc, name, nname, mousedir, nelem(mousedir), devgen);
-	if(wq != nil && wq->clone != c && wq->clone != nil && (wq->clone->qid.type&QTDIR)==0)
-		incref(&mouse.r);
-	return wq;
+	return devwalk(c, nc, name, nname, mousedir, nelem(mousedir), devgen);
 }
 
 static long
@@ -182,58 +192,59 @@ mousestat(Chan *c, uint8_t *db, long n)
 static Chan*
 mouseopen(Chan *c, unsigned long omode)
 {
+	int mode;
+
+	mode = openmode(omode);
 	switch((uint32_t)c->qid.path){
 	case Qdir:
 		if(omode != OREAD)
 			error(Eperm);
 		break;
-	case Qmouse:
-		lock(&mouse._lock);
-		if(mouse.open){
-			unlock(&mouse._lock);
-			error(Einuse);
-		}
-		mouse.open = 1;
-		ainc(&mouse.r.ref);
-		mouse.lastresize = mouse.resize;
-		unlock(&mouse._lock);
-		break;
 	case Qmousein:
 		if(!iseve())
 			error(Eperm);
+		c->aux = malloc(sizeof(Mousestate));
+		if(c->aux == nil)
+			error(Enomem);
 		break;
-	default:
-		incref(&mouse.r);
+	case Qmouse:
+		if(tas32(&mouse.open) != 0)
+			error(Einuse);
+		mouse.lastcounter = mouse.counter;
+		mouse.resize = 0;
+		mousetime = seconds();
+		/* wet floor */
+	case Qcursor:
+		incref(&mouse);
 	}
-	c->mode = openmode(omode);
+	c->mode = mode;
 	c->flag |= COPEN;
 	c->offset = 0;
 	return c;
 }
 
-static Chan*
-mousecreate(Chan *c, char *j, unsigned long i, unsigned long u)
-{
-	error(Eperm);
-	return nil;
-}
-
 static void
 mouseclose(Chan *c)
 {
-	if((c->qid.type&QTDIR)==0 && (c->flag&COPEN)){
-		if(c->qid.path == Qmousein)
+	if((c->qid.type&QTDIR)!=0 || (c->flag&COPEN)==0)
+		return;
+	switch((uint32_t)c->qid.path){
+	case Qmousein:
+		mouse.inbuttons &= ~((Mousestate*)c->aux)->buttons;
+		free(c->aux);	/* Mousestate */
+		c->aux = nil;
+		return;
+	case Qmouse:
+		mouse.open = 0;
+		mouseblankscreen(0);
+		/* wet floor */
+	case Qcursor:
+		if(decref(&mouse) != 0)
 			return;
-		lock(&mouse._lock);
-		if(c->qid.path == Qmouse)
-			mouse.open = 0;
-		if(adec(&mouse.r.ref) == 0){
-			cursoroff(1);
-			curs = arrow;
-			Cursortocursor(&arrow);
-			cursoron(1);
-		}
-		unlock(&mouse._lock);
+		cursoroff();
+		curs = arrow;
+		Cursortocursor(&arrow);
+		cursoron();
 	}
 }
 
@@ -242,7 +253,7 @@ static long
 mouseread(Chan *c, void *va, long n, int64_t off)
 {
 	char buf[1+4*12+1];
-	unsigned char *p;
+	uint8_t *p;
 	uint32_t offset = off;
 	Mousestate m;
 	int b;
@@ -258,40 +269,28 @@ mouseread(Chan *c, void *va, long n, int64_t off)
 		if(n < 2*4+2*2*16)
 			error(Eshort);
 		n = 2*4+2*2*16;
-		lock(&cursor.l);
 		BPLONG(p+0, curs.offset.x);
 		BPLONG(p+4, curs.offset.y);
-		jehanne_memmove(p+8, curs.clr, 2*16);
-		jehanne_memmove(p+40, curs.set, 2*16);
-		unlock(&cursor.l);
+		memmove(p+8, curs.clr, 2*16);
+		memmove(p+40, curs.set, 2*16);
 		return n;
 
 	case Qmouse:
-		while(mousechanged(0) == 0)
-			sleep(&mouse.rend, mousechanged, 0);
-
-		mouse.qfull = 0;
-		mousetime = seconds();
-
-		/*
-		 * No lock of the indices is necessary here, because ri is only
-		 * updated by us, and there is only one mouse reader
-		 * at a time.  I suppose that more than one process
-		 * could try to read the fd at one time, but such behavior
-		 * is degenerate and already violates the calling
-		 * conventions for sleep above.
-		 */
-		if(mouse.ri != mouse.wi) {
-			m = mouse.queue[mouse.ri];
-			if(++mouse.ri == nelem(mouse.queue))
-				mouse.ri = 0;
-		} else {
-			while(!canlock(&cursor.l))
-				tsleep(&up->sleep, return0, 0, TK2MS(1));
-
-			m = mouse.Mousestate;
-			unlock(&cursor.l);
+		while(!mousechanged(nil)){
+			tsleep(&mouse.r, mousechanged, nil, 30*1000);
+			if(blanktime && !mousechanged(nil) &&
+			   (seconds() - mousetime) >= blanktime*60)
+				mouseblankscreen(1);
 		}
+		mousetime = seconds();
+		mouseblankscreen(0);
+
+		ilock(&mouse);
+		if(mouse.ri != mouse.wi)
+			m = mouse.queue[mouse.ri++ % nelem(mouse.queue)];
+		else
+			m = mouse.Mousestate;
+		iunlock(&mouse);
 
 		b = buttonmap[m.buttons&7];
 		/* put buttons 4 and 5 back in */
@@ -301,18 +300,18 @@ mouseread(Chan *c, void *va, long n, int64_t off)
 				b = 16;
 			else if (b == 16)
 				b = 8;
-		jehanne_snprint(buf, sizeof buf, "m%11d %11d %11d %11lud ",
-			m.xy.x, m.xy.y,
-			b,
-			m.msec);
+		sprint(buf, "m%11d %11d %11d %11lud ",
+			m.xy.x, m.xy.y, b, m.msec);
+
 		mouse.lastcounter = m.counter;
-		if(n > 1+4*12)
-			n = 1+4*12;
-		if(mouse.lastresize != mouse.resize){
-			mouse.lastresize = mouse.resize;
+		if(mouse.resize){
+			mouse.resize = 0;
 			buf[0] = 'r';
 		}
-		jehanne_memmove(va, buf, n);
+
+		if(n > 1+4*12)
+			n = 1+4*12;
+		memmove(va, buf, n);
 		return n;
 	}
 	return 0;
@@ -348,7 +347,7 @@ setbuttonmap(char* map)
 	if(map[i])
 		error(Ebadarg);
 
-	jehanne_memset(buttonmap, 0, 8);
+	memset(buttonmap, 0, 8);
 	for(i = 0; i < 8; i++){
 		x = 0;
 		if(i & 1)
@@ -362,14 +361,15 @@ setbuttonmap(char* map)
 }
 
 static long
-mousewrite(Chan *c, void *va, long n, int64_t r)
+mousewrite(Chan *c, void *va, long n, int64_t _)
 {
 	char *p;
 	Point pt;
 	Cmdbuf *cb;
 	Cmdtab *ct;
 	char buf[64];
-	int b, msec;
+	int b, z, msec;
+	Mousestate *m;
 
 	p = va;
 	switch((uint32_t)c->qid.path){
@@ -377,7 +377,7 @@ mousewrite(Chan *c, void *va, long n, int64_t r)
 		error(Eisdir);
 
 	case Qcursor:
-		cursoroff(1);
+		cursoroff();
 		if(n < 2*4+2*2*16){
 			curs = arrow;
 			Cursortocursor(&arrow);
@@ -385,21 +385,17 @@ mousewrite(Chan *c, void *va, long n, int64_t r)
 			n = 2*4+2*2*16;
 			curs.offset.x = BGLONG(p+0);
 			curs.offset.y = BGLONG(p+4);
-			jehanne_memmove(curs.clr, p+8, 2*16);
-			jehanne_memmove(curs.set, p+40, 2*16);
+			memmove(curs.clr, p+8, 2*16);
+			memmove(curs.set, p+40, 2*16);
 			Cursortocursor(&curs);
 		}
-		qlock(&mouse.ql);
-		mouse.redraw = 1;
-		mouseclock();
-		qunlock(&mouse.ql);
-		cursoron(1);
+		cursoron();
 		return n;
 
 	case Qmousectl:
 		cb = parsecmd(va, n);
 		if(waserror()){
-			jehanne_free(cb);
+			free(cb);
 			nexterror();
 		}
 
@@ -425,52 +421,77 @@ mousewrite(Chan *c, void *va, long n, int64_t r)
 				setbuttonmap(cb->f[1]);
 			break;
 
+		case CMblank:
+			mouseblankscreen(1);
+			break;
+
+		case CMblanktime:
+			blanktime = strtoul(cb->f[1], 0, 0);
+			/* wet floor */
+		case CMtwitch:
+			mousetime = seconds();
+			mouseblankscreen(0);
+			break;
+
 		case CMwildcard:
 			mousectl(cb);
 			break;
 		}
 
-		jehanne_free(cb);
+		free(cb);
 		poperror();
 		return n;
 
 	case Qmousein:
 		if(n > sizeof buf-1)
 			n = sizeof buf -1;
-		jehanne_memmove(buf, va, n);
+		memmove(buf, va, n);
 		buf[n] = 0;
-		p = 0;
-		pt.x = jehanne_strtol(buf+1, &p, 0);
-		if(p == 0)
+
+		pt.x = strtol(buf+1, &p, 0);
+		if(*p == 0)
 			error(Eshort);
-		pt.y = jehanne_strtol(p, &p, 0);
-		if(p == 0)
+		pt.y = strtol(p, &p, 0);
+		if(*p == 0)
 			error(Eshort);
-		b = jehanne_strtol(p, &p, 0);
-		msec = jehanne_strtol(p, &p, 0);
+		b = strtol(p, &p, 0);
+		msec = strtol(p, 0, 0);
 		if(msec == 0)
-			msec = TK2MS(sys->ticks);
-		mousetrack(pt.x, pt.y, b, msec);
+			msec = TK2MS(MACHP(0)->ticks);
+
+		/* exclude wheel */
+		z = b & (8|16);
+		b ^= z;
+
+		m = (Mousestate*)c->aux;
+		m->xy = pt;
+		m->msec = msec;
+		b ^= m->buttons;
+		m->buttons ^= b;
+		mouse.inbuttons = (m->buttons & b) | (mouse.inbuttons & ~b);
+		b = mouse.buttons & ~b;
+
+		/* include wheel */
+		b &= ~(8|16);
+		b ^= z;
+
+		if(buf[0] == 'A')
+			absmousetrack(pt.x, pt.y, b, msec);
+		else
+			mousetrack(pt.x, pt.y, b, msec);
 		return n;
 
 	case Qmouse:
 		if(n > sizeof buf-1)
 			n = sizeof buf -1;
-		jehanne_memmove(buf, va, n);
+		memmove(buf, va, n);
 		buf[n] = 0;
-		p = 0;
-		pt.x = jehanne_strtoul(buf+1, &p, 0);
-		if(p == 0)
+
+		pt.x = strtol(buf+1, &p, 0);
+		if(*p == 0)
 			error(Eshort);
-		pt.y = jehanne_strtoul(p, 0, 0);
-		qlock(&mouse.ql);
-		if(ptinrect(pt, gscreen->r)){
-			mouse.xy = pt;
-			mouse.redraw = 1;
-			mouse.track = 1;
-			mouseclock();
-		}
-		qunlock(&mouse.ql);
+		pt.y = strtol(p, 0, 0);
+		absmousetrack(pt.x, pt.y, mouse.buttons, TK2MS(MACHP(0)->ticks));
 		return n;
 	}
 
@@ -489,7 +510,7 @@ Dev mousedevtab = {
 	mousewalk,
 	mousestat,
 	mouseopen,
-	mousecreate,
+	devcreate,
 	mouseclose,
 	mouseread,
 	devbread,
@@ -502,32 +523,49 @@ Dev mousedevtab = {
 void
 Cursortocursor(Cursor *c)
 {
-	lock(&cursor.l);
-	jehanne_memmove(&cursor.c, c, sizeof(Cursor));
+	qlock(&drawlock);
+	lock(&cursor);
+	memmove(&cursor.Cursor, c, sizeof(Cursor));
 	setcursor(c);
-	unlock(&cursor.l);
+	unlock(&cursor);
+	qunlock(&drawlock);
 }
 
+void
+mouseblankscreen(int blank)
+{
+	static int blanked;
+
+	if(blank == blanked)
+		return;
+	qlock(&drawlock);
+	if(blanked != blank){
+		blankscreen(blank);
+		blanked = blank;
+	}
+	qunlock(&drawlock);
+}
+
+static int
+shouldredraw(void* _)
+{
+	return mouse.redraw != 0;
+}
 
 /*
- *  called by the clock routine to redraw the cursor
+ * process that redraws the cursor
  */
 static void
-mouseclock(void)
+mouseproc(void* _)
 {
-	if(mouse.track){
-		mousetrack(mouse.dx, mouse.dy, mouse.buttons, TK2MS(sys->ticks));
-		mouse.track = 0;
-		mouse.dx = 0;
-		mouse.dy = 0;
-	}
-	if(mouse.redraw && canlock(&cursor.l)){
+	while(waserror())
+		;
+	for(;;){
+		sleep(&mouse.redrawr, shouldredraw, nil);
 		mouse.redraw = 0;
-		cursoroff(0);
-		mouse.redraw = cursoron(0);
-		unlock(&cursor.l);
+		cursoroff();
+		cursoron();
 	}
-	drawactive(0);
 }
 
 static int
@@ -563,48 +601,64 @@ scale(int x)
  *  awaken any waiting procs.
  */
 void
-mousetrack(int dx, int dy, int b, int msec)
+mousetrack(int dx, int dy, int b, uint32_t msec)
 {
-	int x, y, lastb;
-
-	if(gscreen==nil)
-		return;
-
 	if(mouse.acceleration){
 		dx = scale(dx);
 		dy = scale(dy);
 	}
-	x = mouse.xy.x + dx;
+	absmousetrack(mouse.xy.x + dx, mouse.xy.y + dy, b, msec);
+}
+
+void
+absmousetrack(int x, int y, int b, uint32_t msec)
+{
+	int lastb;
+
+	if(gscreen==nil)
+		return;
+
 	if(x < gscreen->clipr.min.x)
 		x = gscreen->clipr.min.x;
 	if(x >= gscreen->clipr.max.x)
-		x = gscreen->clipr.max.x;
-	y = mouse.xy.y + dy;
+		x = gscreen->clipr.max.x-1;
 	if(y < gscreen->clipr.min.y)
 		y = gscreen->clipr.min.y;
 	if(y >= gscreen->clipr.max.y)
-		y = gscreen->clipr.max.y;
+		y = gscreen->clipr.max.y-1;
 
-	lastb = mouse.buttons;
+
+	ilock(&mouse);
 	mouse.xy = Pt(x, y);
-	mouse.buttons = b|kbdbuttons;
-	mouse.redraw = 1;
-	mouse.counter++;
+	lastb = mouse.buttons;
+	b |= mouse.inbuttons;
+	mouse.buttons = b;
 	mouse.msec = msec;
+	mouse.counter++;
 
 	/*
-	 * if the queue fills, we discard the entire queue and don't
-	 * queue any more events until a reader polls the mouse.
+	 * if the queue fills, don't queue any more events until a
+	 * reader polls the mouse.
 	 */
-	if(!mouse.qfull && lastb != b) {	/* add to ring */
-		mouse.queue[mouse.wi] = mouse.Mousestate;
-		if(++mouse.wi == nelem(mouse.queue))
-			mouse.wi = 0;
-		if(mouse.wi == mouse.ri)
-			mouse.qfull = 1;
-	}
-	wakeup(&mouse.rend);
-	drawactive(1);
+	if(b != lastb && (mouse.wi-mouse.ri) < nelem(mouse.queue))
+		mouse.queue[mouse.wi++ % nelem(mouse.queue)] = mouse.Mousestate;
+	iunlock(&mouse);
+
+	wakeup(&mouse.r);
+
+	mouseredraw();
+}
+
+static uint32_t
+lastms(void)
+{
+	static uint32_t lasttick;
+	uint32_t t, d;
+
+	t = MACHP(0)->ticks;
+	d = t - lasttick;
+	lasttick = t;
+	return TK2MS(d);
 }
 
 /*
@@ -618,24 +672,19 @@ mousetrack(int dx, int dy, int b, int msec)
  *  shift & right button is the same as middle button (for 2 button mice)
  */
 int
-m3mouseputc(Queue *queue, int c)
+m3mouseputc(Queue* _, int c)
 {
-	static unsigned char msg[3];
+	static uint8_t msg[3];
 	static int nb;
 	static int middle;
-	static unsigned char b[] = { 0, 4, 1, 5, 0, 2, 1, 3 };
+	static uint8_t b[] = { 0, 4, 1, 5, 0, 2, 1, 3 };
 	short x;
 	int dx, dy, newbuttons;
-	static uint64_t lasttick;
-	uint64_t mt;
 
-	/* Resynchronize in stream with timing. */
-	mt = sys->ticks;
-	if(TK2SEC(mt - lasttick) > 2)
+	if(lastms() > 500)
+		nb = 0;
+	if(nb == 3){
 		nb = 0;
-	lasttick = mt;
-
-	if(nb==0){
 		/*
 		 * an extra byte comes for middle button motion.
 		 * only two possible values for the extra byte.
@@ -644,19 +693,18 @@ m3mouseputc(Queue *queue, int c)
 			/* an extra byte gets sent for the middle button */
 			middle = (c&0x20) ? 2 : 0;
 			newbuttons = (mouse.buttons & ~2) | middle;
-			mousetrack(0, 0, newbuttons, TK2MS(sys->ticks));
+			mousetrack(0, 0, newbuttons, TK2MS(MACHP(0)->ticks));
 			return 0;
 		}
 	}
 	msg[nb] = c;
 	if(++nb == 3){
-		nb = 0;
-		newbuttons = middle | b[(msg[0]>>4)&3 | (mouseshifted ? 4 : 0)];
+		newbuttons = middle | b[(msg[0]>>4)&3];
 		x = (msg[0]&0x3)<<14;
 		dx = (x>>8) | msg[1];
 		x = (msg[0]&0xc)<<12;
 		dy = (x>>8) | msg[2];
-		mousetrack(dx, dy, newbuttons, TK2MS(sys->ticks));
+		mousetrack(dx, dy, newbuttons, TK2MS(MACHP(0)->ticks));
 	}
 	return 0;
 }
@@ -676,32 +724,26 @@ m3mouseputc(Queue *queue, int c)
  *	D: down
  */
 int
-m5mouseputc(Queue *queue, int c)
+m5mouseputc(Queue* _, int c)
 {
-	static unsigned char msg[3];
+	static uint8_t msg[4];
 	static int nb;
-	static uint64_t lasttick;
-	uint64_t mt;
 
-	/* Resynchronize in stream with timing. */
-	mt = sys->ticks;
-	if(TK2SEC(mt - lasttick) > 2)
+	if(lastms() > 500)
 		nb = 0;
-	lasttick = mt;
-
-	msg[nb++] = c & 0x7f;
-	if (nb == 4) {
-		char dx,dy,newbuttons;
+	msg[nb] = c & 0x7f;
+	if(++nb == 4){
+		nb = 0;
+		int8_t dx,dy,newbuttons;
 		dx = msg[1] | (msg[0] & 0x3) << 6;
 		dy = msg[2] | (msg[0] & 0xc) << 4;
 		newbuttons =
-			(msg[0] & 0x10) >> (mouseshifted ? 3 : 2)
+			(msg[0] & 0x10) >> 2
 			| (msg[0] & 0x20) >> 5
 			| ( msg[3] == 0x10 ? 0x02 :
 			    msg[3] == 0x0f ? ScrollUp :
 			    msg[3] == 0x01 ? ScrollDown : 0 );
-		mousetrack(dx, dy, newbuttons, TK2MS(sys->ticks));
-		nb = 0;
+		mousetrack(dx, dy, newbuttons, TK2MS(MACHP(0)->ticks));
 	}
 	return 0;
 }
@@ -712,41 +754,32 @@ m5mouseputc(Queue *queue, int c)
  *  shift & right button is the same as middle button (for 2 button mice)
  */
 int
-mouseputc(Queue *queue, int c)
+mouseputc(Queue* _, int c)
 {
 	static short msg[5];
 	static int nb;
-	static unsigned char b[] = {0, 4, 2, 6, 1, 5, 3, 7, 0, 2, 2, 6, 1, 3, 3, 7};
+	static uint8_t b[] = {0, 4, 2, 6, 1, 5, 3, 7, 0, 2, 2, 6, 1, 3, 3, 7};
 	int dx, dy, newbuttons;
-	static uint64_t lasttick;
-	uint64_t mt;
 
-	/* Resynchronize in stream with timing. */
-	mt = sys->ticks;
-	if(TK2SEC(mt - lasttick) > 2)
+	if(lastms() > 500 || (c&0xF0) == 0x80)
 		nb = 0;
-	lasttick = mt;
-
-	if((c&0xF0) == 0x80)
-		nb=0;
 	msg[nb] = c;
 	if(c & 0x80)
 		msg[nb] |= ~0xFF;	/* sign extend */
 	if(++nb == 5){
-		newbuttons = b[((msg[0]&7)^7) | (mouseshifted ? 8 : 0)];
+		nb = 0;
+		newbuttons = b[((msg[0]&7)^7)];
 		dx = msg[1]+msg[3];
 		dy = -(msg[2]+msg[4]);
-		mousetrack(dx, dy, newbuttons, TK2MS(sys->ticks));
-		nb = 0;
+		mousetrack(dx, dy, newbuttons, TK2MS(MACHP(0)->ticks));
 	}
 	return 0;
 }
 
 int
-mousechanged(void *v)
+mousechanged(void* _)
 {
-	return mouse.lastcounter != mouse.counter ||
-		mouse.lastresize != mouse.resize;
+	return mouse.lastcounter != mouse.counter || mouse.resize != 0;
 }
 
 Point
@@ -771,7 +804,13 @@ mouseaccelerate(int x)
 void
 mouseresize(void)
 {
-	mouse.resize++;
-	wakeup(&mouse.rend);
+	mouse.resize = 1;
+	wakeup(&mouse.r);
 }
 
+void
+mouseredraw(void)
+{
+	mouse.redraw = 1;
+	wakeup(&mouse.redrawr);
+}
diff --git a/sys/src/kern/port/devproc.c b/sys/src/kern/port/devproc.c
index 9003ff9..56bde82 100644
--- a/sys/src/kern/port/devproc.c
+++ b/sys/src/kern/port/devproc.c
@@ -684,8 +684,6 @@ int2flag(int flag, char *s)
 		*s++ = 'b';
 	if(flag & MCREATE)
 		*s++ = 'c';
-	if(flag & MCACHE)
-		*s++ = 'C';
 	*s = '\0';
 }
 
@@ -693,11 +691,11 @@ static int
 procargs(Proc *p, char *buf, int nbuf)
 {
 	int i;
-	char **args, *e;
+	char **args, **margs, *e;
 	ProcSegment *s;
 	PagePointer page = 0;
-	char *pbase;
-	uintptr_t argaddr;
+	char *pbase, *marg;
+	uintptr_t argaddr, ptop;
 
 	args = p->args;
 	if(args == nil)
@@ -721,25 +719,35 @@ procargs(Proc *p, char *buf, int nbuf)
 	 * page's ref count, but this should be safe in this very specific
 	 * case (top of the stack with seglock rlocked)
 	 */
-	page = segment_page(s, USTKTOP - PGSZ);
+	page = segment_page(s, (uintptr_t)args);
 	if(page == 0){
 		buf = jehanne_seprint(buf, e, "cannot print args for %s %d: stack gone", p->text, p->pid);
 		goto ArgsPrinted;
 	}
 
 	pbase = page_kmap(page);
+	ptop = (uintptr_t)(pbase + PGSZ);
 
+	margs = (char**)(pbase + (((uintptr_t)args)&(PGSZ-1)));
+	if(((uintptr_t)&margs[p->nargs - 1]) > ptop){
+		buf = jehanne_seprint(buf, e, "%s: too many arguments", p->text);
+		goto DoneWithMappedPage;
+	}
 	for(i = 0; i < p->nargs; ++i){
 		if(buf >= e)
 			break;
-		argaddr = (uintptr_t)args[i];
-		if(argaddr > USTKTOP || argaddr < USTKTOP - PGSZ || argaddr < (uintptr_t)args[p->nargs-1]){
-			buf = jehanne_seprint(buf, e, i?" *%#p":"*%#p", args[i]);
+		argaddr = (uintptr_t)margs[i];
+		if(argaddr < (uintptr_t)args || argaddr >= s->top){
+			buf = jehanne_seprint(buf, e, i?" %#p":"%#p", argaddr);
+		} else if(argaddr - (uintptr_t)args > PGSZ){
+			buf = jehanne_seprint(buf, e, " ...");
+			break;
 		} else {
-			buf = jehanne_seprint(buf, e, i?" %q":"%q", pbase + (argaddr&(PGSZ-1)));
+			marg = pbase + (argaddr&(PGSZ-1));
+			buf = jehanne_seprint(buf, e, i?" %q":"%q", marg);
 		}
 	}
-
+DoneWithMappedPage:
 	page_kunmap(page, &pbase);
 
 ArgsPrinted:
@@ -765,7 +773,7 @@ procread(Chan *c, void *va, long n, int64_t off)
 	Mntwalk *mw;
 	ProcSegment *sg, *s;
 	int i, j, navail, ne, pid, rsize;
-	char flag[10], *sps, *srv, statbuf[NSEG*STATSIZE];
+	char flag[10],  *a, *sps, *srv, statbuf[NSEG*STATSIZE];
 	uintptr_t offset;
 	uintmem paddr, plimit, psize;
 	uint64_t u;
@@ -773,6 +781,7 @@ procread(Chan *c, void *va, long n, int64_t off)
 	if(c->qid.type & QTDIR)
 		return devdirread(c, va, n, 0, 0, procgen);
 
+	a = va;
 	offset = off;
 
 	if(QID(c->qid) == Qtrace){
@@ -846,7 +855,7 @@ procread(Chan *c, void *va, long n, int64_t off)
 			return n;
 		}
 		paddr = PADDR(UINT2PTR(offset));
-		if(!isrmapped(&rmapram, paddr, &psize)){
+		if(!ismapped(&rmapram, paddr, &psize)){
 			psdecref(p);
 			error(Ebadarg);
 		}
@@ -903,32 +912,27 @@ procread(Chan *c, void *va, long n, int64_t off)
 	case Qregs:
 		rptr = (uint8_t*)p->dbgreg;
 		rsize = sizeof(Ureg);
-	regread:
-		if(rptr == 0){
-			psdecref(p);
-			error(Enoreg);
-		}
-		if(offset >= rsize){
-			psdecref(p);
-			return 0;
-		}
-		if(offset+n > rsize)
-			n = rsize - offset;
-		jehanne_memmove(va, rptr+offset, n);
-		psdecref(p);
-		return n;
+		goto regread;
 
 	case Qkregs:
-		jehanne_memset(&kur, 0, sizeof(Ureg));
+		memset(&kur, 0, sizeof(Ureg));
 		setkernur(&kur, p);
 		rptr = (uint8_t*)&kur;
 		rsize = sizeof(Ureg);
 		goto regread;
 
 	case Qfpregs:
-		r = fpudevprocio(p, va, n, offset, 0);
-		psdecref(p);
-		return r;
+		rptr = (uint8_t*)&p->fpsave;
+		rsize = sizeof(FPsave);
+	regread:
+		if(rptr == nil)
+			error(Enoreg);
+		if(offset >= rsize)
+			return 0;
+		if(offset+n > rsize)
+			n = rsize - offset;
+		memmove(a, rptr+offset, n);
+		return n;
 
 	case Qstatus:
 		if(offset >= sizeof statbuf){
@@ -1201,13 +1205,17 @@ procwrite(Chan *c, void *va, long n, int64_t off)
 			n = 0;
 		else if(offset+n > sizeof(Ureg))
 			n = sizeof(Ureg) - offset;
-		if(p->dbgreg == 0)
+		if(p->dbgreg == nil)
 			error(Enoreg);
 		setregisters(p->dbgreg, (char*)(p->dbgreg)+offset, va, n);
 		break;
 
 	case Qfpregs:
-		n = fpudevprocio(p, va, n, offset, 1);
+		if(offset >= sizeof(FPsave))
+			n = 0;
+		else if(offset+n > sizeof(FPsave))
+			n = sizeof(FPsave) - offset;
+		memmove((uint8_t*)&p->fpsave+offset, va, n);
 		break;
 
 	case Qctl:
diff --git a/sys/src/kern/port/devuart.c b/sys/src/kern/port/devuart.c
index 2f64070..8c7d2aa 100644
--- a/sys/src/kern/port/devuart.c
+++ b/sys/src/kern/port/devuart.c
@@ -6,16 +6,7 @@
 #include	"io.h"
 #include	"../port/error.h"
 
-enum {
-	Qdir		= 0,
-	Qdata,
-	Qctl,
-	Qstat,
-};
-
-#define UARTTYPE(x)	(((unsigned)x)&0x1f)
-#define UARTID(x)	((((unsigned)x))>>5)
-#define UARTQID(i, t)	((((unsigned)i)<<5)|(t))
+#include	"../port/netif.h"
 
 enum
 {
@@ -45,7 +36,7 @@ static void	uartflow(void*);
 /*
  *  enable/disable uart and add/remove to list of enabled uarts
  */
-static Uart*
+Uart*
 uartenable(Uart *p)
 {
 	Uart **l;
@@ -53,7 +44,7 @@ uartenable(Uart *p)
 	if(p->enabled)
 		return p;
 	if(p->iq == nil){
-		if((p->iq = qopen(8*1024, 0, uartflow, p)) == nil)
+		if((p->iq = qopen(8*1024, Qcoalesce, uartflow, p)) == nil)
 			return nil;
 	}
 	else
@@ -91,6 +82,10 @@ uartenable(Uart *p)
 		uartctl(p, "b9600");
 	(*p->phys->enable)(p, 1);
 
+	/*
+	 * use ilock because uartclock can otherwise interrupt here
+	 * and would hang on an attempt to lock uartalloc.
+	 */
 	ilock(&uartalloc);
 	for(l = &uartalloc.elist; *l; l = &(*l)->elist){
 		if(*l == p)
@@ -111,6 +106,8 @@ uartdisable(Uart *p)
 {
 	Uart **l;
 
+	if(!p->enabled)
+		return;
 	(*p->phys->disable)(p);
 
 	ilock(&uartalloc);
@@ -124,37 +121,55 @@ uartdisable(Uart *p)
 	iunlock(&uartalloc);
 }
 
-Uart*
-uartconsole(int i, char *cmd)
+static Uart*
+uartport(char *which)
+{
+	int port;
+	char *p;
+
+	port = strtol(which, &p, 0);
+	if(p == which)
+		error(Ebadarg);
+	if(port < 0 || port >= uartnuart || uart[port] == nil)
+		error(Enodev);
+	return uart[port];
+}
+
+void
+uartmouse(char *which, int (*putc)(Queue*, int), int setb1200)
 {
 	Uart *p;
 
-	if(i >= uartnuart || (p = uart[i]) == nil)
-		return nil;
-
-	qlock(&p->ql);
-	if(!p->console){
-		if(p->opens == 0 && uartenable(p) == nil){
-			qunlock(&p->ql);
-			return nil;
-		}
-		p->opens++;
-
-		addkbdq(p->iq, -1);
-		addconsdev(p->oq, uartputs, 2, 0);
-		p->putc = kbdcr2nl;
-		if(cmd != nil && *cmd != '\0')
-			uartctl(p, cmd);
-
-		p->console = 1;
+	p = uartport(which);
+	qlock(&p->ql);;
+	if(p->opens++ == 0 && uartenable(p) == nil){
+		qunlock(&p->ql);;
+		error(Enodev);
 	}
-	qunlock(&p->ql);
+	if(setb1200)
+		uartctl(p, "b1200");
+	p->putc = putc;
+	p->special = 1;
+	qunlock(&p->ql);;
+}
 
-	return p;
+void
+uartsetmouseputc(char *which, int (*putc)(Queue*, int))
+{
+	Uart *p;
+
+	p = uartport(which);
+	qlock(&p->ql);;
+	if(p->opens == 0 || p->special == 0){
+		qunlock(&p->ql);;
+		error(Enodev);
+	}
+	p->putc = putc;
+	qunlock(&p->ql);;
 }
 
 static void
-uartsetlength(int i)
+setlength(int i)
 {
 	Uart *p;
 
@@ -195,15 +210,14 @@ uartreset(void)
 	}
 
 	if(uartnuart)
-		uart = jehanne_malloc(uartnuart*sizeof(Uart*));
+		uart = xalloc(uartnuart*sizeof(Uart*));
 
 	uartndir = 1 + 3*uartnuart;
-	uartdir = jehanne_malloc(uartndir * sizeof(Dirtab));
-	if(uartnuart && (uart == nil || uartdir == nil)){
+	uartdir = xalloc(uartndir * sizeof(Dirtab));
+	if(uartnuart && uart == nil || uartdir == nil)
 		panic("uartreset: no memory");
-	}
 	dp = uartdir;
-	jehanne_strcpy(dp->name, ".");
+	strcpy(dp->name, ".");
 	mkqid(&dp->qid, 0, 0, QTDIR);
 	dp->length = 0;
 	dp->perm = DMDIR|0555;
@@ -211,30 +225,25 @@ uartreset(void)
 	p = uartlist;
 	for(i = 0; i < uartnuart; i++){
 		/* 3 directory entries per port */
-		jehanne_sprint(dp->name, "eia%d", i);
-		dp->qid.path = UARTQID(i, Qdata);
+		snprint(dp->name, sizeof dp->name, "eia%d", i);
+		dp->qid.path = NETQID(i, Ndataqid);
 		dp->perm = 0660;
 		dp++;
-		jehanne_sprint(dp->name, "eia%dctl", i);
-		dp->qid.path = UARTQID(i, Qctl);
+		snprint(dp->name, sizeof dp->name, "eia%dctl", i);
+		dp->qid.path = NETQID(i, Nctlqid);
 		dp->perm = 0660;
 		dp++;
-		jehanne_sprint(dp->name, "eia%dstatus", i);
-		dp->qid.path = UARTQID(i, Qstat);
+		snprint(dp->name, sizeof dp->name, "eia%dstatus", i);
+		dp->qid.path = NETQID(i, Nstatqid);
 		dp->perm = 0444;
 		dp++;
 
 		uart[i] = p;
 		p->dev = i;
 		if(p->console || p->special){
-			/*
-			 * No qlock here, only called at boot time.
-			 */
 			if(uartenable(p) != nil){
 				if(p->console){
-					addkbdq(p->iq, -1);
-					addconsdev(p->oq, uartputs, 2, 0);
-					p->putc = kbdcr2nl;
+					serialoq = p->oq;
 				}
 				p->opens++;
 			}
@@ -267,8 +276,8 @@ uartwalk(Chan *c, Chan *nc, char **name, int nname)
 static long
 uartstat(Chan *c, uint8_t *dp, long n)
 {
-	if(UARTTYPE(c->qid.path) == Qdata)
-		uartsetlength(UARTID(c->qid.path));
+	if(NETTYPE(c->qid.path) == Ndataqid)
+		setlength(NETID(c->qid.path));
 	return devstat(c, dp, n, uartdir, uartndir, devgen);
 }
 
@@ -279,18 +288,17 @@ uartopen(Chan *c, unsigned long omode)
 
 	c = devopen(c, omode, uartdir, uartndir, devgen);
 
-	switch(UARTTYPE(c->qid.path)){
-	case Qctl:
-	case Qdata:
-		p = uart[UARTID(c->qid.path)];
-		qlock(&p->ql);
-		if(p->opens == 0 && uartenable(p) == nil){
-			qunlock(&p->ql);
+	switch(NETTYPE(c->qid.path)){
+	case Nctlqid:
+	case Ndataqid:
+		p = uart[NETID(c->qid.path)];
+		qlock(&p->ql);;
+		if(p->opens++ == 0 && uartenable(p) == nil){
+			qunlock(&p->ql);;
 			c->flag &= ~COPEN;
 			error(Enodev);
 		}
-		p->opens++;
-		qunlock(&p->ql);
+		qunlock(&p->ql);;
 		break;
 	}
 
@@ -331,11 +339,11 @@ uartclose(Chan *c)
 		return;
 	if((c->flag & COPEN) == 0)
 		return;
-	switch(UARTTYPE(c->qid.path)){
-	case Qdata:
-	case Qctl:
-		p = uart[UARTID(c->qid.path)];
-		qlock(&p->ql);
+	switch(NETTYPE(c->qid.path)){
+	case Ndataqid:
+	case Nctlqid:
+		p = uart[NETID(c->qid.path)];
+		qlock(&p->ql);;
 		if(--(p->opens) == 0){
 			qclose(p->iq);
 			ilock(&p->rlock);
@@ -353,7 +361,7 @@ uartclose(Chan *c)
 			uartdisable(p);
 			p->dcd = p->dsr = p->dohup = 0;
 		}
-		qunlock(&p->ql);
+		qunlock(&p->ql);;
 		break;
 	}
 }
@@ -365,17 +373,17 @@ uartread(Chan *c, void *buf, long n, int64_t off)
 	uint32_t offset = off;
 
 	if(c->qid.type & QTDIR){
-		uartsetlength(-1);
+		setlength(-1);
 		return devdirread(c, buf, n, uartdir, uartndir, devgen);
 	}
 
-	p = uart[UARTID(c->qid.path)];
-	switch(UARTTYPE(c->qid.path)){
-	case Qdata:
+	p = uart[NETID(c->qid.path)];
+	switch(NETTYPE(c->qid.path)){
+	case Ndataqid:
 		return qread(p->iq, buf, n);
-	case Qctl:
-		return readnum(offset, buf, n, UARTID(c->qid.path), NUMSIZE);
-	case Qstat:
+	case Nctlqid:
+		return readnum(offset, buf, n, NETID(c->qid.path), NUMSIZE);
+	case Nstatqid:
 		return (*p->phys->status)(p, buf, n, offset);
 	}
 
@@ -388,14 +396,14 @@ uartctl(Uart *p, char *cmd)
 	char *f[16];
 	int i, n, nf;
 
-	nf = jehanne_tokenize(cmd, f, nelem(f));
+	nf = tokenize(cmd, f, nelem(f));
 	for(i = 0; i < nf; i++){
-		if(jehanne_strncmp(f[i], "break", 5) == 0){
+		if(strncmp(f[i], "break", 5) == 0){
 			(*p->phys->dobreak)(p, 0);
 			continue;
 		}
 
-		n = jehanne_atoi(f[i]+1);
+		n = atoi(f[i]+1);
 		switch(*f[i]){
 		case 'B':
 		case 'b':
@@ -416,8 +424,8 @@ uartctl(Uart *p, char *cmd)
 		case 'e':
 			p->hup_dsr = n;
 			break;
-		case 'F':
 		case 'f':
+		case 'F':
 			if(p->oq != nil)
 				qflush(p->oq);
 			break;
@@ -428,8 +436,8 @@ uartctl(Uart *p, char *cmd)
 			if(p->oq != nil)
 				qhangup(p->oq, 0);
 			break;
-		case 'I':
 		case 'i':
+		case 'I':
 			uartdrainoutput(p);
 			(*p->phys->fifo)(p, n);
 			break;
@@ -444,13 +452,13 @@ uartctl(Uart *p, char *cmd)
 			if((*p->phys->bits)(p, n) < 0)
 				return -1;
 			break;
-		case 'M':
 		case 'm':
+		case 'M':
 			uartdrainoutput(p);
 			(*p->phys->modemctl)(p, n);
 			break;
-		case 'N':
 		case 'n':
+		case 'N':
 			if(p->oq != nil)
 				qnoblock(p->oq, n);
 			break;
@@ -486,11 +494,10 @@ uartctl(Uart *p, char *cmd)
 			break;
 		case 'X':
 		case 'x':
-			if(p->enabled){
-				ilock(&p->tlock);
-				p->xonoff = n;
-				iunlock(&p->tlock);
-			}
+			ilock(&p->tlock);
+			p->xonoff = n;
+			p->blocked = 0;
+			iunlock(&p->tlock);
 			break;
 		}
 	}
@@ -498,7 +505,7 @@ uartctl(Uart *p, char *cmd)
 }
 
 static long
-uartwrite(Chan *c, void *buf, long n, int64_t _1)
+uartwrite(Chan *c, void *buf, long n, int64_t _)
 {
 	Uart *p;
 	char *cmd;
@@ -506,29 +513,29 @@ uartwrite(Chan *c, void *buf, long n, int64_t _1)
 	if(c->qid.type & QTDIR)
 		error(Eperm);
 
-	p = uart[UARTID(c->qid.path)];
+	p = uart[NETID(c->qid.path)];
 
-	switch(UARTTYPE(c->qid.path)){
-	case Qdata:
-		qlock(&p->ql);
+	switch(NETTYPE(c->qid.path)){
+	case Ndataqid:
+		qlock(&p->ql);;
 		if(waserror()){
-			qunlock(&p->ql);
+			qunlock(&p->ql);;
 			nexterror();
 		}
 
 		n = qwrite(p->oq, buf, n);
 
-		qunlock(&p->ql);
+		qunlock(&p->ql);;
 		poperror();
 		break;
-	case Qctl:
-		cmd = jehanne_malloc(n+1);
-		jehanne_memmove(cmd, buf, n);
+	case Nctlqid:
+		cmd = smalloc(n+1);
+		memmove(cmd, buf, n);
 		cmd[n] = 0;
-		qlock(&p->ql);
+		qlock(&p->ql);;
 		if(waserror()){
-			qunlock(&p->ql);
-			jehanne_free(cmd);
+			qunlock(&p->ql);;
+			free(cmd);
 			nexterror();
 		}
 
@@ -536,9 +543,9 @@ uartwrite(Chan *c, void *buf, long n, int64_t _1)
 		if(uartctl(p, cmd) < 0)
 			error(Ebadarg);
 
-		qunlock(&p->ql);
+		qunlock(&p->ql);;
 		poperror();
-		jehanne_free(cmd);
+		free(cmd);
 		break;
 	}
 
@@ -551,18 +558,18 @@ uartwstat(Chan *c, uint8_t *dp, long n)
 	Dir d;
 	Dirtab *dt;
 
-	if(!isevegroup())
+	if(!iseve())
 		error(Eperm);
 	if(QTDIR & c->qid.type)
 		error(Eperm);
-	if(UARTTYPE(c->qid.path) == Qstat)
+	if(NETTYPE(c->qid.path) == Nstatqid)
 		error(Eperm);
 
-	dt = &uartdir[1 + 3 * UARTID(c->qid.path)];
-	n = jehanne_convM2D(dp, n, &d, nil);
+	dt = &uartdir[1 + 3 * NETID(c->qid.path)];
+	n = convM2D(dp, n, &d, nil);
 	if(n == 0)
 		error(Eshortstat);
-	if(d.mode != (uint32_t)~0UL)
+	if(d.mode != ~0)
 		dt[0].perm = dt[1].perm = d.mode;
 	return n;
 }
@@ -701,7 +708,7 @@ uartrecv(Uart *p,  char ch)
 	/* receive the character */
 	if(p->putc)
 		p->putc(p->iq, ch);
-	else if(p->iw != nil){	/* maybe the line isn't enabled yet */
+	else if (p->iw) {		/* maybe the line isn't enabled yet */
 		ilock(&p->rlock);
 		next = p->iw + 1;
 		if(next == p->ie)
@@ -728,9 +735,6 @@ uartclock(void)
 	ilock(&uartalloc);
 	for(p = uartalloc.elist; p; p = p->elist){
 
-		if(p->phys->poll != nil)
-			(*p->phys->poll)(p);
-
 		/* this hopefully amortizes cost of qproduce to many chars */
 		if(p->iw != p->ir){
 			ilock(&p->rlock);
@@ -795,13 +799,3 @@ uartputs(char *s, int n)
 		consuart->phys->putc(consuart, *s);
 	}
 }
-
-void
-uartpush(void)
-{
-	while(consuart != nil && !uartdrained(consuart)){
-		consuart->xonoff = 0;
-		consuart->blocked = 0;
-		uartkick(consuart);
-	}
-}
diff --git a/sys/src/kern/port/fault.c b/sys/src/kern/port/fault.c
index 4e0b222..21647bf 100644
--- a/sys/src/kern/port/fault.c
+++ b/sys/src/kern/port/fault.c
@@ -92,7 +92,7 @@ void*
 validaddr(void* addr, long len, int write)
 {
 	if(!okaddr(PTR2UINT(addr), len, write)){
-		pprint("trap: invalid address %#p/%ld in sys call pc=%#P\n", addr, len, userpc(nil));
+		pprint("trap: invalid address %#p/%ld in sys call pc=%#p\n", addr, len, userpc(nil));
 		postnote(up, 1, "sys: bad address in syscall", NDebug);
 		error(Ebadarg);
 	}
diff --git a/sys/src/kern/port/imagmem.c b/sys/src/kern/port/imagmem.c
deleted file mode 100644
index b5d7565..0000000
--- a/sys/src/kern/port/imagmem.c
+++ /dev/null
@@ -1,108 +0,0 @@
-/*
- * This file is part of the UCB release of Plan 9. It is subject to the license
- * terms in the LICENSE file found in the top-level directory of this
- * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
- * part of the UCB release of Plan 9, including this file, may be copied,
- * modified, propagated, or distributed except according to the terms contained
- * in the LICENSE file.
- */
-
-#include "u.h"
-#include "../port/lib.h"
-#include "mem.h"
-#include "dat.h"
-#include "fns.h"
-#include	<pool.h>
-
-static void poolprint(Pool*, char*, ...);
-static void ppanic(Pool*, char*, ...);
-static void plock(Pool*);
-static void punlock(Pool*);
-
-typedef struct Private	Private;
-struct Private {
-	Lock		lk;
-	char*		end;
-	char		msg[256];	/* a rock for messages to be printed at unlock */
-};
-
-static Private pimagpriv;
-static Pool pimagmem = {
-	.name=		"Image",
-	.maxsize=	16*1024*1024,
-	.minarena=	2*1024*1024,
-	.quantum=	32,
-	.alloc=		qmalloc,
-	.merge=		nil,
-	.flags=		0,
-
-	.lock=		plock,
-	.unlock=	punlock,
-	.print=		poolprint,
-	.panic=		ppanic,
-
-	.private=	&pimagpriv,
-};
-
-Pool*	imagmem = &pimagmem;
-
-/*
- * because we can't print while we're holding the locks,
- * we have the save the message and print it once we let go.
- */
-static void
-poolprint(Pool *p, char *fmt, ...)
-{
-	va_list v;
-	Private *pv;
-
-	pv = p->private;
-	va_start(v, fmt);
-	pv->end = jehanne_vseprint(pv->end, &pv->msg[sizeof pv->msg], fmt, v);
-	va_end(v);
-}
-
-static void
-ppanic(Pool *p, char *fmt, ...)
-{
-	va_list v;
-	Private *pv;
-	char msg[sizeof pv->msg];
-
-	pv = p->private;
-	va_start(v, fmt);
-	jehanne_vseprint(pv->end, &pv->msg[sizeof pv->msg], fmt, v);
-	va_end(v);
-	jehanne_memmove(msg, pv->msg, sizeof msg);
-	iunlock(&pv->lk);
-	panic("%s", msg);
-}
-
-static void
-plock(Pool *p)
-{
-	Private *pv;
-
-	pv = p->private;
-	ilock(&pv->lk);
-	//pv->lk.pc = getcallerpc();	//  TODO: mcslocks handles pc differently, add this back introducing ilockat(l, pc)
-	pv->end = pv->msg;
-}
-
-static void
-punlock(Pool *p)
-{
-	Private *pv;
-	char msg[sizeof pv->msg];
-
-	pv = p->private;
-	if(pv->end == pv->msg){
-		iunlock(&pv->lk);
-		return;
-	}
-
-	jehanne_memmove(msg, pv->msg, sizeof msg);
-	pv->end = pv->msg;
-	iunlock(&pv->lk);
-	iprint("%.*s", sizeof pv->msg, msg);
-}
diff --git a/sys/src/kern/port/include.json b/sys/src/kern/port/include.json
index ef17130..abff8a7 100644
--- a/sys/src/kern/port/include.json
+++ b/sys/src/kern/port/include.json
@@ -1,8 +1,5 @@
 {
 	"port": {
-		"#SourceFiles": [
-			"../port/devcec.c"
-		],
 		"Cflags": [
 			"-fasm"
 		],
@@ -16,10 +13,9 @@
 			"../port/umem/images.c",
 
 			"../port/alarm.c",
+			"../port/alloc.c",
 			"../port/allocb.c",
 			"../port/awake.c",
-			"../port/bud.c",
-			"../port/cache.c",
 			"../port/chan.c",
 			"../port/debug.c",
 			"../port/dev.c",
@@ -48,34 +44,30 @@
 			"../port/elf64.c",
 			"../port/fault.c",
 			"../port/getput.c",
-			"../port/imagmem.c",
 			"../port/log.c",
-			"../port/mcslock.c",
+			"../port/taslock.c",
 			"../port/mul64fract.c",
 			"../port/net.c",
 			"../port/netif.c",
-			"../port/nooptions.c",
 			"../port/parse.c",
 			"../port/pgrp.c",
-			"../port/physalloc.c",
 			"../port/portclock.c",
 			"../port/print.c",
 			"../port/proc.c",
 			"../port/ps.c",
 			"../port/qio.c",
 			"../port/qlock.c",
-			"../port/qmalloc.c",
 			"../port/random.c",
 			"../port/rebootcmd.c",
 			"../port/ref.c",
-			"../port/rmap.c",
 			"../port/sysauth.c",
 			"../port/syscallfmt.c",
 			"../port/sysfile.c",
 			"../port/sysproc.c",
 			"../port/tod.c",
 			"../port/uidgid.c",
-			"../port/usbehci.c"
+			"../port/usbehci.c",
+			"../port/xalloc.c"
 		]
 	}
 }
diff --git a/sys/src/kern/port/lib.h b/sys/src/kern/port/lib.h
index 6e2460d..073d554 100644
--- a/sys/src/kern/port/lib.h
+++ b/sys/src/kern/port/lib.h
@@ -3,7 +3,8 @@
  */
 #define nelem(x)	(sizeof(x)/sizeof((x)[0]))
 #define offsetof(s, m)	(uintptr_t)(&(((s*)0)->m))
-#define assert(x)	if(x){}else _assert(#x)
+#define assert(x)	if(x){}else jehanne__assert(#x)
+extern	void	jehanne__assert(const char*) __attribute__ ((noreturn));
 
 /*
  * mem routines
@@ -62,8 +63,10 @@ extern	void	jehanne_free(void*);
 extern	uint32_t	jehanne_msize(void*);
 extern	void*	jehanne_mallocalign(usize, uint32_t, long, uint32_t);
 extern	void*	jehanne_realloc(void*, usize);
-extern	void	jehanne_setmalloctag(void*, uint32_t);
-extern	uint32_t	jehanne_getmalloctag(void*);
+void	jehanne_setmalloctag(void*, uintptr_t);
+void	jehanne_setrealloctag(void*, uintptr_t);
+uintptr_t	jehanne_getmalloctag(void*);
+uintptr_t	jehanne_getrealloctag(void*);
 
 /*
  * print routines
@@ -109,6 +112,8 @@ extern	int	jehanne_snprint(char*, int, char*, ...);
 extern	int	jehanne_vsnprint(char*, int, char*, va_list);
 extern	int	jehanne_sprint(char*, char*, ...);
 
+
+
 #pragma	varargck	argpos	fmtprint	2
 #pragma	varargck	argpos	print		1
 #pragma	varargck	argpos	seprint		3
@@ -154,11 +159,6 @@ extern	int	jehanne_fmtstrinit(Fmt*);
  */
 extern	void	jehanne_quotefmtinstall(void);
 
-/*
- * Time-of-day
- */
-extern	void	cycles(uint64_t*);	/* 64-bit value of the cycle counter if there is one, 0 if there isn't */
-
 /*
  * one-of-a-kind
  */
@@ -186,8 +186,7 @@ extern	uint64_t	jehanne_strtoull(char*, char**, int);
 #define MBEFORE	0x0001	/* mount goes before others in union directory */
 #define MAFTER	0x0002	/* mount goes after others in union directory */
 #define MCREATE	0x0004	/* permit creation in mounted directory */
-#define MCACHE	0x0010	/* cache some data */
-#define MMASK	0x0017	/* all bits on */
+#define MMASK	0x0007	/* all bits on */
 
 /* OPEN MODES: Kernel reserved flags */
 #define OSTAT	0x00		/* open for stat/wstat */
@@ -290,3 +289,177 @@ extern unsigned int	jehanne_sizeD2M(Dir*);
 extern int		dirfmt(Fmt*);
 extern int		jehanne_dirmodefmt(Fmt*);
 #pragma	varargck	type	"D"	Dir*
+
+#define memccpy jehanne_memccpy
+#define memset jehanne_memset
+#define memcmp jehanne_memcmp
+#define memcpy jehanne_memcpy
+#define memmove jehanne_memmove
+#define memchr jehanne_memchr
+#define strcat jehanne_strcat
+#define strchr jehanne_strchr
+#define strcmp jehanne_strcmp
+#define strcpy jehanne_strcpy
+#define strecpy jehanne_strecpy
+#define strdup jehanne_strdup
+#define strncat jehanne_strncat
+#define strncpy jehanne_strncpy
+#define strncmp jehanne_strncmp
+#define strpbrk jehanne_strpbrk
+#define strrchr jehanne_strrchr
+#define strtok jehanne_strtok
+#define strlen jehanne_strlen
+#define strspn jehanne_strspn
+#define strcspn jehanne_strcspn
+#define strstr jehanne_strstr
+#define cistrncmp jehanne_cistrncmp
+#define cistrcmp jehanne_cistrcmp
+#define cistrstr jehanne_cistrstr
+#define tokenize jehanne_tokenize
+#define runetochar jehanne_runetochar
+#define chartorune jehanne_chartorune
+#define runelen jehanne_runelen
+#define runenlen jehanne_runenlen
+#define fullrune jehanne_fullrune
+#define utflen jehanne_utflen
+#define utfnlen jehanne_utfnlen
+#define utfrune jehanne_utfrune
+#define utfrrune jehanne_utfrrune
+#define utfutf jehanne_utfutf
+#define utfecpy jehanne_utfecpy
+#define runestrcat jehanne_runestrcat
+#define runestrchr jehanne_runestrchr
+#define runestrcmp jehanne_runestrcmp
+#define runestrcpy jehanne_runestrcpy
+#define runestrncpy jehanne_runestrncpy
+#define runestrecpy jehanne_runestrecpy
+#define runestrdup jehanne_runestrdup
+#define runestrncat jehanne_runestrncat
+#define runestrncmp jehanne_runestrncmp
+#define runestrrchr jehanne_runestrrchr
+#define runestrlen jehanne_runestrlen
+#define runestrstr jehanne_runestrstr
+#define tolowerrune jehanne_tolowerrune
+#define totitlerune jehanne_totitlerune
+#define toupperrune jehanne_toupperrune
+#define tobaserune jehanne_tobaserune
+#define isalpharune jehanne_isalpharune
+#define isbaserune jehanne_isbaserune
+#define isdigitrune jehanne_isdigitrune
+#define islowerrune jehanne_islowerrune
+#define isspacerune jehanne_isspacerune
+#define istitlerune jehanne_istitlerune
+#define isupperrune jehanne_isupperrune
+#define malloc jehanne_malloc
+#define malloc jehanne_malloc
+#define mallocz jehanne_mallocz
+#define free jehanne_free
+#define msize jehanne_msize
+#define mallocalign jehanne_mallocalign
+#define calloc jehanne_calloc
+#define realloc jehanne_realloc
+#define setmalloctag jehanne_setmalloctag
+#define setrealloctag jehanne_setrealloctag
+#define getmalloctag jehanne_getmalloctag
+#define getrealloctag jehanne_getrealloctag
+#define malloctopoolblock jehanne_malloctopoolblock
+#define print jehanne_print
+#define seprint jehanne_seprint
+#define vseprint jehanne_vseprint
+#define snprint jehanne_snprint
+#define vsnprint jehanne_vsnprint
+#define smprint jehanne_smprint
+#define vsmprint jehanne_vsmprint
+#define sprint jehanne_sprint
+#define fprint jehanne_fprint
+#define vfprint jehanne_vfprint
+#define runesprint jehanne_runesprint
+#define runesnprint jehanne_runesnprint
+#define runevsnprint jehanne_runevsnprint
+#define runeseprint jehanne_runeseprint
+#define runevseprint jehanne_runevseprint
+#define runesmprint jehanne_runesmprint
+#define runevsmprint jehanne_runevsmprint
+#define fmtfdinit jehanne_fmtfdinit
+#define fmtfdflush jehanne_fmtfdflush
+#define fmtstrinit jehanne_fmtstrinit
+#define fmtstrflush jehanne_fmtstrflush
+#define runefmtstrinit jehanne_runefmtstrinit
+#define runefmtstrflush jehanne_runefmtstrflush
+#define fmtinstall jehanne_fmtinstall
+#define dofmt jehanne_dofmt
+#define dorfmt jehanne_dorfmt
+#define fmtprint jehanne_fmtprint
+#define fmtvprint jehanne_fmtvprint
+#define fmtrune jehanne_fmtrune
+#define fmtstrcpy jehanne_fmtstrcpy
+#define fmtrunestrcpy jehanne_fmtrunestrcpy
+#define errfmt jehanne_errfmt
+#define unquotestrdup jehanne_unquotestrdup
+#define unquoterunestrdup jehanne_unquoterunestrdup
+#define quotestrdup jehanne_quotestrdup
+#define quoterunestrdup jehanne_quoterunestrdup
+#define quotestrfmt jehanne_quotestrfmt
+#define quoterunestrfmt jehanne_quoterunestrfmt
+#define quotefmtinstall jehanne_quotefmtinstall
+#define needsrcquote jehanne_needsrcquote
+#define srand jehanne_srand
+#define rand jehanne_rand
+#define nrand jehanne_nrand
+#define lrand jehanne_lrand
+#define lnrand jehanne_lnrand
+#define frand jehanne_frand
+#define truerand jehanne_truerand
+#define ntruerand jehanne_ntruerand
+#define getfcr jehanne_getfcr
+#define setfsr jehanne_setfsr
+#define setfcr jehanne_setfcr
+#define NaN jehanne_NaN
+#define Inf jehanne_Inf
+#define isNaN jehanne_isNaN
+#define isInf jehanne_isInf
+#define umuldiv jehanne_umuldiv
+#define muldiv jehanne_muldiv
+#define pow jehanne_pow
+#define atan2 jehanne_atan2
+#define fabs jehanne_fabs
+#define atan jehanne_atan
+#define log jehanne_log
+#define log10 jehanne_log10
+#define exp jehanne_exp
+#define floor jehanne_floor
+#define ceil jehanne_ceil
+#define hypot jehanne_hypot
+#define sin jehanne_sin
+#define cos jehanne_cos
+#define tan jehanne_tan
+#define asin jehanne_asin
+#define acos jehanne_acos
+#define sinh jehanne_sinh
+#define cosh jehanne_cosh
+#define tanh jehanne_tanh
+#define sqrt jehanne_sqrt
+#define atof jehanne_atof
+#define atoi jehanne_atoi
+#define atol jehanne_atol
+#define atoll jehanne_atoll
+#define dec64 jehanne_dec64
+#define enc64 jehanne_enc64
+#define dec32 jehanne_dec32
+#define enc32 jehanne_enc32
+#define dec16 jehanne_dec16
+#define enc16 jehanne_enc16
+#define encodefmt jehanne_encodefmt
+#define getfields jehanne_getfields
+#define gettokens jehanne_gettokens
+#define qsort jehanne_qsort
+#define strtod jehanne_strtod
+#define strtol jehanne_strtol
+#define strtoul jehanne_strtoul
+#define strtoll jehanne_strtoll
+#define strtoull jehanne_strtoull
+#define access jehanne_access
+#define convM2D jehanne_convM2D
+#define convD2M jehanne_convD2M
+#define sizeD2M jehanne_sizeD2M
+#define chartorune jehanne_chartorune
diff --git a/sys/src/kern/port/mcslock.c b/sys/src/kern/port/mcslock.c
index 8461af9..2137e4c 100644
--- a/sys/src/kern/port/mcslock.c
+++ b/sys/src/kern/port/mcslock.c
@@ -4,7 +4,7 @@
 #include "dat.h"
 #include "fns.h"
 
-#define	D(c)	if(0)cgapost((c))
+#define	D(c)
 
 static void
 mcslock(Lock *lk, LockEntry *ql)
diff --git a/sys/src/kern/port/netif.c b/sys/src/kern/port/netif.c
index 30b83de..d7c8dad 100644
--- a/sys/src/kern/port/netif.c
+++ b/sys/src/kern/port/netif.c
@@ -251,7 +251,6 @@ netifread(Netif *nif, Chan *c, void *a, long n, int64_t off)
 		for(i = 0; i < nif->alen; i++)
 			p = jehanne_seprint(p, e, "%2.2ux", nif->addr[i]);
 		p = jehanne_seprint(p, e, "\n");
-		jehanne_seprint(p, e, "oq len: %d\n", qblen(nif->oq));
 		n = readstr(offset, a, n, op);
 		jehanne_free(op);
 		return n;
@@ -261,8 +260,8 @@ netifread(Netif *nif, Chan *c, void *a, long n, int64_t off)
 		if(p == nil)
 			return 0;
 		e = p + READSTR;
-		p = jehanne_seprint(p, e, "in qlen: %ud\n", qblen(f->iq));
-		jehanne_seprint(p, e, "input overflows: %ud\n", f->inoverflows);
+		//p = jehanne_seprint(p, e, "in qlen: %ud\n", qblen(f->iq));
+		p = jehanne_seprint(p, e, "input overflows: %ud\n", f->inoverflows);
 		n = readstr(offset, a, n, op);
 		jehanne_free(op);
 		return n;
@@ -295,32 +294,10 @@ netifread(Netif *nif, Chan *c, void *a, long n, int64_t off)
 Block*
 netifbread(Netif *nif, Chan *c, long n, int64_t offset)
 {
-	Netfile *f;
-	Block *bp;
-
 	if((c->qid.type & QTDIR) || NETTYPE(c->qid.path) != Ndataqid)
 		return devbread(c, n, offset);
 
-	f = nif->f[NETID(c->qid.path)];
-	if(f->fat){
-		/*
-		 * Frame at a time (fat) allows us to provide
-		 * non-blocking performance with blocking semantics
-		 * for consumers that know ahead of time data is
-		 * contained within a single frame.  Once empty, we
-		 * get in line with other blocking reads and wait our
-		 * turn.
-		 */
-		for(;;){
-			if(bp = qget(f->iq))
-				return bp;
-			if(waserror())
-				return nil;
-			qsleep(f->iq);
-			poperror();
-		}
-	}
-	return qbread(f->iq, n);
+	return qbread(nif->f[NETID(c->qid.path)]->iq, n);
 }
 
 /*
@@ -749,12 +726,3 @@ netmulti(Netif *nif, Netfile *f, uint8_t *addr, int add)
 	}
 	return 0;
 }
-
-void
-netifbypass(Netif *nif, Chan *c, void (*bypass)(void*, Block*), void *arg)
-{
-	Netfile *f;
-
-	f = nif->f[NETID(c->qid.path)];
-	qsetbypass(f->iq, bypass, arg);
-}
diff --git a/sys/src/kern/port/netif.h b/sys/src/kern/port/netif.h
index 5e9759c..4f29672 100644
--- a/sys/src/kern/port/netif.h
+++ b/sys/src/kern/port/netif.h
@@ -131,4 +131,3 @@ long	netifwrite(Netif*, Chan*, void*, long);
 long	netifwstat(Netif*, Chan*, uint8_t*, long);
 long	netifstat(Netif*, Chan*, uint8_t*, long);
 int	activemulti(Netif*, uint8_t*, int);
-void	netifbypass(Netif*, Chan*, void (*)(void*, Block*), void*);
diff --git a/sys/src/kern/port/nocache.c b/sys/src/kern/port/nocache.c
deleted file mode 100644
index bebd80d..0000000
--- a/sys/src/kern/port/nocache.c
+++ /dev/null
@@ -1,38 +0,0 @@
-#include	"u.h"
-#include	"../port/lib.h"
-#include	"mem.h"
-#include	"dat.h"
-#include	"fns.h"
-#include	"../port/error.h"
-
-// No file caching
-
-void
-cinit(void)
-{
-}
-
-void
-copen(Chan *c)
-{
-	USED(c);
-}
-
-int
-cread(Chan *c, uint8_t *buf, int len, int64_t off)
-{
-	USED(c, buf, len, off);
-	return 0;
-}
-
-void
-cupdate(Chan *c, uint8_t *buf, int len, int64_t off)
-{
-	USED(c, buf, len, off);
-}
-
-void
-cwrite(Chan* c, uint8_t *buf, int len, int64_t off)
-{
-	USED(c, buf, len, off);
-}
diff --git a/sys/src/kern/port/nooptions.c b/sys/src/kern/port/nooptions.c
deleted file mode 100644
index 6d4c67b..0000000
--- a/sys/src/kern/port/nooptions.c
+++ /dev/null
@@ -1,31 +0,0 @@
-#include "u.h"
-#include "../port/lib.h"
-#include "mem.h"
-#include "dat.h"
-#include "fns.h"
-
-/*
- * No options from configuration (add amd64/options.c if you need them)
- */
-
-void
-confoptions(void)
-{
-}
-
-char*
-getconf(char *name)
-{
-	return 0;
-}
-
-void
-confsetenv(void)
-{
-}
-
-int
-isaconfig(char *class, int ctlrno, ISAConf *isa)
-{
-	return 0;
-}
diff --git a/sys/src/kern/port/pgrp.c b/sys/src/kern/port/pgrp.c
index ada6039..f824b87 100644
--- a/sys/src/kern/port/pgrp.c
+++ b/sys/src/kern/port/pgrp.c
@@ -237,7 +237,7 @@ closefgrp(Fgrp *f)
 }
 
 /*
- * Called from sleep because up is in the middle
+ * Called from interrupted() because up is in the middle
  * of closefgrp and just got a kill ctl message.
  * This usually means that up has wedged because
  * of some kind of deadly embrace with mntclose
@@ -312,21 +312,22 @@ resrcwait(char *reason, char *pstag)
 		panic("resrcwait");
 
 	p = up->psstate;
-	if(waserror()){
-		up->psstate = p;
-		nexterror();
-	}
-	if(reason) {
-		up->psstate = pstag;
+	if(reason != nil) {
+		if(waserror()){
+			up->psstate = p;
+			nexterror();
+		}
+		up->psstate = reason;
 		now = seconds();
 		/* don't tie up the console with complaints */
 		if(now - lastwhine > Whinesecs) {
 			lastwhine = now;
-			jehanne_print("%s\n", reason);
+			print("%s\n", reason);
 		}
 	}
-
-	tsleep(&up->sleep, return0, 0, 300);
-	poperror();
-	up->psstate = p;
+	tsleep(&up->sleep, return0, 0, 100+nrand(200));
+	if(reason != nil) {
+		up->psstate = p;
+		poperror();
+	}
 }
diff --git a/sys/src/kern/port/physalloc.c b/sys/src/kern/port/physalloc.c
deleted file mode 100644
index ca0d968..0000000
--- a/sys/src/kern/port/physalloc.c
+++ /dev/null
@@ -1,145 +0,0 @@
-#include "u.h"
-#include "../port/lib.h"
-#include "mem.h"
-#include "dat.h"
-#include "fns.h"
-
-/*
- * TO DO:
- *	big pool -> small pool
- */
-
-enum{
-	MinK=		PGSHFT,
-	MidK=		21,
-	MaxK=		30,		/* last usable k (largest block is 2^k) */
-};
-
-static	Bpool*	physgig;
-static	Bpool*	phys;
-
-static void*
-alloc0(usize nb, int clr)
-{
-	void *p;
-
-	p = basealloc(nb, 0, nil);
-	if(clr && p != nil)
-		jehanne_memset(p, 0, nb);
-	return p;
-}
-
-uintmem
-physalloc(usize size)
-{
-	uintmem a;
-
-	if(physgig != nil && size >= 1ull<<MidK){
-		a = bpoolalloc(physgig, size);
-		if(a != 0)
-			return a;
-	}
-	return bpoolalloc(phys, size);
-}
-
-void
-physfree(uintmem a, usize size)
-{
-	if(physgig != nil && a >= 4ull*GiB)
-		bpoolfree(physgig, a, size);
-	else
-		bpoolfree(phys, a, size);
-}
-
-void
-physallocrange(usize *low, usize *high)
-{
-	bpoolallocrange(phys, low, high);
-}
-
-void
-physinitfree(uintmem base, uintmem lim)
-{
-	uintmem a, lo, hi;
-
-	base = ROUNDUP(base, (1<<MinK));
-	lim = ROUNDDN(lim, (1<<MinK));
-	if(base == lim)
-		return;
-	if(physgig != nil && (base >= 4ull*GiB || lim > 4ull*GiB)){
-		a = base;
-		if(a < 4ull*GiB)
-			a = 4ull*GiB;
-		lo = ROUNDUP(a, (1<<MidK));
-		hi = ROUNDDN(lim, (1<<MidK));
-		if(lo != hi)
-			bpoolinitfree(physgig, lo, hi);
-		if(base == a)
-			return;
-		lim = 4ull*GiB;
-	}
-	bpoolinitfree(phys, base, lim);
-}
-
-char*
-seprintphysstats(char *s,  char *e)
-{
-	s = seprintbpoolstats(phys, s, e);
-	if(physgig != nil)
-		s = seprintbpoolstats(physgig, s, e);
-	return s;
-}
-
-void
-physallocinit(void)
-{
-	uintmem top, avail, base, size, lim, pa, lo, hi;
-	RMapel *e;
-
-	if(DBGFLG)
-		rmapprint(&rmapram);
-	avail = rmapsize(&rmapram);
-	DBG("avail: %#P\n", avail);
-	top = 0;
-	for(e = rmapram.map; e != nil; e = e->next)
-		top = e->addr + e->size;
-	if(top > 4ull*GiB){
-		physgig = bpoolcreate(MidK, MaxK, 4ull*GiB, top, alloc0);
-		phys = bpoolcreate(MinK, MaxK, 0, 4ull*GiB, alloc0);
-	}else
-		phys = bpoolcreate(MinK, MaxK, 0, top, alloc0);
-	pa = mmuphysaddr(sys->vmstart) + sys->pmunassigned;
-	if(DBGFLG)
-		rmapprint(&rmapram);
-	DBG("pa lim: %#llux top %#llux\n", pa, top);
-	while(rmapfirst(&rmapram, pa, &base, &size)){
-		if(base >= 4ull*GiB)
-			break;
-		lim = base+size;
-		if(lim > 4ull*GiB)
-			lim = 4ull*GiB;
-		lo = ROUNDUP(base, (1<<MinK));
-		hi = ROUNDDN(lim, (1<<MinK));
-		if(lo != hi){
-			DBG("lo=%#llux hi=%#llux\n", lo, hi);
-			pa = rmapalloc(&rmapram, lo, hi-lo, 0);
-			if(pa == 0)
-				break;
-			physinitfree(lo, hi);
-			sys->pmpaged += hi - lo;
-		}
-	}
-	if(DBGFLG)
-		physdump();
-}
-
-void
-physdump(void)
-{
-	jehanne_print("bpooldump phys: ");
-	bpooldump(phys);
-	if(physgig != nil){
-		jehanne_print("bpooldump physgig: ");
-		bpooldump(physgig);
-	}
-}
diff --git a/sys/src/kern/port/portclock.c b/sys/src/kern/port/portclock.c
index 022ca35..688d579 100644
--- a/sys/src/kern/port/portclock.c
+++ b/sys/src/kern/port/portclock.c
@@ -149,6 +149,7 @@ hzclock(Ureg *ur)
 	if(m->proc)
 		m->proc->pc = ur->ip;
 
+	checkflushmmu();
 	accounttime();
 	kmapinval();
 
@@ -165,7 +166,7 @@ hzclock(Ureg *ur)
 
 	if(m->machno == 0){
 		checkalarms();
-		checkwakeups();
+		awake_tick(m->ticks);
 	}
 
 	if(up && up->state == Running)
diff --git a/sys/src/kern/port/portdat.h b/sys/src/kern/port/portdat.h
index 729a24d..b7cf15b 100644
--- a/sys/src/kern/port/portdat.h
+++ b/sys/src/kern/port/portdat.h
@@ -16,6 +16,7 @@
  * along with Jehanne.  If not, see <http://www.gnu.org/licenses/>.
  */
 typedef struct Alarms	Alarms;
+typedef struct AwakeAlarm AwakeAlarm;
 typedef struct Block	Block;
 typedef struct Bpool Bpool;
 typedef struct Chan	Chan;
@@ -28,7 +29,6 @@ typedef struct Egrp	Egrp;
 typedef struct Evalue	Evalue;
 typedef struct Fgrp	Fgrp;
 typedef struct Ldseg	Ldseg;
-typedef struct LockEntry	LockEntry;
 typedef struct Log	Log;
 typedef struct Logflag	Logflag;
 typedef struct Mntcache Mntcache;
@@ -52,8 +52,6 @@ typedef struct Queue	Queue;
 typedef struct Ref	Ref;
 typedef struct Rendez	Rendez;
 typedef struct Rgrp	Rgrp;
-typedef struct RMap	RMap;
-typedef struct RMapel RMapel;
 typedef struct RWlock	RWlock;
 typedef struct Schedq	Schedq;
 typedef struct Sema	Sema;
@@ -64,10 +62,10 @@ typedef struct Waitq	Waitq;
 typedef struct Walkqid	Walkqid;
 typedef struct Watchdog	Watchdog;
 typedef int    Devgen(Chan*, char*, Dirtab*, int, int, Dir*);
+typedef struct Pool Pool;
 
 #pragma incomplete Bpool
 #pragma incomplete DevConf
-#pragma incomplete Mntcache
 #pragma incomplete Mntrpc
 #pragma incomplete Queue
 #pragma incomplete Timers
@@ -79,20 +77,6 @@ struct Ref
 	int	ref;
 };
 
-struct LockEntry
-{
-	LockEntry*	next;
-	Lock*		used;
-	int		locked;
-	int		isilock;
-	Mpl		sr;
-
-	/* for debugging */
-	uintptr_t	pc;
-	Proc*		p;
-	Mach*		m;
-};
-
 struct Rendez
 {
 	Lock	l;
@@ -119,23 +103,6 @@ struct RWlock
 	int		writer;		/* number of writers */
 };
 
-struct RMapel
-{
-	uintmem	size;
-	uintmem	addr;
-	RMapel*	next;
-};
-
-struct RMap
-{
-	char*	name;
-
-	RMapel*	(*alloc)(void);
-	RMapel*	map;
-	RMapel*	free;
-	Lock	l;
-};
-
 struct Alarms
 {
 	QLock	ql;
@@ -161,7 +128,6 @@ enum
 	CCEXEC	= 0x0008,		/* close on exec */
 	CFREE	= 0x0010,		/* not in use */
 	CRCLOSE	= 0x0020,		/* remove on close */
-	CCACHE	= 0x0080,		/* client cache */
 };
 
 /* flag values */
@@ -217,7 +183,6 @@ struct Chan
 	int		mrock;
 	QLock		rockqlock;
 	int		ismtpt;
-	Mntcache*	mc;			/* Mount cache pointer */
 	Mnt*		mux;			/* Mnt for clients using me for messages */
 	union {
 		void*		aux;
@@ -323,7 +288,6 @@ struct Mnt
 	Mntrpc*		queue;		/* Queue of pending requests on this channel */
 	uint32_t	id;		/* Multiplexer id for channel check */
 	Mnt*		list;		/* Free list */
-	int		flags;		/* cache */
 	int		msize;		/* data + IOHDRSZ */
 	char*		version;	/* 9P version */
 	Queue*		q;		/* input queue */
@@ -498,7 +462,7 @@ enum
 	SSEG, TSEG, DSEG, BSEG, ESEG, LSEG, SEG1, SEG2, SEG3, SEG4, NSEG
 };
 
-enum
+typedef enum ProcState
 {
 	Dead = 0,		/* Process states */
 	Moribund,
@@ -513,7 +477,10 @@ enum
 	Stopped,
 	Rendezvous,
 	Waitrelease,
+} ProcState;
 
+enum
+{
 	Proc_stopme = 1, 	/* devproc requests */
 	Proc_exitme,
 	Proc_traceme,
@@ -555,11 +522,23 @@ union ScRet {
 	int64_t		vl;
 };
 
+typedef struct ProcWakeup
+{
+	int		count;		/* reduced when moved to ringing or cleared */
+	Syscalls	blockingsc;	/* set to cursyscall on sleep() and sysrendevouz
+					 * reset by syscall
+					 */
+	unsigned long	fell_asleep;	/* debug: last time we went to sleep */
+	unsigned long	awakened;	/* debug: last time we stopped sleeping */
+	AwakeAlarm*	elapsed;
+	unsigned long	last;		/* freed on pexit/noted */
+} ProcWakeup;
+
 struct Proc
 {
 	Label		sched;		/* known to l.s */
 	char*		kstack;		/* known to l.s */
-	void*		dbgreg;		/* known to l.s User registers for devproc */
+	Ureg*		dbgreg;		/* known to l.s User registers for devproc */
 	Mach*		mach;		/* machine running this proc */
 	char*		text;
 	char*		user;
@@ -568,7 +547,7 @@ struct Proc
 	Proc*		rnext;		/* next process in run queue */
 	Proc*		qnext;		/* next process on queue for a QLock */
 	QLock*		qlock;		/* addr of qlock being queued for DEBUG */
-	int		state;
+	ProcState	state;
 	char*		psstate;	/* What /proc/#/status reports */
 	ProcSegment*	seg[NSEG];
 	RWlock		seglock;	/* wlocked whenever seg[] changes */
@@ -609,10 +588,8 @@ struct Proc
 	Profbuf*	prof;
 
 	int		inkernel;	/* either on syscall or fault */
+	int		fpstate;
 	Syscalls	cursyscall;	/* zero on fault */
-	Syscalls	blockingsc;	/* set to cursyscall on sleep() and sysrendevouz
-					 * reset by syscall
-					 */
 
 	int32_t		blockingfd;	/* fd currenly read/written */
 
@@ -630,11 +607,12 @@ struct Proc
 	int		notepending;	/* note issued but not acted on */
 	int		notedeferred;	/* note not to be acted on immediately */
 	int		kp;		/* true if a kernel process */
-	Proc*		palarm;		/* Next alarm time */
 	uint32_t	alarm;		/* Time of call */
-	uint32_t	wakeups;	/* Number of pending wakeups */
-	uint64_t	pendingWakeup;	/* checked on blocking syscall enter */
-	uint64_t	lastWakeup;	/* set on blocking syscall exit */
+	Proc*		palarm;		/* Next alarm time */
+
+	int		nwakeups;	/* number of allocated AwakeAlarms */
+	ProcWakeup	wakeups[2];	/* sysawake support */
+
 	int		newtlb;		/* Pager has changed my pte's, I must flush */
 	int		noswap;		/* process is not swappable */
 
@@ -689,6 +667,7 @@ struct Proc
 	int		trace;		/* process being traced? */
 
 	uintptr_t	qpc;		/* pc calling last blocking qlock */
+	QLock		*eql;		/* interruptable eqlock */
 
 	int		setargs;
 
@@ -696,10 +675,7 @@ struct Proc
 
 	Queue*		syscallq;
 
-	/*
-	 *  machine specific fpu, mmu and notify
-	 */
-	PFPU	FPU;
+	FPsave		fpsave;
 	PMMU;
 	PNOTIFY;
 };
@@ -722,9 +698,10 @@ enum
 	READSTR =	4000,		/* temporary buffer size for device reads */
 };
 
+extern Pool*	secrmem;
+
 extern	char*	conffile;
 extern	int	cpuserver;
-extern	char*	cputype;
 extern  char*	eve;
 extern	char	hostdomain[];
 extern	uint8_t	initcode[];
@@ -733,10 +710,11 @@ extern  Ref	noteidalloc;
 extern	int	nphysseg;
 extern	int	nsyscall;
 extern	Procalloc	procalloc;
-extern	RMap rmapram;
+extern	RMap	rmapram;
 extern	uint32_t	qiomaxatomic;
 extern	char*	statename[];
 extern	char*	sysname;
+extern	Queue*	serialoq;
 
 enum
 {
@@ -809,7 +787,6 @@ struct PhysUart
 	void	(*power)(Uart*, int);
 	int	(*getc)(Uart*);			/* polling version for rdb */
 	void	(*putc)(Uart*, int);		/* polling version for iprint */
-	void	(*poll)(Uart*);			/* polled interrupt routine */
 };
 
 enum {
diff --git a/sys/src/kern/port/portfns.h b/sys/src/kern/port/portfns.h
index a4312aa..3c2a17a 100644
--- a/sys/src/kern/port/portfns.h
+++ b/sys/src/kern/port/portfns.h
@@ -24,16 +24,23 @@ int		addkbdq(Queue*, int);
 void		adduser(char*, char*, int, char**);
 void		addwatchdog(Watchdog*);
 int		adec(int*);
+short		adec16(short*);
 Block*		adjustblock(Block*, int);
 int		ainc(int*);
+short		ainc16(short*);
 void		alarmkproc(void*);
 Block*		allocb(int);
 Block*		allocbalign(int, int);
 int		anyhigher(void);
 int		anyready(void);
-void		awakekproc(void*);
-#define	awokeproc(p)	(p->lastWakeup = p->pendingWakeup)
-#define	awakeOnBlock(p)	(p->blockingsc && p->lastWakeup < p->pendingWakeup)
+void		awake_tick(unsigned long tick);
+void		awake_timer(void*);
+void		awake_ringer(void*);
+void		awake_gc_proc(Proc *p);
+int		awake_should_wake_up(Proc *p);
+void		awake_fell_asleep(Proc *p);
+void		awake_awakened(Proc *p);
+void		awake_gc_note(Proc *p);
 Block*		bl2mem(uint8_t*, Block*, int);
 int		blocklen(Block*);
 void		bootlinks(void);
@@ -48,20 +55,16 @@ char*		chanpath(Chan*);
 int		canlock(Lock*);
 int		canqlock(QLock*);
 int		canrlock(RWlock*);
-int		canwakeup(Syscalls scall);
 Chan*		cclone(Chan*);
 void		cclose(Chan*);
 void		ccloseq(Chan*);
 void		(*consdebug)(void);
-void		(*consputs)(char*, int);
+void		(*screenputs)(char*, int);
 void		chanfree(Chan*);
 void		checkalarms(void);
-void		checkwakeups(void);
 void		checkb(Block*, char*);
 void		checkflushmmu(void);
 void		checkmmu(uintptr_t, uintmem);
-void		cinit(void);
-void		clearwakeups(Proc*);
 void		closeegrp(Egrp*);
 void		closefgrp(Fgrp*);
 void		closepgrp(Pgrp*);
@@ -72,12 +75,8 @@ int		cmount(Chan**, Chan*, int, char*);
 #define	commonuser()	(up->user)
 Block*		concatblock(Block*);
 int		consactive(void);
-void		copen(Chan*);
 Block*		copyblock(Block*, int);
-int		cread(Chan*, uint8_t*, int, int64_t);
 void		cunmount(Chan*, Chan*);
-void		cupdate(Chan*, uint8_t*, int, int64_t);
-void		cwrite(Chan*, uint8_t*, int, int64_t);
 uintptr_t		dbgpc(Proc*);
 int		decref(Ref*);
 int		decrypt(void*, void*, int);
@@ -123,6 +122,7 @@ int		emptystr(char*);
 int		encrypt(void*, void*, int);
 void		envcpy(Egrp*, Egrp*);
 int		eqchanddq(Chan*, int, uint32_t, Qid, int);
+void		eqlock(QLock *q);
 int		eqqid(Qid, Qid);
 void		error(char*) __attribute__ ((noreturn));
 void		errorl(char*, long) __attribute__ ((noreturn));
@@ -149,6 +149,7 @@ char*		getconfenv(void);
 int		haswaitq(void*);
 long		hostdomainwrite(char*, long);
 long		hostownerwrite(char*, long);
+void 		(*hwrandbuf)(void*, uint32_t);
 void		hzsched(void);
 Block*		iallocb(int);
 void		ialloclimit(uint32_t);
@@ -158,6 +159,7 @@ void		iunlock(Lock*);
 int		incref(Ref*);
 int		ingroup(char*, char*);
 void		initimage(void);
+void		interrupted(void);
 int		iprint(char*, ...);
 void		isdir(Chan*);
 int		iseve(void);
@@ -166,8 +168,7 @@ int		islo(void);
 #define	islocked(l)	((l)->key != 0)
 int		ispages(void*);
 int		isphysseg(char*);
-int		isrmapped(RMap*, uintmem, uintmem*);
-void		ixsummary(void);
+int		ismapped(RMap*, uintmem, uintmem*);
 int		kbdcr2nl(Queue*, int);
 int		kbdgetmap(int, int*, int*, Rune*);
 int		kbdputc(Queue*, int);
@@ -184,7 +185,6 @@ int			labtrap(char*);
 long		latin1(Rune*, int);
 int		leadsgroup(char*, char*);
 int		lock(Lock*);
-uintptr_t	lockgetpc(Lock*);
 void		locksetpc(Lock*, uintptr_t);
 void		logopen(Log*);
 void		logclose(Log*);
@@ -232,7 +232,7 @@ int		nrand(int);
 uint64_t		ns2fastticks(uint64_t);
 int		okaddr(uintptr_t, long, int);
 unsigned long	openmode(unsigned long);
-int		ownlock(Lock*);
+#define ownlock(l) (l->lm == MACHP(m->machno))
 Block*		packblock(Block*);
 Block*		padblock(Block*, int);
 void		pageinit(void);
@@ -254,15 +254,13 @@ void		physdump(void);
 int		psindex(int);
 #define		poperror()		up->nerrlab--
 int		postnote(Proc*, int, char*, int);
-void	priqlock(QLock*);
 void		prockill(Proc*, int, char*);
 int		pprint(char*, ...);
 int		preempted(void);
 void		prflush(void);
 void		printinit(void);
-void		psinit(int);
+void		psinit(unsigned int);
 uint64_t	procalarm(uint64_t);
-int64_t		procawake(int64_t);
 void		procctl(Proc*);
 uint32_t	procdatasize(Proc*, int);
 void		procdump(void);
@@ -271,6 +269,7 @@ void		procs_flush_segment(ProcSegment*);
 void		procpriority(Proc*, int, int);
 void		procrestore(Proc*);
 void		procsave(Proc*);
+int		proc_interrupt_finalize(Proc *p);
 Proc*		psincref(int);
 void		psdecref(Proc*);
 void		(*proctrace)(Proc*, int, int64_t, int64_t);
@@ -284,7 +283,7 @@ Block*		pullupqueue(Queue*, int);
 void		putmhead(Mhead*);
 void		putstrn(char*, int);
 int		pwait(Waitmsg*);
-void		qaddlist(Queue*, Block*);
+int		qaddlist(Queue*, Block*);
 int		qblen(Queue*);
 Block*		qbread(Queue*, int);
 long		qbwrite(Queue*, Block*);
@@ -323,6 +322,7 @@ int		rand(void);
 void		randominit(void);
 uint32_t		randomread(void*, uint32_t);
 void		rdb(void);
+long		readblist(Block*, unsigned char*, long, unsigned int);
 int		readnum(uint32_t, char*, uint32_t, uint32_t, int);
 long		readstr(long, char*, long, char*);
 void		ready(Proc*);
@@ -333,19 +333,22 @@ void		resched(char*);
 void		resrcwait(char*, char*);
 int		return0(void*);
 void		rlock(RWlock*);
-void		rmapinit(RMap*, char*, RMapel* (*)(void));
-uintmem	rmapalloc(RMap*, uintmem, uintmem, uint32_t);
-int		rmapfirst(RMap*, uintmem, uintmem*, uintmem*);
-void		rmapfree(RMap*, uintmem, uintmem);
-void		rmapgaps(RMap*, RMap*);
-void		rmapprint(RMap*);
-uintmem	rmapsize(RMap*);
+
+uintptr_t	mapalloc(RMap*, uintptr_t, int, int);
+void		mapfree(RMap*, uintptr_t, uintptr_t);
+void		mapprint(RMap*);
+int		mapfirst(RMap *r, uintptr_t start, uintptr_t *addr, uintptr_t *size);
+uintptr_t	mapsize(RMap *r);
+uintptr_t	maptop(RMap *r);
+
 long		rtctime(void);
 void		runlock(RWlock*);
 Proc*		runproc(void);
 void		sched(void);
 void		scheddump(void);
 void		schedinit(void);
+void*		secalloc(uint32_t);
+void		secfree(void*);
 long		seconds(void);
 char*	seprintbpoolstats(Bpool*, char*, char*);
 char*	seprintphysstats(char*, char*);
@@ -370,7 +373,7 @@ void		timeradd(Timer*);
 void		timerdel(Timer*);
 void		timersinit(void);
 void		timerintr(Ureg*, void*);
-void		timerset(uint64_t);
+void		timerset(Tval);
 #define		tk2ms(x) ((x)*(1000/HZ))
 #define		TK2MS(x) ((x)*(1000/HZ))
 uint64_t		tod2fastticks(int64_t);
@@ -380,10 +383,11 @@ void		todinit(void);
 void		todset(int64_t, int64_t, int);
 void		tsleep(Rendez*, int (*)(void*), void*, int64_t);
 Block*		trimblock(Block*, int, int);
-Uart*		uartconsole(int, char*);
 int		uartctl(Uart*, char*);
 int		uartgetc(void);
 void		uartkick(void*);
+void		uartmouse(char*, int (*)(Queue*, int), int);
+void		uartsetmouseputc(char*, int (*)(Queue*, int));
 void		uartputc(int);
 void		uartputs(char*, int);
 void		uartrecv(Uart*, char);
@@ -405,6 +409,14 @@ Proc*		wakeup(Rendez*);
 int		walk(Chan**, char**, int, int, int*);
 void		wlock(RWlock*);
 void		wunlock(RWlock*);
+void*		xalloc(uint32_t);
+void*		xallocz(uint32_t, int);
+void		xfree(void*);
+void		xhole(uintptr_t, uintptr_t);
+void		xinit(void);
+int		xmerge(void*, void*);
+void*		xspanalloc(uint32_t, int, uint32_t);
+void		xsummary(void);
 void		yield(void);
 void		hnputv(void*, uint64_t);
 void		hnputl(void*, uint32_t);
diff --git a/sys/src/kern/port/print.c b/sys/src/kern/port/print.c
index 8982639..0846d6c 100644
--- a/sys/src/kern/port/print.c
+++ b/sys/src/kern/port/print.c
@@ -39,5 +39,5 @@ void
 fmtinit(void)
 {
 	jehanne_quotefmtinstall();
-	archfmtinstall();
+//	archfmtinstall();
 }
diff --git a/sys/src/kern/port/proc.c b/sys/src/kern/port/proc.c
index 6ea1542..05b5826 100644
--- a/sys/src/kern/port/proc.c
+++ b/sys/src/kern/port/proc.c
@@ -100,6 +100,8 @@ schedinit(void)		/* never returns */
 			psrelease(up);
 			unlock(&procalloc.l);
 			break;
+		default:
+			break;
 		}
 		up->mach = nil;
 		coherence();
@@ -159,9 +161,11 @@ sched(void)
 		m->schedticks = m->ticks + HZ/10;
 	m->readied = 0;
 	up = p;
+	lock(&up->rlock);
 	up->state = Running;
 	up->mach = m;
 	m->proc = up;
+	unlock(&up->rlock);
 	mmuswitch(up);
 	gotolabel(&up->sched);
 }
@@ -286,7 +290,7 @@ updatecpu(Proc *p)
 
 /*
  * On average, p has used p->cpu of a cpu recently.
- * Its fair share is sys.nonline/m->load of a cpu.  If it has been getting
+ * Its fair share is sys->nmach/m->load of a cpu.  If it has been getting
  * too much, penalize it.  If it has been getting not enough, reward it.
  * I don't think you can get much more than your fair share that
  * often, so most of the queues are for using less.  Having a priority
@@ -307,7 +311,7 @@ reprioritize(Proc *p)
 	 * except the decimal point is moved three places
 	 * on both load and fairshare.
 	 */
-	fairshare = (sys->nonline*1000*1000)/load;
+	fairshare = (sys->nmach*1000*1000)/load;
 	n = p->cpu;
 	if(n == 0)
 		n = 1;
@@ -712,10 +716,10 @@ sleep(Rendez *r, int (*f)(void*), void *arg)
 	 */
 	r->p = up;
 
-	up->blockingsc = up->cursyscall;
+	awake_fell_asleep(up);
 	if((*f)(arg)
 	|| (up->notepending && !up->notedeferred)
-	|| (up->inkernel && awakeOnBlock(up) && canwakeup(up->cursyscall))){
+	|| (up->inkernel && awake_should_wake_up(up))){
 		/*
 		 *  if condition happened or a note is pending
 		 *  never mind
@@ -758,16 +762,23 @@ sleep(Rendez *r, int (*f)(void*), void *arg)
 		up->notepending = 0;
 SleepAwakened:
 		splx(s);
-		if(up->procctl == Proc_exitme && up->closingfgrp)
-			forceclosefgrp();
-		error(Eintr);
+		interrupted();
 	}
-	if(up->inkernel && awakeOnBlock(up) && canwakeup(up->cursyscall))
+	if(up->inkernel && awake_should_wake_up(up)){
 		goto SleepAwakened;
+	}
 
 	splx(s);
 }
 
+void
+interrupted(void)
+{
+	if(up->procctl == Proc_exitme && up->closingfgrp != nil)
+		forceclosefgrp();
+	error(Eintr);
+}
+
 static int
 tfn(void *arg)
 {
@@ -870,7 +881,6 @@ postnote(Proc *p, int dolock, char *n, int flag)
 	Mreg s;
 	int ret;
 	Rendez *r;
-	Proc *d, **l;
 
 	if(dolock)
 		qlock(&p->debug);
@@ -924,27 +934,79 @@ postnote(Proc *p, int dolock, char *n, int flag)
 	unlock(&p->rlock);
 	splx(s);
 
-	if(p->state != Rendezvous)
-		return ret;
-
-	/* Try and pull out of a rendezvous */
-	lock(&p->rgrp->l);
-	if(p->state == Rendezvous) {
-		p->rendval = ~0;
-		l = &REND(p->rgrp, p->rendtag);
-		for(d = *l; d; d = d->rendhash) {
-			if(d == p) {
-				*l = p->rendhash;
-				break;
-			}
-			l = &d->rendhash;
-		}
-		ready(p);
-	}
-	unlock(&p->rgrp->l);
+	proc_interrupt_finalize(p);
 	return ret;
 }
 
+int
+proc_interrupt_finalize(Proc *p)
+{
+	QLock *q;
+	int done = 0;
+	switch(p->state){
+	default:
+		return 1;
+	case Queueing:
+		/* Try and pull out of a eqlock */
+		if((q = p->eql) != nil){
+			lock(&q->use);
+			if(p->state == Queueing && p->eql == q){
+				Proc *d, *l;
+				for(l = nil, d = q->head; d != nil; l = d, d = d->qnext){
+					if(d == p){
+						if(l != nil)
+							l->qnext = p->qnext;
+						else
+							q->head = p->qnext;
+						if(p->qnext == nil)
+							q->tail = l;
+						p->qnext = nil;
+						p->eql = nil;	/* not taken */
+						ready(p);
+						done = 1;
+						break;
+					}
+				}
+			}
+			unlock(&q->use);
+			return done;
+		}
+		/* not an eqlock */
+		return 0;
+	case Rendezvous:
+		/* Try and pull out of a rendezvous */
+		lock(&p->rgrp->l);
+		if(p->state == Rendezvous) {
+			p->rendval = ~0;
+			if(p->rendtag == ~0){
+				/* In Jehanne the rendezvous point ~0
+				 * is "private" to each process so
+				 * it is not added to the rgrp (see sysrendezvous)
+				 */
+				ready(p);
+				done = 1;
+				goto RendezvousCompleted;
+			}
+			Proc *d, **l;
+
+			l = &REND(p->rgrp, p->rendtag);
+			for(d = *l; d != nil; d = d->rendhash) {
+				if(d == p) {
+					*l = p->rendhash;
+					p->rendval = ~0;
+					ready(p);
+					done = 1;
+					break;
+				}
+				l = &d->rendhash;
+			}
+		}
+RendezvousCompleted:
+		unlock(&p->rgrp->l);
+		return done;
+	}
+}
+
 /*
  * prevent application notes within a control request that must complete
  */
@@ -1049,7 +1111,7 @@ pexit(char *exitstr, int freemem)
 
 	up->alarm = 0;
 	up->blockingfd = -1;
-	clearwakeups(up);
+	awake_gc_proc(up);
 	if (up->tt)
 		timerdel(up);
 	pt = proctrace;
@@ -1205,15 +1267,15 @@ pwait(Waitmsg *w)
 	}
 
 	lock(&up->exl);
-	if(up->nchild == 0 && up->waitq == 0) {
+	while(up->waitq == nil) {
+		if(up->nchild == 0) {
+			unlock(&up->exl);
+			error(Enochild);
+		}
 		unlock(&up->exl);
-		error(Enochild);
+		sleep(&up->waitr, haswaitq, up);
+		lock(&up->exl);
 	}
-	unlock(&up->exl);
-
-	sleep(&up->waitr, haswaitq, up);
-
-	lock(&up->exl);
 	wq = up->waitq;
 	up->waitq = wq->next;
 	up->nwait--;
@@ -1222,7 +1284,7 @@ pwait(Waitmsg *w)
 	qunlock(&up->qwaitr);
 	poperror();
 
-	if(w)
+	if(w != nil)
 		jehanne_memmove(w, &wq->w, sizeof(Waitmsg));
 	cpid = wq->w.pid;
 	jehanne_free(wq);
@@ -1248,10 +1310,12 @@ dumpaproc(Proc *p)
 	s = p->psstate;
 	if(s == 0)
 		s = statename[p->state];
-	jehanne_print("%3d:%10s pc %#p dbgpc %#p  %8s (%s) ut %ld st %ld bss %#p qpc %#p nl %d nd %lud lpc %#p pri %lud\n",
-		p->pid, p->text, p->pc, dbgpc(p), s, statename[p->state],
+	jehanne_print("%3d:%10s %#p pc %#p dbgpc %#p  %8s (%s) ut %ld st %ld bss %#p qpc %#p nl %d nd %lud lpc %#p pri %lud wkps %d/%d[%#p,%#p]\n",
+		p->pid, p->text, p, p->pc, dbgpc(p), s, statename[p->state],
 		p->time[0], p->time[1], bss, p->qpc, p->nlocks,
-		p->delaysched, p->lastlock ? lockgetpc(p->lastlock) : 0, p->priority);
+		p->delaysched, p->lastlock ? lockgetpc(p->lastlock) : 0, p->priority,
+		p->wakeups[0].count, p->wakeups[1].count, p->wakeups[0].elapsed, p->wakeups[1].elapsed
+	);
 }
 
 void
diff --git a/sys/src/kern/port/ps.c b/sys/src/kern/port/ps.c
index 691168c..6c1478f 100644
--- a/sys/src/kern/port/ps.c
+++ b/sys/src/kern/port/ps.c
@@ -51,6 +51,15 @@ psindex(int pid)
 	return s;
 }
 
+Proc*
+debug_get_proc_by_pid(int pid)
+{
+	int i = psindex(pid);
+	if(i < 0)
+		return nil;
+	return procalloc.arena + i;
+}
+
 Proc*
 psincref(int i)
 {
@@ -105,13 +114,13 @@ psalloc(void)
 }
 
 void
-psinit(int nproc)
+psinit(unsigned int nproc)
 {
 	Proc *p;
 	int i;
 
 	procalloc.nproc = nproc;
-	procalloc.free = jehanne_malloc(nproc*sizeof(Proc));
+	procalloc.free = xalloc(nproc*sizeof(Proc));
 	if(procalloc.free == nil)
 		panic("cannot allocate %ud procs (%udMB)\n", nproc, nproc*sizeof(Proc)/(1024*1024));
 	procalloc.arena = procalloc.free;
diff --git a/sys/src/kern/port/qio.c b/sys/src/kern/port/qio.c
index 41e85fc..6e16588 100644
--- a/sys/src/kern/port/qio.c
+++ b/sys/src/kern/port/qio.c
@@ -5,15 +5,12 @@
 #include	"fns.h"
 #include	"../port/error.h"
 
-static uint32_t padblockcnt;
-static uint32_t concatblockcnt;
-static uint32_t pullupblockcnt;
-static uint32_t copyblockcnt;
-static uint32_t consumecnt;
-static uint32_t producecnt;
-static uint32_t qcopycnt;
-
-static int debugging;
+static unsigned int padblockcnt;
+static unsigned int concatblockcnt;
+static unsigned int pullupblockcnt;
+static unsigned int copyblockcnt;
+static unsigned int consumecnt;
+static unsigned int producecnt;
 
 #define QDEBUG	if(0)
 
@@ -56,17 +53,6 @@ enum
 
 uint32_t	qiomaxatomic = Maxatomic;
 
-void
-ixsummary(void)
-{
-	debugging ^= 1;
-	iallocsummary();
-	jehanne_print("pad %lud, concat %lud, pullup %lud, copy %lud\n",
-		padblockcnt, concatblockcnt, pullupblockcnt, copyblockcnt);
-	jehanne_print("consume %lud, produce %lud, qcopy %lud\n",
-		consumecnt, producecnt, qcopycnt);
-}
-
 /*
  *  free a list of blocks
  */
@@ -75,9 +61,9 @@ freeblist(Block *b)
 {
 	Block *next;
 
-	for(; b != 0; b = next){
+	for(; b != nil; b = next){
 		next = b->next;
-		b->next = 0;
+		b->next = nil;
 		freeb(b);
 	}
 }
@@ -91,40 +77,31 @@ padblock(Block *bp, int size)
 	int n;
 	Block *nbp;
 
-	QDEBUG checkb(bp, "padblock 1");
+	QDEBUG checkb(bp, "padblock 0");
 	if(size >= 0){
 		if(bp->rp - bp->base >= size){
 			bp->rp -= size;
 			return bp;
 		}
-
-		if(bp->next)
-			panic("padblock %#p", getcallerpc());
 		n = BLEN(bp);
-		padblockcnt++;
 		nbp = allocb(size+n);
 		nbp->rp += size;
 		nbp->wp = nbp->rp;
 		jehanne_memmove(nbp->wp, bp->rp, n);
 		nbp->wp += n;
-		freeb(bp);
 		nbp->rp -= size;
 	} else {
 		size = -size;
-
-		if(bp->next)
-			panic("padblock %#p", getcallerpc());
-
 		if(bp->lim - bp->wp >= size)
 			return bp;
-
 		n = BLEN(bp);
-		padblockcnt++;
-		nbp = allocb(size+n);
+		nbp = allocb(n+size);
 		jehanne_memmove(nbp->wp, bp->rp, n);
 		nbp->wp += n;
-		freeb(bp);
 	}
+	nbp->next = bp->next;
+	freeb(bp);
+	padblockcnt++;
 	QDEBUG checkb(nbp, "padblock 1");
 	return nbp;
 }
@@ -138,7 +115,7 @@ blocklen(Block *bp)
 	int len;
 
 	len = 0;
-	while(bp) {
+	while(bp != nil) {
 		len += BLEN(bp);
 		bp = bp->next;
 	}
@@ -154,7 +131,7 @@ blockalloclen(Block *bp)
 	int len;
 
 	len = 0;
-	while(bp) {
+	while(bp != nil) {
 		len += BALLOC(bp);
 		bp = bp->next;
 	}
@@ -162,28 +139,19 @@ blockalloclen(Block *bp)
 }
 
 /*
- *  copy the  string of blocks into
+ *  copy the string of blocks into
  *  a single block and free the string
  */
 Block*
 concatblock(Block *bp)
 {
 	int len;
-	Block *nb, *f;
 
-	if(bp->next == 0)
+	if(bp->next == nil)
 		return bp;
-
-	nb = allocb(blocklen(bp));
-	for(f = bp; f; f = f->next) {
-		len = BLEN(f);
-		jehanne_memmove(nb->wp, f->rp, len);
-		nb->wp += len;
-	}
-	concatblockcnt += BLEN(nb);
-	freeblist(bp);
-	QDEBUG checkb(nb, "concatblock 1");
-	return nb;
+	len = blocklen(bp);
+	concatblockcnt += len;
+	return pullupblock(bp, len);
 }
 
 /*
@@ -192,8 +160,8 @@ concatblock(Block *bp)
 Block*
 pullupblock(Block *bp, int n)
 {
-	int i;
 	Block *nbp;
+	int i;
 
 	/*
 	 *  this should almost always be true, it's
@@ -216,11 +184,11 @@ pullupblock(Block *bp, int n)
 	 *  copy bytes from the trailing blocks into the first
 	 */
 	n -= BLEN(bp);
-	while(nbp = bp->next){
+	while((nbp = bp->next) != nil){
+		pullupblockcnt++;
 		i = BLEN(nbp);
 		if(i > n) {
 			jehanne_memmove(bp->wp, nbp->rp, n);
-			pullupblockcnt++;
 			bp->wp += n;
 			nbp->rp += n;
 			QDEBUG checkb(bp, "pullupblock 1");
@@ -228,15 +196,14 @@ pullupblock(Block *bp, int n)
 		} else {
 			/* shouldn't happen but why crash if it does */
 			if(i < 0){
-				jehanne_print("pullupblock -ve length, from %#p\n",
+				jehanne_print("pullup negative length packet, called from %#p\n",
 					getcallerpc());
 				i = 0;
 			}
 			jehanne_memmove(bp->wp, nbp->rp, i);
-			pullupblockcnt++;
 			bp->wp += i;
 			bp->next = nbp->next;
-			nbp->next = 0;
+			nbp->next = nil;
 			freeb(nbp);
 			n -= i;
 			if(n == 0){
@@ -246,7 +213,7 @@ pullupblock(Block *bp, int n)
 		}
 	}
 	freeb(bp);
-	return 0;
+	return nil;
 }
 
 /*
@@ -272,7 +239,7 @@ pullupqueue(Queue *q, int n)
 Block *
 trimblock(Block *bp, int offset, int len)
 {
-	long l;
+	unsigned int l;
 	Block *nb, *startb;
 
 	QDEBUG checkb(bp, "trimblock 1");
@@ -299,7 +266,7 @@ trimblock(Block *bp, int offset, int len)
 
 	bp->wp -= (BLEN(bp) - len);
 
-	if(bp->next) {
+	if(bp->next != nil) {
 		freeblist(bp->next);
 		bp->next = nil;
 	}
@@ -317,13 +284,8 @@ copyblock(Block *bp, int count)
 	Block *nbp;
 
 	QDEBUG checkb(bp, "copyblock 0");
-	if(bp->flag & BINTR){
-		nbp = iallocb(count);
-		if(nbp == nil)
-			return nil;
-	}else
-		nbp = allocb(count);
-	for(; count > 0 && bp != 0; bp = bp->next){
+	nbp = allocb(count);
+	for(; count > 0 && bp != nil; bp = bp->next){
 		l = BLEN(bp);
 		if(l > count)
 			l = count;
@@ -421,11 +383,11 @@ qget(Queue *q)
 		iunlock(q);
 		return nil;
 	}
+	QDEBUG checkb(b, "qget");
 	q->bfirst = b->next;
-	b->next = 0;
+	b->next = nil;
 	q->len -= BALLOC(b);
 	q->dlen -= BLEN(b);
-	QDEBUG checkb(b, "qget");
 
 	/* if writer flow controlled, restart */
 	if((q->state & Qflow) && q->len < q->limit/2){
@@ -448,7 +410,7 @@ qget(Queue *q)
 int
 qdiscard(Queue *q, int len)
 {
-	Block *b;
+	Block *b, *tofree = nil;
 	int dowakeup, n, sofar;
 
 	ilock(q);
@@ -460,10 +422,12 @@ qdiscard(Queue *q, int len)
 		n = BLEN(b);
 		if(n <= len - sofar){
 			q->bfirst = b->next;
-			b->next = 0;
 			q->len -= BALLOC(b);
 			q->dlen -= BLEN(b);
-			freeb(b);
+
+			/* remember to free this */
+			b->next = tofree;
+			tofree = b;
 		} else {
 			n = len - sofar;
 			b->rp += n;
@@ -480,10 +444,8 @@ qdiscard(Queue *q, int len)
 	 *  I really don't understand it completely.  It may be
 	 *  due to the queue draining so fast that the transmission
 	 *  stalls waiting for the app to produce more data.  - presotto
-	 *
-	 *  changed back from q->len < q->limit for reno tcp. - jmk
 	 */
-	if((q->state & Qflow) && q->len < q->limit/2){
+	if((q->state & Qflow) && q->len < q->limit){
 		q->state &= ~Qflow;
 		dowakeup = 1;
 	} else
@@ -494,6 +456,9 @@ qdiscard(Queue *q, int len)
 	if(dowakeup)
 		wakeup(&q->wr);
 
+	if(tofree != nil)
+		freeblist(tofree);
+
 	return sofar;
 }
 
@@ -503,20 +468,19 @@ qdiscard(Queue *q, int len)
 int
 qconsume(Queue *q, void *vp, int len)
 {
-	Block *b;
+	Block *b, *tofree = nil;
 	int n, dowakeup;
-	uint8_t *p = vp;
-	Block *tofree = nil;
+	unsigned char *p = vp;
 
 	/* sync with qwrite */
 	ilock(q);
 
 	for(;;) {
 		b = q->bfirst;
-		if(b == 0){
+		if(b == nil){
 			q->state |= Qstarve;
-			iunlock(q);
-			return -1;
+			len = -1;
+			goto out;
 		}
 		QDEBUG checkb(b, "qconsume 1");
 
@@ -531,17 +495,16 @@ qconsume(Queue *q, void *vp, int len)
 		tofree = b;
 	};
 
+	consumecnt += n;
 	if(n < len)
 		len = n;
 	jehanne_memmove(p, b->rp, len);
-	consumecnt += n;
 	b->rp += len;
 	q->dlen -= len;
 
 	/* discard the block if we're done with it */
 	if((q->state & Qmsg) || len == n){
 		q->bfirst = b->next;
-		b->next = 0;
 		q->len -= BALLOC(b);
 		q->dlen -= BLEN(b);
 
@@ -550,6 +513,7 @@ qconsume(Queue *q, void *vp, int len)
 		tofree = b;
 	}
 
+out:
 	/* if writer flow controlled, restart */
 	if((q->state & Qflow) && q->len < q->limit/2){
 		q->state &= ~Qflow;
@@ -571,7 +535,7 @@ qconsume(Queue *q, void *vp, int len)
 int
 qpass(Queue *q, Block *b)
 {
-	int dlen, len, dowakeup;
+	int len, dowakeup;
 
 	/* sync with qread */
 	dowakeup = 0;
@@ -582,29 +546,12 @@ qpass(Queue *q, Block *b)
 		return -1;
 	}
 	if(q->state & Qclosed){
-		len = BALLOC(b);
 		iunlock(q);
 		freeblist(b);
-		return len;
+		return 0;
 	}
 
-	/* add buffer to queue */
-	if(q->bfirst)
-		q->blast->next = b;
-	else
-		q->bfirst = b;
-	len = BALLOC(b);
-	dlen = BLEN(b);
-	QDEBUG checkb(b, "qpass");
-	while(b->next){
-		b = b->next;
-		QDEBUG checkb(b, "qpass");
-		len += BALLOC(b);
-		dlen += BLEN(b);
-	}
-	q->blast = b;
-	q->len += len;
-	q->dlen += dlen;
+	len = qaddlist(q, b);
 
 	if(q->len >= q->limit/2)
 		q->state |= Qflow;
@@ -624,36 +571,19 @@ qpass(Queue *q, Block *b)
 int
 qpassnolim(Queue *q, Block *b)
 {
-	int dlen, len, dowakeup;
+	int len, dowakeup;
 
 	/* sync with qread */
 	dowakeup = 0;
 	ilock(q);
 
 	if(q->state & Qclosed){
-		len = BALLOC(b);
 		iunlock(q);
 		freeblist(b);
-		return len;
+		return 0;
 	}
 
-	/* add buffer to queue */
-	if(q->bfirst)
-		q->blast->next = b;
-	else
-		q->bfirst = b;
-	len = BALLOC(b);
-	dlen = BLEN(b);
-	QDEBUG checkb(b, "qpass");
-	while(b->next){
-		b = b->next;
-		QDEBUG checkb(b, "qpass");
-		len += BALLOC(b);
-		dlen += BLEN(b);
-	}
-	q->blast = b;
-	q->len += len;
-	q->dlen += dlen;
+	len = qaddlist(q, b);
 
 	if(q->len >= q->limit/2)
 		q->state |= Qflow;
@@ -680,8 +610,7 @@ packblock(Block *bp)
 	Block **l, *nbp;
 	int n;
 
-	for(l = &bp; *l; l = &(*l)->next){
-		nbp = *l;
+	for(l = &bp; (nbp = *l) != nil; l = &(*l)->next){
 		n = BLEN(nbp);
 		if((n<<2) < BALLOC(nbp)){
 			*l = allocb(n);
@@ -700,7 +629,11 @@ qproduce(Queue *q, void *vp, int len)
 {
 	Block *b;
 	int dowakeup;
-	uint8_t *p = vp;
+	unsigned char *p = vp;
+
+	b = iallocb(len);
+	if(b == nil)
+		return 0;
 
 	/* sync with qread */
 	dowakeup = 0;
@@ -712,25 +645,12 @@ qproduce(Queue *q, void *vp, int len)
 		iunlock(q);
 		return -1;
 	}
+	producecnt += len;
 
 	/* save in buffer */
-	b = iallocb(len);
-	if(b == 0){
-		iunlock(q);
-		return 0;
-	}
 	jehanne_memmove(b->wp, p, len);
-	producecnt += len;
 	b->wp += len;
-	if(q->bfirst)
-		q->blast->next = b;
-	else
-		q->bfirst = b;
-	q->blast = b;
-	/* b->next = 0; done by iallocb() */
-	q->len += BALLOC(b);
-	q->dlen += BLEN(b);
-	QDEBUG checkb(b, "qproduce");
+	qaddlist(q, b);
 
 	if(q->state & Qstarve){
 		q->state &= ~Qstarve;
@@ -751,51 +671,15 @@ qproduce(Queue *q, void *vp, int len)
  *  copy from offset in the queue
  */
 Block*
-qcopy(Queue *q, int len, uint32_t offset)
+qcopy(Queue *q, int len, unsigned int offset)
 {
-	int sofar;
-	int n;
-	Block *b, *nb;
-	uint8_t *p;
-
-	nb = allocb(len);
+	Block *b;
 
+	b = allocb(len);
 	ilock(q);
-
-	/* go to offset */
-	b = q->bfirst;
-	for(sofar = 0; ; sofar += n){
-		if(b == nil){
-			iunlock(q);
-			return nb;
-		}
-		n = BLEN(b);
-		if(sofar + n > offset){
-			p = b->rp + offset - sofar;
-			n -= offset - sofar;
-			break;
-		}
-		QDEBUG checkb(b, "qcopy");
-		b = b->next;
-	}
-
-	/* copy bytes from there */
-	for(sofar = 0; sofar < len;){
-		if(n > len - sofar)
-			n = len - sofar;
-		jehanne_memmove(nb->wp, p, n);
-		qcopycnt += n;
-		sofar += n;
-		nb->wp += n;
-		b = b->next;
-		if(b == nil)
-			break;
-		n = BLEN(b);
-		p = b->rp;
-	}
+	b->wp += readblist(q->bfirst, b->wp, len, offset);
 	iunlock(q);
-
-	return nb;
+	return b;
 }
 
 /*
@@ -807,8 +691,8 @@ qopen(int limit, int msg, void (*kick)(void*), void *arg)
 	Queue *q;
 
 	q = jehanne_malloc(sizeof(Queue));
-	if(q == 0)
-		return 0;
+	if(q == nil)
+		return nil;
 
 	q->limit = q->inilim = limit;
 	q->kick = kick;
@@ -829,8 +713,8 @@ qbypass(void (*bypass)(void*, Block*), void *arg)
 	Queue *q;
 
 	q = jehanne_malloc(sizeof(Queue));
-	if(q == 0)
-		return 0;
+	if(q == nil)
+		return nil;
 
 	q->limit = 0;
 	q->arg = arg;
@@ -845,7 +729,7 @@ notempty(void *a)
 {
 	Queue *q = a;
 
-	return (q->state & Qclosed) || q->bfirst != 0;
+	return (q->state & Qclosed) || q->bfirst != nil;
 }
 
 /*
@@ -877,49 +761,34 @@ qwait(Queue *q)
 }
 
 /*
- *   wait for the queue to be non-empty or closed
+ * add a block list to a queue, return bytes added
  */
-void
-qsleep(Queue *q)
-{
-	qlock(&q->rlock);
-	if(waserror()){
-		qunlock(&q->rlock);
-		nexterror();
-	}
-	ilock(q);
-	if(q->state & Qclosed){
-		iunlock(q);
-		error(q->err);
-	}
-	if(q->bfirst){
-		iunlock(q);
-		goto done;
-	}
-	q->state |= Qstarve;
-	iunlock(q);
-	sleep(&q->rr, notempty, q);
-done:
-	poperror();
-	qunlock(&q->rlock);
-}
-
-/*
- * add a block list to a queue
- */
-void
+int
 qaddlist(Queue *q, Block *b)
 {
+	int len, dlen;
+
+	QDEBUG checkb(b, "qaddlist 1");
+
 	/* queue the block */
-	if(q->bfirst)
+	if(q->bfirst != nil)
 		q->blast->next = b;
 	else
 		q->bfirst = b;
-	q->len += blockalloclen(b);
-	q->dlen += blocklen(b);
-	while(b->next)
+
+	len = BALLOC(b);
+	dlen = BLEN(b);
+	while(b->next != nil){
 		b = b->next;
+		QDEBUG checkb(b, "qaddlist 2");
+
+		len += BALLOC(b);
+		dlen += BLEN(b);
+	}
 	q->blast = b;
+	q->len += len;
+	q->dlen += dlen;
+	return dlen;
 }
 
 /*
@@ -933,74 +802,42 @@ qremove(Queue *q)
 	b = q->bfirst;
 	if(b == nil)
 		return nil;
+	QDEBUG checkb(b, "qremove");
 	q->bfirst = b->next;
 	b->next = nil;
 	q->dlen -= BLEN(b);
 	q->len -= BALLOC(b);
-	QDEBUG checkb(b, "qremove");
 	return b;
 }
 
 /*
  *  copy the contents of a string of blocks into
- *  memory.  emptied blocks are freed.  return
- *  pointer to first unconsumed block.
+ *  memory from an offset. blocklist kept unchanged.
+ *  return number of copied bytes.
  */
-Block*
-bl2mem(uint8_t *p, Block *b, int n)
+long
+readblist(Block *b, unsigned char *p, long n, unsigned int o)
 {
-	int i;
-	Block *next;
+	unsigned int m, r;
 
-	for(; b != nil; b = next){
-		i = BLEN(b);
-		if(i > n){
-			jehanne_memmove(p, b->rp, n);
-			b->rp += n;
-			return b;
+	r = 0;
+	while(n > 0 && b != nil){
+		m = BLEN(b);
+		if(o >= m)
+			o -= m;
+		else {
+			m -= o;
+			if(n < m)
+				m = n;
+			jehanne_memmove(p, b->rp + o, m);
+			p += m;
+			r += m;
+			n -= m;
+			o = 0;
 		}
-		jehanne_memmove(p, b->rp, i);
-		n -= i;
-		p += i;
-		b->rp += i;
-		next = b->next;
-		freeb(b);
+		b = b->next;
 	}
-	return nil;
-}
-
-/*
- *  copy the contents of memory into a string of blocks.
- *  return nil on error.
- */
-Block*
-mem2bl(uint8_t *p, int len)
-{
-	int n;
-	Block *b, *first, **l;
-
-	first = nil;
-	l = &first;
-	if(waserror()){
-		freeblist(first);
-		nexterror();
-	}
-	do {
-		n = len;
-		if(n > Maxatomic)
-			n = Maxatomic;
-
-		*l = b = allocb(n);
-		jehanne_setmalloctag(b->base, getcallerpc());
-		jehanne_memmove(b->wp, p, n);
-		b->wp += n;
-		p += n;
-		len -= n;
-		l = &b->next;
-	} while(len > 0);
-	poperror();
-
-	return first;
+	return r;
 }
 
 /*
@@ -1018,6 +855,35 @@ qputback(Queue *q, Block *b)
 	q->dlen += BLEN(b);
 }
 
+/*
+ *  cut off n bytes from the end of *h. return a new
+ *  block with the tail and change *h to refer to the
+ *  head.
+ */
+static Block*
+splitblock(Block **h, int n)
+{
+	Block *a, *b;
+	int m;
+
+	a = *h;
+	m = BLEN(a) - n;
+	if(m < n){
+		b = allocb(m);
+		jehanne_memmove(b->wp, a->rp, m);
+		b->wp += m;
+		a->rp += m;
+		*h = b;
+		return a;
+	} else {
+		b = allocb(n);
+		a->wp -= n;
+		jehanne_memmove(b->wp, a->wp, n);
+		b->wp += n;
+		return b;
+	}
+}
+
 /*
  *  flow control, get producer going again
  *  called with q ilocked
@@ -1037,7 +903,7 @@ qwakeup_iunlock(Queue *q)
 
 	/* wakeup flow controlled writers */
 	if(dowakeup){
-		if(q->kick)
+		if(q->kick != nil)
 			q->kick(q->arg);
 		wakeup(&q->wr);
 	}
@@ -1049,10 +915,10 @@ qwakeup_iunlock(Queue *q)
 Block*
 qbread(Queue *q, int len)
 {
-	Block *b, *nb;
+	Block *b;
 	int n;
 
-	qlock(&q->rlock);
+	eqlock(&q->rlock);
 	if(waserror()){
 		qunlock(&q->rlock);
 		nexterror();
@@ -1077,24 +943,21 @@ qbread(Queue *q, int len)
 	n = BLEN(b);
 
 	/* split block if it's too big and this is not a message queue */
-	nb = b;
 	if(n > len){
-		if((q->state&Qmsg) == 0){
-			n -= len;
-			b = allocb(n);
-			jehanne_memmove(b->wp, nb->rp+len, n);
-			b->wp += n;
-			qputback(q, b);
-		}
-		nb->wp = nb->rp + len;
+		n -= len;
+		if((q->state & Qmsg) == 0)
+			qputback(q, splitblock(&b, n));
+		else
+			b->wp -= n;
 	}
 
 	/* restart producer */
 	qwakeup_iunlock(q);
 
-	poperror();
 	qunlock(&q->rlock);
-	return nb;
+	poperror();
+
+	return b;
 }
 
 /*
@@ -1104,10 +967,10 @@ qbread(Queue *q, int len)
 long
 qread(Queue *q, void *vp, int len)
 {
-	Block *b, *first, **l;
-	int blen, n;
+	Block *b, *first, **last;
+	int m, n;
 
-	qlock(&q->rlock);
+	eqlock(&q->rlock);
 	if(waserror()){
 		qunlock(&q->rlock);
 		nexterror();
@@ -1129,57 +992,53 @@ again:
 	}
 
 	/* if we get here, there's at least one block in the queue */
+	last = &first;
 	if(q->state & Qcoalesce){
 		/* when coalescing, 0 length blocks just go away */
 		b = q->bfirst;
-		blen = BLEN(b);
-		if(blen <= 0){
+		m = BLEN(b);
+		if(m <= 0){
 			freeb(qremove(q));
 			goto again;
 		}
 
 		/*  grab the first block plus as many
-		 *  following blocks as will completely
+		 *  following blocks as will partially
 		 *  fit in the read.
 		 */
 		n = 0;
-		l = &first;
 		for(;;) {
-			*l = qremove(q);
-			l = &b->next;
-			n += blen;
-
+			*last = qremove(q);
+			n += m;
+			if(n >= len || q->bfirst == nil)
+				break;
+			last = &b->next;
 			b = q->bfirst;
-			if(b == nil)
-				break;
-			blen = BLEN(b);
-			if(n+blen > len)
-				break;
+			m = BLEN(b);
 		}
 	} else {
 		first = qremove(q);
 		n = BLEN(first);
 	}
 
-	/* copy to user space outside of the ilock */
-	iunlock(q);
-	b = bl2mem(vp, first, len);
-	ilock(q);
-
-	/* take care of any left over partial block */
-	if(b != nil){
-		n -= BLEN(b);
-		if(q->state & Qmsg)
-			freeb(b);
-		else
-			qputback(q, b);
-	}
+	/* split last block if it's too big and this is not a message queue */
+	if(n > len && (q->state & Qmsg) == 0)
+		qputback(q, splitblock(last, n - len));
 
 	/* restart producer */
 	qwakeup_iunlock(q);
 
-	poperror();
 	qunlock(&q->rlock);
+	poperror();
+
+	if(waserror()){
+		freeblist(first);
+		nexterror();
+	}
+	n = readblist(first, vp, len, 0);
+	freeblist(first);
+	poperror();
+
 	return n;
 }
 
@@ -1191,7 +1050,30 @@ qnotfull(void *a)
 	return q->len < q->limit || (q->state & Qclosed);
 }
 
-uint32_t noblockcnt;
+/*
+ *  flow control, wait for queue to get below the limit
+ */
+static void
+qflow(Queue *q)
+{
+	for(;;){
+		if(q->noblock || qnotfull(q))
+			break;
+
+		ilock(q);
+		q->state |= Qflow;
+		iunlock(q);
+
+		eqlock(&q->wlock);
+		if(waserror()){
+			qunlock(&q->wlock);
+			nexterror();
+		}
+		sleep(&q->wr, qnotfull, q);
+		qunlock(&q->wlock);
+		poperror();
+	}
+}
 
 /*
  *  add a block to a queue obeying flow control
@@ -1199,25 +1081,20 @@ uint32_t noblockcnt;
 long
 qbwrite(Queue *q, Block *b)
 {
-	int n, dowakeup;
+	int len, dowakeup;
 	Proc *p;
 
-	n = BLEN(b);
-
-	if(q->bypass){
+	if(q->bypass != nil){
+		len = blocklen(b);
 		(*q->bypass)(q->arg, b);
-		return n;
+		return len;
 	}
 
 	dowakeup = 0;
-	qlock(&q->wlock);
 	if(waserror()){
-		if(b != nil)
-			freeb(b);
-		qunlock(&q->wlock);
+		freeblist(b);
 		nexterror();
 	}
-
 	ilock(q);
 
 	/* give up if the queue is closed */
@@ -1226,29 +1103,16 @@ qbwrite(Queue *q, Block *b)
 		error(q->err);
 	}
 
-	/* if nonblocking, don't queue over the limit */
-	if(q->len >= q->limit){
-		if(q->noblock){
-			iunlock(q);
-			freeb(b);
-			noblockcnt += n;
-			qunlock(&q->wlock);
-			poperror();
-			return n;
-		}
+	/* don't queue over the limit */
+	if(q->len >= q->limit && q->noblock){
+		iunlock(q);
+		poperror();
+		len = blocklen(b);
+		freeblist(b);
+		return len;
 	}
 
-	/* queue the block */
-	if(q->bfirst)
-		q->blast->next = b;
-	else
-		q->bfirst = b;
-	q->blast = b;
-	b->next = 0;
-	q->len += BALLOC(b);
-	q->dlen += n;
-	QDEBUG checkb(b, "qbwrite");
-	b = nil;
+	len = qaddlist(q, b);
 
 	/* make sure other end gets awakened */
 	if(q->state & Qstarve){
@@ -1259,7 +1123,7 @@ qbwrite(Queue *q, Block *b)
 	poperror();
 
 	/*  get output going again */
-	if(q->kick && (dowakeup || (q->state&Qkick)))
+	if(q->kick != nil && (dowakeup || (q->state&Qkick)))
 		q->kick(q->arg);
 
 	/* wakeup anyone consuming at the other end */
@@ -1272,31 +1136,15 @@ qbwrite(Queue *q, Block *b)
 	}
 
 	/*
-	 *  flow control, wait for queue to get below the limit
-	 *  before allowing the process to continue and queue
-	 *  more.  We do this here so that postnote can only
-	 *  interrupt us after the data has been queued.  This
-	 *  means that things like 9p flushes and ssl messages
-	 *  will not be disrupted by software interrupts.
-	 *
-	 *  Note - this is moderately dangerous since a process
-	 *  that keeps getting interrupted and rewriting will
-	 *  queue infinite crud.
+	 *  flow control, before allowing the process to continue and
+	 *  queue more. We do this here so that postnote can only
+	 *  interrupt us after the data has been queued.  This means that
+	 *  things like 9p flushes and ssl messages will not be disrupted
+	 *  by software interrupts.
 	 */
-	for(;;){
-		if(q->noblock || qnotfull(q))
-			break;
+	qflow(q);
 
-		ilock(q);
-		q->state |= Qflow;
-		iunlock(q);
-		sleep(&q->wr, qnotfull, q);
-	}
-	USED(b);
-
-	qunlock(&q->wlock);
-
-	return n;
+	return len;
 }
 
 /*
@@ -1307,11 +1155,21 @@ qwrite(Queue *q, void *vp, int len)
 {
 	int n, sofar;
 	Block *b;
-	uint8_t *p = vp;
+	unsigned char *p = vp;
 
 	QDEBUG if(!islo())
 		jehanne_print("qwrite hi %#p\n", getcallerpc());
 
+	/* stop queue bloat before allocating blocks */
+	if(q->len/2 >= q->limit && q->noblock == 0 && q->bypass == nil){
+		while(waserror()){
+			if(up->procctl == Proc_exitme || up->procctl == Proc_exitbig)
+				error(Egreg);
+		}
+		qflow(q);
+		poperror();
+	}
+
 	sofar = 0;
 	do {
 		n = len-sofar;
@@ -1319,7 +1177,6 @@ qwrite(Queue *q, void *vp, int len)
 			n = Maxatomic;
 
 		b = allocb(n);
-		jehanne_setmalloctag(b->base, getcallerpc());
 		if(waserror()){
 			freeb(b);
 			nexterror();
@@ -1328,9 +1185,7 @@ qwrite(Queue *q, void *vp, int len)
 		poperror();
 		b->wp += n;
 
-		qbwrite(q, b);
-
-		sofar += n;
+		sofar += qbwrite(q, b);
 	} while(sofar < len && (q->state & Qmsg) == 0);
 
 	return len;
@@ -1339,16 +1194,13 @@ qwrite(Queue *q, void *vp, int len)
 /*
  *  used by jehanne_print() to write to a queue.  Since we may be splhi or not in
  *  a process, don't qlock.
- *
- *  this routine merges adjacent blocks if block n+1 will fit into
- *  the free space of block n.
  */
 int
 qiwrite(Queue *q, void *vp, int len)
 {
 	int n, sofar, dowakeup;
 	Block *b;
-	uint8_t *p = vp;
+	unsigned char *p = vp;
 
 	dowakeup = 0;
 
@@ -1369,20 +1221,13 @@ qiwrite(Queue *q, void *vp, int len)
 		/* we use an artificially high limit for kernel prints since anything
 		 * over the limit gets dropped
 		 */
-		if(q->dlen >= 16*1024){
+		if((q->state & Qclosed) != 0 || q->len/2 >= q->limit){
 			iunlock(q);
 			freeb(b);
 			break;
 		}
 
-		QDEBUG checkb(b, "qiwrite");
-		if(q->bfirst)
-			q->blast->next = b;
-		else
-			q->bfirst = b;
-		q->blast = b;
-		q->len += BALLOC(b);
-		q->dlen += n;
+		qaddlist(q, b);
 
 		if(q->state & Qstarve){
 			q->state &= ~Qstarve;
@@ -1392,7 +1237,7 @@ qiwrite(Queue *q, void *vp, int len)
 		iunlock(q);
 
 		if(dowakeup){
-			if(q->kick)
+			if(q->kick != nil)
 				q->kick(q->arg);
 			wakeup(&q->rr);
 		}
@@ -1430,9 +1275,9 @@ qclose(Queue *q)
 	ilock(q);
 	q->state |= Qclosed;
 	q->state &= ~(Qflow|Qstarve);
-	jehanne_strcpy(q->err, Ehungup);
+	kstrcpy(q->err, Ehungup, ERRMAX);
 	bfirst = q->bfirst;
-	q->bfirst = 0;
+	q->bfirst = nil;
 	q->len = 0;
 	q->dlen = 0;
 	q->noblock = 0;
@@ -1456,10 +1301,9 @@ qhangup(Queue *q, char *msg)
 	/* mark it */
 	ilock(q);
 	q->state |= Qclosed;
-	if(msg == 0 || *msg == 0)
-		jehanne_strcpy(q->err, Ehungup);
-	else
-		jehanne_strncpy(q->err, msg, ERRMAX-1);
+	if(msg == nil || *msg == '\0')
+		msg = Ehungup;
+	kstrcpy(q->err, msg, ERRMAX);
 	iunlock(q);
 
 	/* wake up readers/writers */
@@ -1519,7 +1363,7 @@ qwindow(Queue *q)
 int
 qcanread(Queue *q)
 {
-	return q->bfirst!=0;
+	return q->bfirst != nil;
 }
 
 /*
@@ -1551,7 +1395,7 @@ qflush(Queue *q)
 	/* mark it */
 	ilock(q);
 	bfirst = q->bfirst;
-	q->bfirst = 0;
+	q->bfirst = nil;
 	q->len = 0;
 	q->dlen = 0;
 	iunlock(q);
@@ -1559,7 +1403,7 @@ qflush(Queue *q)
 	/* free queued blocks */
 	freeblist(bfirst);
 
-	/* wake up readers/writers */
+	/* wake up writers */
 	wakeup(&q->wr);
 }
 
@@ -1574,32 +1418,3 @@ qstate(Queue *q)
 {
 	return q->state;
 }
-
-/*
- * set a bypass function after a queue has been created
- */
-void
-qsetbypass(Queue *q, void (*bypass)(void*, Block*), void *arg)
-{
-	ilock(q);
-	q->bypass = bypass;
-	q->arg = arg;
-	q->limit = 0;
-	iunlock(q);
-
-	qflush(q);
-}
-
-int
-qblen(Queue *q)
-{
-	int n;
-	Block *b;
-
-	n = 0;
-	ilock(q);
-	for(b = q->bfirst; b != nil; b = b->next)
-		n++;
-	iunlock(q);
-	return n;
-}
diff --git a/sys/src/kern/port/qlock.c b/sys/src/kern/port/qlock.c
index c56e2c5..bd4ccae 100644
--- a/sys/src/kern/port/qlock.c
+++ b/sys/src/kern/port/qlock.c
@@ -1,27 +1,10 @@
-/*
- * This file is part of Jehanne.
- *
- * Copyright (C) 2015-2016 Giacomo Tesio <giacomo@tesio.it>
- *
- * Jehanne is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, version 2 of the License.
- *
- * Jehanne is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with Jehanne.  If not, see <http://www.gnu.org/licenses/>.
- */
 #include "u.h"
 #include "../port/lib.h"
 #include "mem.h"
 #include "dat.h"
 #include "fns.h"
 
-#include <ptrace.h>
+#include	"../port/error.h"
 
 struct {
 	uint32_t rlock;
@@ -33,21 +16,70 @@ struct {
 } rwstats;
 
 void
-qlock(QLock *q)
+eqlock(QLock *q)
 {
 	Proc *p;
-	void (*pt)(Proc*, int, int64_t, int64_t);
 
 	if(m->ilockdepth != 0)
-		jehanne_print("qlock: %#p: ilockdepth %d", getcallerpc(), m->ilockdepth);
+		print("eqlock: %#p: ilockdepth %d\n", getcallerpc(), m->ilockdepth);
 	if(up != nil && up->nlocks)
-		jehanne_print("qlock: %#p: nlocks %d", getcallerpc(), up->nlocks);
+		print("eqlock: %#p: nlocks %d\n", getcallerpc(), up->nlocks);
+	if(up != nil && up->eql != nil)
+		print("eqlock: %#p: eql %p\n", getcallerpc(), up->eql);
+	if(q->use.key == 0x55555555)
+		panic("eqlock: q %#p, key 5*", q);
 
 	lock(&q->use);
 	rwstats.qlock++;
 	if(!q->locked) {
 		q->locked = 1;
-		q->qpc = getcallerpc();
+		unlock(&q->use);
+		return;
+	}
+	if(up == nil)
+		panic("eqlock");
+	if(up->notepending){
+		up->notepending = 0;
+		unlock(&q->use);
+		interrupted();
+	}
+	rwstats.qlockq++;
+	p = q->tail;
+	if(p == nil)
+		q->head = up;
+	else
+		p->qnext = up;
+	q->tail = up;
+	up->eql = q;
+	up->qnext = nil;
+	up->qpc = getcallerpc();
+	up->state = Queueing;
+	unlock(&q->use);
+	sched();
+	if(up->eql == nil){
+		up->notepending = 0;
+		interrupted();
+	}
+	up->eql = nil;
+}
+
+void
+qlock(QLock *q)
+{
+	Proc *p;
+
+	if(m->ilockdepth != 0)
+		print("qlock: %#p: ilockdepth %d\n", getcallerpc(), m->ilockdepth);
+	if(up != nil && up->nlocks)
+		print("qlock: %#p: nlocks %d\n", getcallerpc(), up->nlocks);
+	if(up != nil && up->eql != nil)
+		print("qlock: %#p: eql %p\n", getcallerpc(), up->eql);
+	if(q->use.key == 0x55555555)
+		panic("qlock: q %#p, key 5*", q);
+	lock(&q->use);
+	rwstats.qlock++;
+	if(!q->locked) {
+		q->locked = 1;
 		unlock(&q->use);
 		return;
 	}
@@ -55,16 +87,15 @@ qlock(QLock *q)
 		panic("qlock");
 	rwstats.qlockq++;
 	p = q->tail;
-	if(p == 0)
+	if(p == nil)
 		q->head = up;
 	else
 		p->qnext = up;
 	q->tail = up;
-	up->qnext = 0;
+	up->eql = nil;
+	up->qnext = nil;
 	up->state = Queueing;
 	up->qpc = getcallerpc();
-	if(up->trace && (pt = proctrace) != nil)
-		pt(up, SSleep, 0, Queueing | (up->qpc<<8));
 	unlock(&q->use);
 	sched();
 }
@@ -79,9 +110,7 @@ canqlock(QLock *q)
 		return 0;
 	}
 	q->locked = 1;
-	q->qpc = getcallerpc();
 	unlock(&q->use);
-
 	return 1;
 }
 
@@ -92,65 +121,25 @@ qunlock(QLock *q)
 
 	lock(&q->use);
 	if (q->locked == 0)
-		jehanne_print("qunlock called with qlock not held, from %#p\n",
+		print("qunlock called with qlock not held, from %#p\n",
 			getcallerpc());
 	p = q->head;
-	if(p){
+	if(p != nil){
 		q->head = p->qnext;
-		if(q->head == 0)
-			q->tail = 0;
+		if(q->head == nil)
+			q->tail = nil;
 		unlock(&q->use);
 		ready(p);
 		return;
 	}
 	q->locked = 0;
-	q->qpc = 0;
 	unlock(&q->use);
 }
 
-void
-priqlock(QLock *q)
-{
-	Proc *p;
-	void (*pt)(Proc*, int, int64_t, int64_t);
-
-	if(m->ilockdepth != 0)
-		jehanne_print("priqlock: %#p: ilockdepth %d\n", getcallerpc(), m->ilockdepth);
-	if(up != nil && up->nlocks)
-		jehanne_print("priqlock: %#p: nlocks %d\n", getcallerpc(), up->nlocks);
-
-	lock(&q->use);
-	if(!q->locked) {
-		//q->p = up;
-		q->locked = 1;
-		q->qpc = getcallerpc();
-		unlock(&q->use);
-		return;
-	}
-	if(up == nil)
-		panic("priqlock");
-//	if(q->p == up)
-//		panic("qlock deadlock. pid=%ld cpc=%lux qpc=%lux\n", up->pid, getcallerpc(), up->qpc);
-	p = up->qnext = q->head;
-	if(p == nil)
-		q->tail = up;
-	q->head = up;
-	up->state = Queueing;
-	up->qpc = getcallerpc();
-	if(up->trace && (pt = proctrace) != nil)
-		pt(up, SSleep, 0, Queueing | (up->qpc<<8));
-//	if(kproflock)
-//		kproflock(up->qpc);
-	unlock(&q->use);
-	sched();
-}
-
 void
 rlock(RWlock *q)
 {
 	Proc *p;
-	void (*pt)(Proc*, int, int64_t, int64_t);
-	uintptr_t pc;
 
 	lock(&q->use);
 	rwstats.rlock++;
@@ -165,17 +154,13 @@ rlock(RWlock *q)
 	p = q->tail;
 	if(up == nil)
 		panic("rlock");
-	if(p == 0)
+	if(p == nil)
 		q->head = up;
 	else
 		p->qnext = up;
 	q->tail = up;
-	up->qnext = 0;
+	up->qnext = nil;
 	up->state = QueueingR;
-	if(up->trace && (pt = proctrace) != nil){
-		pc = getcallerpc();
-		pt(up, SSleep, 0, QueueingR | (pc<<8));
-	}
 	unlock(&q->use);
 	sched();
 }
@@ -196,8 +181,8 @@ runlock(RWlock *q)
 	if(p->state != QueueingW)
 		panic("runlock");
 	q->head = p->qnext;
-	if(q->head == 0)
-		q->tail = 0;
+	if(q->head == nil)
+		q->tail = nil;
 	q->writer = 1;
 	unlock(&q->use);
 	ready(p);
@@ -207,8 +192,6 @@ void
 wlock(RWlock *q)
 {
 	Proc *p;
-	uintptr_t pc;
-	void (*pt)(Proc*, int, int64_t, int64_t);
 
 	lock(&q->use);
 	rwstats.wlock++;
@@ -231,12 +214,8 @@ wlock(RWlock *q)
 	else
 		p->qnext = up;
 	q->tail = up;
-	up->qnext = 0;
+	up->qnext = nil;
 	up->state = QueueingW;
-	if(up->trace && (pt = proctrace) != nil){
-		pc = getcallerpc();
-		pt(up, SSleep, 0, QueueingW|(pc<<8));
-	}
 	unlock(&q->use);
 	sched();
 }
diff --git a/sys/src/kern/port/qmalloc.c b/sys/src/kern/port/qmalloc.c
deleted file mode 100644
index b5539fa..0000000
--- a/sys/src/kern/port/qmalloc.c
+++ /dev/null
@@ -1,1140 +0,0 @@
-/*
- * malloc
- *
- *	C B Weinstock and W A Wulf, "Quick Fit: An Efficient Storage Algorithm for Heap Storage Allocation",
- *		SIGPLAN Notices, 23(10), 144-148 (1988).
- *	A Iyengar, "Scalability of Dynamic Storage Allocation Algorithms", IEEE Proceedings Frontiers of
- *		Massively Parallel Computing, 223-232 (1996).
- *	Yi Feng and Emery D Berger, "A Locality-Improving Dynamic Memory Allocator",
- *		ACM Proceedings of the 2005 workshop on Memory system performance, 68-77 (2005).
- */
-#include "u.h"
-#include "../port/lib.h"
-#include "mem.h"
-#include "dat.h"
-#include "fns.h"
-
-typedef union Header Header;
-typedef struct Qlist Qlist;
-typedef struct Region Region;
-typedef struct BigAlloc BigAlloc;
-
-enum{
-	Bpw=	8*sizeof(uint32_t),
-	Busy= 	(uint32_t)1<<(Bpw-1),		/* set in Header.s.size of allocated blocks */
-	Poisoning=	1,	/* or DBGFLG */	/* DEBUG: poison block */
-};
-
-/*
- * Memory is allocated in units of Header,
- * which also provides the basic alignment.
- * Every usable block is at least 2 units: the header
- * and at least one unit of data. The block heading
- * the misc list has size 0 and will never be allocated.
- *
- * Yi Feng and Berger eliminate the object headers for
- * quick fit items, since they are never coalesced,
- * but we retain headers to track ownership.
- */
-union Header
-{
-	struct {
-		uint32_t	size;		/* size in units including Header, and Busy flag */
-		uint32_t	tag;		/* only for debugging: set malloctag */
-		Header*	next;		/* free list */
-	} s;
-	uint8_t	_align[8];
-};
-
-enum{
-	Unitsz=	sizeof(Header),		/* must be sizeof(Header) */
-	MinUnits=	2,
-	Align=	Unitsz,		/* minimum alignment */
-};
-
-/* application pointers to and from headers */
-#define	D2H(p)	((Header*)(p)-1)
-#define	H2D(h)	((void*)((h)+1))
-
-#define	XX(P,N)	iprint("[%d]: %#p -> %#p\n", (N), (P), (P)->s.next)
-#undef XX
-#define	XX(P,N)
-
-struct Qlist
-{
-	Header*	first;
-
-	uint32_t	nalloc;
-};
-
-struct Region
-{
-	Region*	down;	/* run as a stack */
-	Header*	start;
-	Header*	tail;	/* next available, if any */
-	Header*	end;
-	uint32_t	size;		/* remaining space, in Unitsz */
-	char*	base;
-	char*	limit;
-};
-
-/*
- * big mallocs out of basealloc
- */
-enum
-{
-	BHashSize=	67,	/* prime */
-	NBig=	512,
-	BigThreshold=	8*1024*1024,
-};
-
-struct BigAlloc
-{
-	uintptr_t	va;
-	uintptr_t	nbytes;
-	uintptr_t	tag;
-	BigAlloc*	next;
-};
-
-static struct {
-	Lock;
-	BigAlloc*	free;
-	BigAlloc	pool[NBig];	/* could qalloc them */
-
-	BigAlloc*	set[BHashSize];
-} bighash;
-
-#define	BIGHASH(p)		((uintptr_t)p%BHashSize)
-#define	isbigalloc(p)	((uintptr_t)(p)>=KSEG2 && (uintptr_t)(p)<KSEG1)
-
-/* TO DO: fewer buckets for larger blocks */
-#define	NUNITS(n)	(HOWMANY(n, Unitsz) + 1)
-#define	NQUICK		((4096/Unitsz)+1)
-
-static	Qlist	quicklist[NQUICK+1];
-static	Header	misclist;
-static	Header	*rover;	/* through misc list over all Regions */
-static	Region	*tail;		/* current tail Region */
-static	int	morecore(unsigned);
-//static	void	coalesce(Region*);	// not used
-static	void	freemisc(Header*);
-static	BigAlloc*	bigfind(void*);
-static	void	bignote(void*, usize, uintptr_t);
-static	void*	bigalloc(usize, usize, uintptr_t);
-static	void	bigfree(void*);
-
-static void	(*memprof)(void*, uint32_t, usize, int) = nil;
-
-enum
-{
-	QSmalign = 0,
-	QSmalignquick,
-	QSmalignrover,
-	QSmalignfront,
-	QSmalignback,
-	QSmaligntail,
-	QSmalignnottail,
-	QSmalloc,
-	QSmallocrover,
-	QSmalloctail,
-	QSfree,
-	QSfreetail,
-	QSfreequick,
-	QSfreenext,
-	QSfreeprev,
-	QSsplitquick,
-	QSsplitmisc,
-	QSmax
-};
-
-static	char*	qstatname[QSmax] = {
-[QSmalign]		"malign",
-[QSmalignquick]	"malignquick",
-[QSmalignrover]	"malignrover",
-[QSmalignfront]	"malignfront",
-[QSmalignback]	"malignback",
-[QSmaligntail]	"maligntail",
-[QSmalignnottail]	"malignnottail",
-[QSmalloc]		"malloc",
-[QSmallocrover]	"mallocrover",
-[QSmalloctail]	"malloctail",
-[QSfree]		"free",
-[QSfreetail]	"freetail",
-[QSfreequick]	"freequick",
-[QSfreenext]	"freenext",
-[QSfreeprev]	"freeprev",
-[QSsplitquick]	"split quick",
-[QSsplitmisc]	"split misc",
-};
-
-static	void*	qalloc(usize, uintptr_t);
-//static	void	qfreeinternal(Header*); // not defined
-static	int	qstats[QSmax];
-
-static	void*	bigalloc(usize, usize, uintptr_t);
-static	void	bigfree(void*);
-
-static	Lock		mainlock;
-
-/* misc lock (TO DO: per misclist, and Region/Reap) */
-#define	MLOCK		ilock(&mainlock)
-#define	MUNLOCK	iunlock(&mainlock)
-
-#define ISPOWEROF2(x)	(/*((x) != 0) && */!((x) & ((x)-1)))
-#define ALIGNHDR(h, a)	(Header*)((((uintptr_t)(h))+((a)-1)) & ~((a)-1))
-
-static Header*
-tailalloc(Region *r, int n)
-{
-	Header *p;
-
-	qstats[QSmalloctail]++;
-	p = r->tail;
-	if(n == 0)
-		panic("tailalloc size");
-	if(r->size < n)
-		panic("tailalloc");
-	r->size -= n;
-	r->tail += n;
-	p->s.size = Busy | n;
-	return p;
-}
-
-static int
-freetail(Header *h)
-{
-	if(h+h->s.size == tail->tail) {	/* worthwhile locking? */
-		if(h+h->s.size == tail->tail){
-			/* block before tail */
-			tail->tail = h;
-			tail->size += h->s.size;
-			qstats[QSfreetail]++;
-			return 1;
-		}
-	}
-	return 0;
-}
-
-static void
-freequick(Header *t)
-{
-	Qlist *ql;
-
-	ql = &quicklist[t->s.size];
-	t->s.next = ql->first;
-	ql->first = t;
-	qstats[QSfreequick]++;
-}
-
-int
-malloclocked(void)
-{
-	if(canlock(&mainlock)){
-		unlock(&mainlock);
-		return 0;
-	}
-	return 1;
-}
-
-static void
-showchain(Header *p)
-{
-	Header *q;
-
-	iprint("chain %#p:\n", p);
-	q = p;
-	do{
-		iprint("%#p [%#ux %#ux] -> %#p\n", q, q->s.size, q->s.tag, q->s.next);
-	}while((q = q->s.next) != nil && q->s.next != p);
-}
-
-static void
-badchain(char *tag, char *why, Header *p, Header *q, Header *r, void *h, Header *split)
-{
-	if(0)showchain(&misclist);
-	if(split != nil)
-		panic("badchain %s: %s: %#p %#ux %#ux -> %#p %#ux %#ux [%#p -| %#p]%s %#p %#ux %#ux\n", tag, why,
-			q, q->s.size, q->s.tag,
-			r, r->s.size, r->s.tag,
-			p, h, " split", split, split->s.size, split->s.tag);
-	else
-		panic("badchain %s: %s: %#p %#ux %#ux -> %#p %#ux %#ux [%#p -| %#p]\n", tag, why,
-			q, q->s.size, q->s.tag,
-			r, r->s.size, r->s.tag,
-			p, h);
-}
-
-static Header*
-contained(Header *b, Header *chain)
-{
-	Header *q;
-	int i;
-
-	i = 0;
-	q = chain;
-	do{
-		if(q->s.next == nil)
-			panic("nil contained");
-		if(q->s.next == b)
-			return q;
-	}while((q = q->s.next) != chain && ++i < 100000);
-	if(i >= 100000)
-		jehanne_print("long check chain\n");
-	return 0;
-}
-
-static void
-checkchain(Header *p, char *tag, void *h, Header *split)
-{
-	Header *q, *r;
-	int i;
-
-	q = p;
-	i = 0;
-	do{
-		if(q->s.next == nil)
-			badchain(tag, "nil next", p, q, q, h, split);
-		if((r = q->s.next)->s.size & Busy)
-			badchain(tag, "busy", p, q, r, h, split);
-		if(split && r == h)
-			badchain(tag, "mentioned", p, q, r, h, split);
-	}while((q = q->s.next) != p && ++i < 100000);
-	if(i >= 100000)
-		jehanne_print("long chain\n");
-}
-
-static void*
-qallocalign(usize nbytes, uintptr_t align, long offset, usize span, uintptr_t pc)
-{
-	Qlist *qlist;
-	uintptr_t aligned;
-	Header **pp, *p, *q, *r;
-	uint32_t n, nunits, alunits, maxunits, gap;
-
-	if(nbytes == 0 || offset != 0 || span != 0)
-		return nil;
-
-	if(!ISPOWEROF2(align))
-		panic("qallocalign");
-
-	if(align <= Align)
-		return qalloc(nbytes, pc);
-
-	qstats[QSmalign]++;
-	nunits = NUNITS(nbytes);
-	if(nunits <= NQUICK){
-		/*
-		 * Look for a conveniently aligned block
-		 * on one of the quicklists.
-		 */
-		MLOCK;
-		qlist = &quicklist[nunits];
-		for(pp = &qlist->first; (p = *pp) != nil; pp = &p->s.next){
-			if(ALIGNED(p+1, align)){
-				*pp = p->s.next;
-				p->s.size |= Busy;
-				MUNLOCK;
-				p->s.tag = pc;
-				qstats[QSmalignquick]++;
-				return H2D(p);
-			}
-		}
-		MUNLOCK;
-	}
-
-	alunits = HOWMANY(align, Unitsz);
-	maxunits = nunits + alunits + MinUnits;
-	MLOCK;
-	if(maxunits > tail->size) {
-		/* hard way */
-		q = rover;
-		do {
-			p = q->s.next;
-			aligned = ALIGNED(p+1, align);
-			if(aligned && p->s.size >= nunits || p->s.size >= maxunits){
-
-				/*
-				 * This block is big enough
-				 */
-				qstats[QSmalignrover]++;
-
-				/*
-				 * Leave behind any runt in front of the alignment;
-				 * it will be coalesced if the aligned memory is released.
-				 */
-				if(!aligned){
-					r = p;
-					p = ALIGNHDR(p+1, align) - 1;
-					if(!ALIGNED(p+1, align))
-						panic("qmallocalign");
-					n = p - r;
-					p->s.size = r->s.size - n;
-					if(r->s.size <= 1 || n <= 1)
-						panic("qallocalign size");
-					p->s.size = n;
-					p->s.next = r->s.next;
-					q = r;
-					qstats[QSmalignfront]++;
-				}
-
-				q->s.next = p->s.next;
-				XX(q,1);
-				rover = q;
-
-				/*
-				 * Leave behind any residue after the aligned block.
-				 */
-				if(p->s.size > nunits+MinUnits){
-					r = p + nunits;
-					r->s.size = p->s.size - nunits;
-					r->s.next = q->s.next;
-					q->s.next = r;
-					XX(q,2);
-					qstats[QSmalignback]++;
-					p->s.size = nunits;
-				}
-
-				p->s.size |= Busy;
-				p->s.next = nil;
-				MUNLOCK;
-
-				p->s.tag = pc;
-				return H2D(p);
-			}
-		} while((q = p) != rover);
-
-		/* grow tail */
-		if(!morecore(maxunits+MinUnits)){
-			MUNLOCK;
-			return nil;
-		}
-	}
-
-	q = tail->tail + 1;
-	p = ALIGNHDR(q, align);
-	gap = p - q;
-	if(gap == 0){
-		p = tailalloc(tail, nunits);
-		if(!ALIGNED(p+1, align))
-			panic("qmallocalign 2");
-		qstats[QSmaligntail]++;
-	}else{
-		if(gap < MinUnits)
-			gap += alunits;
-		if(tail->size < nunits+gap)
-			panic("qallocalign: miscalculation tail=%ud maxunits=%ud nunits=%ud gap=%ud", tail->size, maxunits, nunits, gap);
-		/*
-		 * Save the residue before the aligned allocation
-		 * and free it after the tail pointer has been bumped
-		 * for the main allocation.
-		 */
-		r = tailalloc(tail, gap);
-		p = tailalloc(tail, nunits);
-		if(!ALIGNED(p+1, align))
-			panic("qmallocalign 3");
-		qstats[QSmalignnottail]++;
-		freemisc(r);	/* put on misc list to allow combining if this block is freed */
-	}
-	p->s.next = nil;
-	MUNLOCK;
-
-	p->s.tag = pc;
-	return H2D(p);
-}
-
-static void*
-qalloc(usize nbytes, uintptr_t pc)
-{
-	Qlist *qlist;
-	Header *p, *q, *t;
-	uint32_t nunits, u;
-	int split;
-
-	if(nbytes == 0)
-		return nil;
-
-	split = 0;
-	nunits = NUNITS(nbytes);
-	for(u = nunits; u <= NQUICK; u++){
-		MLOCK;
-		qlist = &quicklist[u];
-		if((p = qlist->first) != nil){
-			qlist->first = p->s.next;
-			qlist->nalloc++;
-			if(p->s.size >= nunits+2*MinUnits){	/* don't make blocks pointlessly small */
-				t = p;
-				t->s.size -= nunits;
-				p += t->s.size;
-				p->s.size = nunits;
-				freequick(t);
-				split = 1;
-			}
-			p->s.next = nil;
-			p->s.size |= Busy;
-			MUNLOCK;
-			p->s.tag = pc;
-			if(split)
-				qstats[QSsplitquick]++;
-			return H2D(p);
-		}
-		MUNLOCK;
-	}
-
-	MLOCK;
-	if(nunits > tail->size) {
-		/* hard way */
-		q = rover;
-		checkchain(q, "qalloc-1", rover, 0);
-		do {
-			p = q->s.next;
-			if(p->s.size & Busy)
-				panic("qalloc: busy: %#p %#ux ~ %#ux\n", p, p->s.size, p->s.tag);
-			if(p->s.next->s.size & Busy)
-				panic("qalloc+: busy");
-			if(p->s.next->s.next->s.size & Busy)
-				panic("qalloc++: busy");
-			if(p->s.size >= nunits) {
-				if(p->s.size > nunits+MinUnits) {	/* split block; return tail */
-					p->s.size -= nunits;
-					p += p->s.size;
-					p->s.size = nunits;
-					split = 1;
-					if(contained(p, rover))
-						badchain("qalloc-3", "contained", rover, q, q->s.next, p, q->s.next);
-					qstats[QSsplitmisc]++;
-				}else{
-					q->s.next = p->s.next;
-					XX(q,3);
-				}
-				rover = q;
-				qstats[QSmallocrover]++;
-				if(contained(p, rover))
-					badchain("qalloc-4", "contained", rover, q, p, p, nil);
-				checkchain(q, "qalloc-2", p, split? q->s.next: nil);
-				p->s.size |= Busy;
-				MUNLOCK;
-				p->s.tag = pc;
-				return H2D(p);
-			}
-		} while((q = p) != rover);
-
-		/* grow tail */
-		if(!morecore(nunits)){
-			MUNLOCK;
-			return nil;
-		}
-	}
-	p = tailalloc(tail, nunits);
-	MUNLOCK;
-	p->s.tag = pc;
-	return H2D(p);
-}
-
-static void
-freemisc(Header *p)
-{
-	Header *q, *x;
-
-	p->s.size &= ~Busy;
-	q = rover;
-	checkchain(q, "qfree-1", p, 0);
-	for(; !(p > q && p < q->s.next); q = q->s.next)
-		if(q >= q->s.next && (p > q || p < q->s.next)){	/* put freed block at start or end of arena */
-			iprint("q==%#p %#ux %#p p==%#p %#ux\n", q, q->s.size, q->s.next, p, p->s.size);
-			break;
-		}
-	if((x = contained(p, &misclist)) != nil)
-		badchain("qfree-1a", "contained", x, q, p, p, nil);
-	if(p+p->s.size == q->s.next) {
-		p->s.size += q->s.next->s.size;
-		p->s.next = q->s.next->s.next;
-		XX(p,4);
-		qstats[QSfreenext]++;
-	}else{
-		p->s.next = q->s.next;
-		XX(p,5);
-	}
-	if(q+q->s.size == p) {
-		q->s.size += p->s.size;
-		q->s.next = p->s.next;
-		XX(q,6);
-		qstats[QSfreeprev]++;
-		if(contained(p, &misclist))
-			badchain("qfree-1b", "contained", rover, q, p, p, nil);
-	}else{
-		q->s.next = p;
-		XX(q,7);
-	}
-	checkchain(q, "qfree-2", p, 0);
-	rover = q;
-}
-
-uint32_t
-jehanne_msize(void* ap)
-{
-	BigAlloc *b;
-	Header *h;
-	uint32_t nunits;
-
-	if(ap == nil)
-		return 0;
-
-	if(isbigalloc(ap)){
-		b = bigfind(ap);
-		if(b != nil)
-			return b->nbytes;
-	}
-	h = D2H(ap);
-	nunits = h->s.size & ~Busy;
-	if((h->s.size & Busy) == 0 || nunits == 0)
-		panic("msize: corrupt allocation arena");
-
-	return (nunits - 1) * Unitsz;
-}
-
-static void
-mallocreadfmt(char* s, char* e)
-{
-	char *p;
-	Header *q;
-	int i, n;
-	Qlist *qlist;
-	Region *r;
-	uintmem t, u;
-
-	p = s;
-	MLOCK;
-	t = 0;
-	n = 0;
-	u = 0;
-	for(r = tail; r != nil; r = r->down){
-		p = jehanne_seprint(p, e, "reg%d: %#p %#p %#p : %#p %#p\n", n, r, r->base, r->limit, r->start, r->tail);
-		t += r->limit - r->base;
-		u += (r->tail - r->start)*Unitsz;
-		n++;
-	}
-	MUNLOCK;
-	p = jehanne_seprint(p, e, "%P kernel malloc %P used %d regions\n", t, u, n);
-	p = jehanne_seprint(p, e, "0/0 kernel draw\n"); // keep scripts happy
-
-	t = 0;
-	for(i = 0; i <= NQUICK; i++) {
-		n = 0;
-		MLOCK;
-		qlist = &quicklist[i];
-		for(q = qlist->first; q != nil; q = q->s.next)
-			n++;
-		MUNLOCK;
-
-		if(n != 0)
-			p = jehanne_seprint(p, e, "q%d %ud %ud %ud\n", i, n, n*i*Unitsz, qlist->nalloc);
-		t += n * i*Unitsz;
-	}
-	p = jehanne_seprint(p, e, "quick: %P bytes total\n", t);
-
-	MLOCK;
-	if((q = rover) != nil){
-		i = t = 0;
-		do {
-			t += q->s.size;
-			i++;
-//			p = jehanne_seprint(p, e, "m%d\t%#p\n", q->s.size, q);
-		} while((q = q->s.next) != rover);
-
-		p = jehanne_seprint(p, e, "rover: %d blocks %P bytes total\n",
-			i, t*Unitsz);
-	}
-	MUNLOCK;
-
-	for(i = 0; i < nelem(qstats); i++)
-		if(qstats[i] != 0)
-			p = jehanne_seprint(p, e, "%s: %ud\n", qstatname[i], qstats[i]);
-	USED(p);
-}
-
-long
-mallocreadsummary(Chan* _1, void *a, long n, long offset)
-{
-	char *alloc;
-
-	alloc = jehanne_malloc(READSTR);
-	if(waserror()){
-		jehanne_free(alloc);
-		nexterror();
-	}
-	mallocreadfmt(alloc, alloc+READSTR);
-	n = readstr(offset, a, n, alloc);
-	poperror();
-	jehanne_free(alloc);
-
-	return n;
-}
-
-#if 0
-static void
-coalesce(Region *r)
-{
-	Header *p, *q;
-
-	ilock(&r->lk);
-	/* TO DO: need to re-establish the local free list */
-	for(p = r->start; p != r->tail;){
-		if((p->s.size & Busy) == 0){
-			if((q = p->s.next) != nil && (q->s.size & Busy) == 0)
-				p->s.size += q->s.size;
-		}else
-			p += p->s.size & ~Busy;
-	}
-	iunlock(&r->lk);
-}
-#endif
-
-/*
- * big allocations use basealloc
- */
-static BigAlloc*
-bigfind(void *p)
-{
-	BigAlloc *b, **l;
-
-	/* quick check without lock is fine: p can't be added meanwhile */
-	l = &bighash.set[BIGHASH(p)];
-	if(*l == nil)
-		return nil;
-	ilock(&bighash);
-	for(; (b = *l) != nil; l = &b->next)
-		if(b->va == (uintptr_t)p)
-			break;
-	iunlock(&bighash);
-	return b;
-}
-
-static void
-bignote(void *p, usize nbytes, uintptr_t pc)
-{
-	BigAlloc *b, **l;
-
-	ilock(&bighash);
-	b = bighash.free;
-	if(b == nil)
-		panic("bigstore: no free structures");
-	bighash.free = b->next;
-	b->va = (uintptr_t)p;
-	b->nbytes = nbytes;
-	b->tag = pc;
-	l = &bighash.set[BIGHASH(p)];
-	b->next = *l;
-	*l = b;
-	iunlock(&bighash);
-}
-
-static void*
-bigalloc(usize nbytes, usize align, uintptr_t pc)
-{
-	void *p;
-
-	p = basealloc(nbytes, align, &nbytes);
-	if(p == nil)
-		return p;
-	bignote(p, nbytes, pc);
-	return p;
-}
-
-static void
-bigfree(void *p)
-{
-	BigAlloc **l, *b;
-	uintmem used;
-
-	if(p == nil)
-		return;
-	ilock(&bighash);
-	l = &bighash.set[BIGHASH(p)];
-	for(; (b = *l) != nil; l = &b->next)
-		if(b->va == (uintptr_t)p){
-			used = b->nbytes;
-			*l = b->next;
-			b->next = bighash.free;
-			bighash.free = b;
-			iunlock(&bighash);
-			basefree(p, used);
-			return;
-		}
-	iunlock(&bighash);
-	panic("bigfree");
-}
-
-typedef struct Rov Rov;
-struct Rov{
-	uint32_t	tag;
-	uint32_t	size;
-};
-static Rov rovers[2048];
-
-void
-mallocsummary(void)
-{
-	Header *q;
-	int i, n, t;
-	Qlist *qlist;
-
-	t = 0;
-	for(i = 0; i <= NQUICK; i++) {
-		n = 0;
-		MLOCK;
-		qlist = &quicklist[i];
-		for(q = qlist->first; q != nil; q = q->s.next){
-			if(q->s.size != i)
-				DBG("q%d\t%#p\t%ud\n", i, q, q->s.size);
-			n++;
-		}
-		MUNLOCK;
-
-		t += n * i*Unitsz;
-	}
-	jehanne_print("quick: %ud bytes total\n", t);
-
-	MLOCK;
-	if((q = rover) != nil){
-		i = t = 0;
-		do {
-			t += q->s.size;
-			if(i < nelem(rovers)){
-				rovers[i].tag = q->s.tag;
-				rovers[i].size = q->s.size;
-			}
-			i++;
-		} while((q = q->s.next) != rover);
-	}
-	MUNLOCK;
-
-	if(i != 0){
-		jehanne_print("rover: %d blocks %ud bytes total\n",
-			i, t*Unitsz);
-		while(--i >= 0)
-			if(i < nelem(rovers) && rovers[i].size != 0)
-				jehanne_print("R%d: %#8.8ux %ud\n", i, rovers[i].tag, rovers[i].size);
-	}
-
-	for(i = 0; i < nelem(qstats); i++){
-		if(qstats[i] == 0)
-			continue;
-		jehanne_print("%s: %ud\n", qstatname[i], qstats[i]);
-	}
-}
-
-void
-jehanne_free(void* ap)
-{
-	Header *h;
-	BigAlloc *b;
-	usize nunits;
-
-	if(ap == nil)
-		return;
-	qstats[QSfree]++;
-	if(isbigalloc(ap)){
-		b = bigfind(ap);
-		if(b != nil){
-			bigfree(ap);
-			return;
-		}
-	}
-	h = D2H(ap);
-	nunits = h->s.size;
-	if((nunits & Busy) == 0)
-		panic("free: already free %#p: freed %#p tag %#ux", ap, getcallerpc(), h->s.tag);
-	nunits &= ~Busy;
-	h->s.size = nunits;
-	if(nunits < MinUnits)
-		panic("free: empty block: corrupt allocation arena");
-	if(memprof != nil)
-		memprof(ap, h->s.tag, (nunits-1)*Unitsz, -1);
-	if(Poisoning)
-		jehanne_memset(h+1, 0xAA, (nunits-1)*Unitsz);
-	MLOCK;
-	if(!freetail(h)){
-		if(nunits > NQUICK){
-			freemisc(h);
-		}else
-			freequick(h);
-	}
-	MUNLOCK;
-}
-
-void*
-qmalloc(uint32_t size)
-{
-	void* v;
-
-	qstats[QSmalloc]++;
-if(size > 1536*1024)jehanne_print("qmalloc %lud %#p\n", size, getcallerpc());
-	if(size >= BigThreshold)
-		v = bigalloc(size, 0, getcallerpc());
-	else
-		v = qalloc(size, getcallerpc());
-	return v;
-}
-
-void*
-jehanne_malloc(uint32_t size)
-{
-	void* v;
-
-	qstats[QSmalloc]++;
-if(size > 1536*1024)jehanne_print("malloc %lud %#p\n", size, getcallerpc());
-	if(size >= BigThreshold)
-		v = bigalloc(size, 0, getcallerpc());
-	else
-		v = qalloc(size, getcallerpc());
-	if(v != nil)
-		jehanne_memset(v, 0, size);
-	return v;
-}
-
-void*
-jehanne_mallocz(uint32_t size, int clr)
-{
-	void *v;
-
-	qstats[QSmalloc]++;
-if(size > 1900*1024)jehanne_print("mallocz %lud %#p\n", size, getcallerpc());
-	if(size >= BigThreshold)
-		v = bigalloc(size, 0, getcallerpc());
-	else
-		v = qalloc(size, getcallerpc());
-	if(v == nil)
-		return nil;
-	if(clr)
-		jehanne_memset(v, 0, size);
-	return v;
-}
-
-void*
-jehanne_mallocalign(uint32_t nbytes, uint32_t align, long offset, uint32_t span)
-{
-	void *v;
-
-	qstats[QSmalloc]++;
-	if(span != 0 && align <= span){
-		if(nbytes > span)
-			return nil;
-		align = span;
-		span = 0;
-	}
-	if(align <= Align)
-		return jehanne_mallocz(nbytes, 1);
-
-if(nbytes > 1900*1024)jehanne_print("mallocalign %lud %lud %#p\n", nbytes, align, getcallerpc());
-
-	if(nbytes >= BigThreshold)
-		v = bigalloc(nbytes, align, getcallerpc());
-	else
-		v = qallocalign(nbytes, align,offset, span, getcallerpc());
-	if(v != nil){
-		if(align && (uintptr_t)v & (align-1))
-			panic("mallocalign %#p %#lux", v, align);
-		jehanne_memset(v, 0, nbytes);	/* leave it to caller? */
-	}
-	return v;
-}
-
-void*
-sqmalloc(uint32_t size)
-{
-	void *v;
-
-	while((v = jehanne_malloc(size)) == nil)
-		tsleep(&up->sleep, return0, 0, 100);
-	jehanne_setmalloctag(v, getcallerpc());
-
-	return v;
-}
-
-void*
-smalloc(uint32_t size)
-{
-	void *v;
-
-	while((v = jehanne_malloc(size)) == nil)
-		tsleep(&up->sleep, return0, 0, 100);
-	jehanne_setmalloctag(v, getcallerpc());
-	jehanne_memset(v, 0, size);
-
-	return v;
-}
-
-void*
-jehanne_realloc(void* ap, uint32_t size)
-{
-	void *v;
-	Header *h;
-	BigAlloc *b;
-	uint32_t osize;
-	uint32_t nunits, ounits;
-	int delta;
-	Region *t;
-
-	/*
-	 * Easy stuff:
-	 * free and return nil if size is 0
-	 * (implementation-defined behaviour);
-	 * behave like malloc if ap is nil;
-	 * check for arena corruption;
-	 * do nothing if units are the same.
-	 */
-	if(size == 0){
-		jehanne_free(ap);
-		return nil;
-	}
-	if(ap == nil){
-		v = jehanne_malloc(size);
-		if(v != nil)
-			jehanne_setmalloctag(v, getcallerpc());
-		return v;
-	}
-
-	if(!isbigalloc(ap) || (b = bigfind(ap)) == nil){
-		h = D2H(ap);
-		ounits = h->s.size & ~Busy;
-		if((h->s.size & Busy) == 0 || ounits == 0)
-			panic("realloc: corrupt allocation arena");
-
-		if((nunits = NUNITS(size)) == ounits)
-			return ap;
-
-		/*
-		 * Slightly harder:
-		 * if this allocation abuts the tail of a region, try to adjust the tail
-		 */
-		MLOCK;
-		for(t = tail; t != nil; t = t->down){
-			if(t->tail != nil && h+ounits == t->tail){
-				delta = nunits-ounits;
-				if(delta < 0 || t->size >= delta){
-					h->s.size = nunits | Busy;
-					t->size -= delta;
-					t->tail += delta;
-					MUNLOCK;
-					return ap;
-				}
-			}
-		}
-		MUNLOCK;
-		osize = (ounits-1)*Unitsz;
-	}else
-		osize = b->nbytes;
-
-	/*
-	 * Too hard (or can't be bothered):
-	 * allocate, copy and free.
-	 * The original block must be unchanged on failure.
-	 */
-	if((v = jehanne_malloc(size)) != nil){
-		jehanne_setmalloctag(v, getcallerpc());
-		if(size < osize)
-			osize = size;
-		jehanne_memmove(v, ap, osize);
-		jehanne_free(ap);
-	}
-
-	return v;
-}
-
-void
-jehanne_setmalloctag(void *a, uint32_t tag)
-{
-	Header *h;
-	BigAlloc *b;
-
-	if(isbigalloc(a) && (b = bigfind(a)) != nil){
-		b->tag = tag;
-		if(memprof != nil)
-			memprof(a, tag, b->nbytes, 2);
-		return;
-	}
-	h = D2H(a);
-	if((h->s.size & Busy) == 0)
-		panic("setmalloctag free %#p %#lux [%#ux %#ux] %#p", a, tag, h->s.size, h->s.tag, getcallerpc());
-	h->s.tag = tag;
-	if(memprof != nil)
-		memprof(a, tag, (h->s.size-1)*Unitsz, 2);
-}
-
-uint32_t
-jehanne_getmalloctag(void *a)
-{
-	BigAlloc *b;
-
-	if(a == nil)
-		return 0;
-	if(isbigalloc(a) && (b = bigfind(a)) != nil)
-		return b->tag;
-	return D2H(a)->s.tag;
-}
-
-void
-mallocinit(void)
-{
-	BigAlloc *p, *pe;
-
-	if(tail != nil)
-		return;
-
-	rover = &misclist;
-	rover->s.next = rover;
-	pe = &bighash.pool[nelem(bighash.pool)-1];
-	bighash.free = p = bighash.pool;
-	for(; p < pe; p++)
-		p->next = p+1;
-	p->next = nil;
-	if(!morecore(BigThreshold/Unitsz))
-		panic("mallocinit");
-	jehanne_print("base %#p bound %#p nunits %lud\n", tail->start, tail->end, tail->end - tail->start);
-}
-
-/*
- * get some space from basealloc
- */
-static int
-morecore(uint32_t nunits)
-{
-	usize nbytes;
-	char *p;
-	Region *r;
-
-	if(nunits < NUNITS(256*KiB))
-		nunits = NUNITS(256*KiB);
-	nbytes = nunits*Unitsz + sizeof(Region) + Unitsz;
-	p = basealloc(nbytes, Align, &nbytes);
-	if(p == nil)
-		return 0;
-	/* build a new region if current one can't be extended */
-	if((r = tail) == nil || p != r->limit){
-		r = (Region*)p;
-		r->base = p;
-		r->start= ALIGNHDR(r+1, Align);
-		r->tail = r->start;
-		r->down = tail;
-		tail = r;
-	}
-	r->limit = p+nbytes;
-	r->end = r->start + (r->limit - (char*)r->start)/Unitsz;
-	r->size = r->end - r->tail;
-	return 1;
-}
-
-void
-setmemprof(void (*f)(void*, uint32_t, usize, int))
-{
-	memprof = f;
-}
-
-/*
- * Mstate :: base  (Used|Free Size)*
- */
-void
-snapmemarena(void)
-{
-	/* just the available parts */
-}
diff --git a/sys/src/kern/port/random.c b/sys/src/kern/port/random.c
index 41053e2..a1994ae 100644
--- a/sys/src/kern/port/random.c
+++ b/sys/src/kern/port/random.c
@@ -3,156 +3,145 @@
 #include	"mem.h"
 #include	"dat.h"
 #include	"fns.h"
+#include	"../port/error.h"
+
+#include	<libsec.h>
+
+/* machine specific hardware random number generator */
+void (*hwrandbuf)(void*, uint32_t) = nil;
 
 static struct
 {
 	QLock;
-	Rendez	producer;
-	Rendez	consumer;
+	Chachastate cs;
+} *rs;
+
+typedef struct Seedbuf Seedbuf;
+struct Seedbuf
+{
 	uint32_t	randomcount;
-	uint8_t	buf[1024];
-	uint8_t	*ep;
-	uint8_t	*rp;
-	uint8_t	*wp;
-	uint8_t	next;
-	uint8_t	wakeme;
-	uint8_t	filled;
+	uint8_t		buf[64];
+	uint8_t		nbuf;
+	uint8_t		next;
 	uint16_t	bits;
-	uint32_t	randn;
-	int	target;
-} rb;
 
-static int
-rbnotfull(void* _1)
+	SHA2_512state	ds;
+};
+
+static void
+randomsample(Ureg*_, Timer *t)
 {
-	int i;
+	Seedbuf *s = t->ta;
 
-	i = rb.wp - rb.rp;
-	if(i < 0)
-		i += sizeof(rb.buf);
-	return i < rb.target;
-}
-
-static int
-rbnotempty(void* _1)
-{
-	return rb.wp != rb.rp;
+	if(s->randomcount == 0 || s->nbuf >= sizeof(s->buf))
+		return;
+	s->bits = (s->bits<<2) ^ s->randomcount;
+	s->randomcount = 0;
+	if(++s->next < 8/2)
+		return;
+	s->next = 0;
+	s->buf[s->nbuf++] ^= s->bits;
 }
 
 static void
-genrandom(void* _1)
+randomseed(void*_)
 {
-	up->basepri = PriNormal;
-	up->priority = up->basepri;
+	Seedbuf *s;
 
-	for(;;){
-		for(;;)
-			if(++rb.randomcount > 100000)
-				break;
+	s = secalloc(sizeof(Seedbuf));
+
+	if(hwrandbuf != nil)
+		(*hwrandbuf)(s->buf, sizeof(s->buf));
+
+	/* Frequency close but not equal to HZ */
+	up->tns = (int64_t)(MS2HZ+3)*1000000LL;
+	up->tmode = Tperiodic;
+	up->tt = nil;
+	up->ta = s;
+	up->tf = randomsample;
+	timeradd(up);
+	while(s->nbuf < sizeof(s->buf)){
+		if(++s->randomcount <= 100000)
+			continue;
 		if(anyhigher())
 			sched();
-		if(rb.filled || !rbnotfull(0))
-			sleep(&rb.producer, rbnotfull, 0);
 	}
-}
+	timerdel(up);
 
-/*
- *  produce random bits in a circular buffer
- */
-static void
-randomclock(void)
-{
-	uint8_t *p;
+	sha2_512(s->buf, sizeof(s->buf), s->buf, &s->ds);
+	setupChachastate(&rs->cs, s->buf, 32, s->buf+32, 12, 20);
+	qunlock(rs);
 
-	if(rb.randomcount == 0)
-		return;
+	secfree(s);
 
-	if(!rbnotfull(0)) {
-		rb.filled = 1;
-		return;
-	}
-
-	rb.bits = (rb.bits<<2) ^ rb.randomcount;
-	rb.randomcount = 0;
-
-	rb.next++;
-	if(rb.next != 8/2)
-		return;
-	rb.next = 0;
-
-	*rb.wp ^= rb.bits;
-	p = rb.wp+1;
-	if(p == rb.ep)
-		p = rb.buf;
-	rb.wp = p;
-
-	if(rb.wakeme){
-		rb.wakeme = 0;
-		wakeup(&rb.consumer);
-	}
+	pexit("", 1);
 }
 
 void
 randominit(void)
 {
-	/* Frequency close but not equal to HZ */
-	addclock0link(randomclock, 13);
-	rb.target = 16;
-	rb.ep = rb.buf + sizeof(rb.buf);
-	rb.rp = rb.wp = rb.buf;
-	kproc("genrandom", genrandom, 0);
+	rs = secalloc(sizeof(*rs));
+	qlock(rs);	/* randomseed() unlocks once seeded */
+	kproc("randomseed", randomseed, nil);
 }
 
-/*
- *  consume random bytes from a circular buffer
- */
 uint32_t
-randomread(void *xp, uint32_t n)
+randomread(void *p, uint32_t n)
 {
-	uint8_t *e, *p, *r;
-	uint32_t x;
-	int i;
+	Chachastate c;
 
-	p = xp;
+	if(n == 0)
+		return 0;
 
-	qlock(&rb);
-	if(waserror()){
-		qunlock(&rb);
-		nexterror();
-	}
+	if(hwrandbuf != nil)
+		(*hwrandbuf)(p, n);
 
-	for(e = p + n; p < e; ){
-		if(rb.wp == rb.rp){
-			rb.wakeme = 1;
-			wakeup(&rb.producer);
-			sleep(&rb.consumer, rbnotempty, 0);
-			continue;
-		}
+	/* copy chacha state, rekey and increment iv */
+	qlock(rs);
+	memmove(&c, &rs->cs, sizeof(c));
+	chacha_encrypt((uint8_t*)&rs->cs.input[4], 32, &c);
+	if(++rs->cs.input[13] == 0)
+		if(++rs->cs.input[14] == 0)
+			++rs->cs.input[15];
+	qunlock(rs);
 
-		/*
-		 *  beating clocks will be predictable if
-		 *  they are synchronized.  Use a cheap pseudo-
-		 *  random number generator to obscure any cycles.
-		 */
-		x = rb.randn*1103515245 ^ *rb.rp;
-		*p++ = rb.randn = x;
+	/* encrypt the buffer, can fault */
+	chacha_encrypt((uint8_t*)p, n, &c);
 
-		r = rb.rp + 1;
-		if(r == rb.ep)
-			r = rb.buf;
-		rb.rp = r;
-	}
-	if(rb.filled && rb.wp == rb.rp){
-		i = 2*rb.target;
-		if(i > sizeof(rb.buf) - 1)
-			i = sizeof(rb.buf) - 1;
-		rb.target = i;
-		rb.filled = 0;
-	}
-	poperror();
-	qunlock(&rb);
-
-	wakeup(&rb.producer);
+	/* prevent state leakage */
+	memset(&c, 0, sizeof(c));
 
 	return n;
 }
+
+/* used by fastrand() */
+void
+genrandom(uint8_t *p, int n)
+{
+	randomread(p, n);
+}
+
+/* used by rand(),nrand() */
+long
+lrand(void)
+{
+	/* xoroshiro128+ algorithm */
+	static int seeded = 0;
+	static uint64_t s[2];
+	static Lock lk;
+	uint32_t r;
+
+	if(seeded == 0){
+		randomread(s, sizeof(s));
+		seeded = (s[0] | s[1]) != 0;
+	}
+
+	lock(&lk);
+	r = (s[0] + s[1]) >> 33;
+	s[1] ^= s[0];
+	s[0] = (s[0] << 55 | s[0] >> 9) ^ s[1] ^ (s[1] << 14);
+	s[1] = (s[1] << 36 | s[1] >> 28);
+	unlock(&lk);
+
+	return r;
+}
diff --git a/sys/src/kern/port/rmap.c b/sys/src/kern/port/rmap.c
index d300cfa..6760d46 100644
--- a/sys/src/kern/port/rmap.c
+++ b/sys/src/kern/port/rmap.c
@@ -203,7 +203,7 @@ rmapgaps(RMap *r2, RMap *r1)
 }
 
 void
-rmapprint(RMap *r)
+mapprint(RMap *r)
 {
 	RMapel *e;
 
diff --git a/sys/src/kern/port/swcursor.c b/sys/src/kern/port/swcursor.c
new file mode 100644
index 0000000..a94be5b
--- /dev/null
+++ b/sys/src/kern/port/swcursor.c
@@ -0,0 +1,136 @@
+#include	"u.h"
+#include	"../port/lib.h"
+#include	"mem.h"
+#include	"dat.h"
+#include	"fns.h"
+#include	"../port/error.h"
+
+#define	Image	IMAGE
+#include	<draw.h>
+#include	<memdraw.h>
+#include	<cursor.h>
+#include	"screen.h"
+
+extern Memimage* gscreen;
+
+/*
+ * Software cursor.
+ */
+static Memimage*	swback;		/* screen under cursor */
+static Memimage*	swimg;		/* cursor image */
+static Memimage*	swmask;		/* cursor mask */
+static Memimage*	swimg1;
+static Memimage*	swmask1;
+
+static Point		swoffset;
+static Rectangle	swrect;		/* screen rectangle in swback */
+static Point		swvispt;	/* actual cursor location */
+static int		swvisible;	/* is the cursor visible? */
+
+/*
+ * called with drawlock locked for us, most of the time.
+ * kernel prints at inopportune times might mean we don't
+ * hold the lock, but memimagedraw is now reentrant so
+ * that should be okay: worst case we get cursor droppings.
+ */
+void
+swcursorhide(void)
+{
+	if(swvisible == 0)
+		return;
+	if(swback == nil || gscreen == nil)
+		return;
+	swvisible = 0;
+	memimagedraw(gscreen, swrect, swback, ZP, memopaque, ZP, S);
+}
+
+void
+swcursoravoid(Rectangle r)
+{
+	if(swvisible && rectXrect(r, swrect)){
+		swcursorhide();
+		mouseredraw();	/* schedule cursor redraw after we release drawlock */
+	}
+}
+
+void
+swcursordraw(Point p)
+{
+	Rectangle flushr;
+
+	if(swvisible)
+		return;
+	if(swback == nil || swimg1 == nil || swmask1 == nil || gscreen == nil)
+		return;
+	assert(!canqlock(&drawlock));
+	swvispt = addpt(swoffset, p);
+	flushr = swrect;
+	swrect = rectaddpt(Rect(0,0,16,16), swvispt);
+	combinerect(&flushr, swrect);
+	memimagedraw(swback, swback->r, gscreen, swvispt, memopaque, ZP, S);
+	memimagedraw(gscreen, swrect, swimg1, ZP, swmask1, ZP, SoverD);
+	flushmemscreen(flushr);
+	swvisible = 1;
+}
+
+void
+swcursorload(Cursor *curs)
+{
+	uint8_t *ip, *mp;
+	int i, j, set, clr;
+
+	if(swimg == nil || swmask == nil || swimg1 == nil || swmask1 == nil)
+		return;
+	/*
+	 * Build cursor image and mask.
+	 * Image is just the usual cursor image
+	 * but mask is a transparent alpha mask.
+	 *
+	 * The 16x16x8 memimages do not have
+	 * padding at the end of their scan lines.
+	 */
+	ip = byteaddr(swimg, ZP);
+	mp = byteaddr(swmask, ZP);
+	for(i=0; i<32; i++){
+		set = curs->set[i];
+		clr = curs->clr[i];
+		for(j=0x80; j; j>>=1){
+			*ip++ = set&j ? 0x00 : 0xFF;
+			*mp++ = (clr|set)&j ? 0xFF : 0x00;
+		}
+	}
+	swoffset = curs->offset;
+	memimagedraw(swimg1, swimg1->r, swimg, ZP, memopaque, ZP, S);
+	memimagedraw(swmask1, swmask1->r, swmask, ZP, memopaque, ZP, S);
+
+	mouseredraw();
+}
+
+void
+swcursorinit(void)
+{
+	if(gscreen == nil)
+		return;
+
+	if(swback){
+		freememimage(swback);
+		freememimage(swmask);
+		freememimage(swmask1);
+		freememimage(swimg);
+		freememimage(swimg1);
+	}
+	swback = allocmemimage(Rect(0,0,32,32), gscreen->chan);
+	swmask = allocmemimage(Rect(0,0,16,16), GREY8);
+	swmask1 = allocmemimage(Rect(0,0,16,16), GREY1);
+	swimg = allocmemimage(Rect(0,0,16,16), GREY8);
+	swimg1 = allocmemimage(Rect(0,0,16,16), GREY1);
+	if(swback == nil || swmask == nil || swmask1 == nil || swimg == nil || swimg1 == nil){
+		print("software cursor: allocmemimage fails\n");
+		return;
+	}
+	memfillcolor(swback, DTransparent);
+	memfillcolor(swmask, DOpaque);
+	memfillcolor(swmask1, DOpaque);
+	memfillcolor(swimg, DBlack);
+	memfillcolor(swimg1, DBlack);
+}
diff --git a/sys/src/kern/port/sysfile.c b/sys/src/kern/port/sysfile.c
index 47ed922..639c818 100644
--- a/sys/src/kern/port/sysfile.c
+++ b/sys/src/kern/port/sysfile.c
@@ -902,15 +902,13 @@ static int checkdc(int dc)
 static int
 bindmount(int dc, int fd, int afd, char* arg0, char* arg1, int flag, char* spec)
 {
-	int i, flags;
+	int i;
 	Dev *dev;
 	Chan *c0, *c1, *ac, *bc;
 
 	if((flag&~MMASK) || (flag&MORDER)==(MBEFORE|MAFTER))
 		error(Ebadarg);
 
-	flags = flag & MCACHE;
-
 	if(dc){
 		validaddr(spec, 1, 0);
 		spec = validnamedup(spec, 1);
@@ -937,7 +935,7 @@ bindmount(int dc, int fd, int afd, char* arg0, char* arg1, int flag, char* spec)
 			ac = fdtochan(afd, ORDWR, 0, 1);
 
 		dev = devtabget(dc, 0);
-		c0 = dev->attach(bc, ac, spec, flags);
+		c0 = dev->attach(bc, ac, spec, 0);
 
 		poperror();	/* ac bc */
 		if(ac != nil)
diff --git a/sys/src/kern/port/sysproc.c b/sys/src/kern/port/sysproc.c
index 3956135..92a68a3 100644
--- a/sys/src/kern/port/sysproc.c
+++ b/sys/src/kern/port/sysproc.c
@@ -221,8 +221,16 @@ sysrfork(uint32_t flag)
 	jehanne_memset(p->time, 0, sizeof(p->time));
 	p->time[TReal] = sys->ticks;
 
+	jehanne_memset(p->wakeups, 0, sizeof(p->wakeups));
+	p->nwakeups = 0;
+
 	kstrdup(&p->text, up->text);
 	kstrdup(&p->user, up->user);
+	p->kentry = up->kentry;
+	p->pcycles = -p->kentry;
+
+	fpprocfork(p);
+
 	/*
 	 *  since the bss/data segments are now shareable,
 	 *  any mmu info about this process is now stale
@@ -254,13 +262,12 @@ sysexec(char* p, char **argv)
 	Chan *chan;
 	ImagePointer img;
 	ElfSegPointer load_segments[NLOAD];
-	ProcSegment *s, *ts, *ds, *bs, *es;
-	PagePointer page, argvpage;
-	int argc, progargc, i, j, n, nldseg;
-	char *a, **argvcopy, *elem, *file;
+	ProcSegment *s, *ts, *ds, *bs;
+	int argc, progargc, i, n, nldseg;
+	char *a, *ac, **argvcopy, *elem, *file, *e;
 	char line[64], *progarg[sizeof(line)/2+1];
 	long hdrsz;
-	uintptr_t entry, stack, sbottom, argsize, tmp;
+	uintptr_t entry, argsize, tmp;
 	void (*pt)(Proc*, int, int64_t, int64_t);
 	uint64_t ptarg;
 
@@ -329,7 +336,7 @@ sysexec(char* p, char **argv)
 	/*
 	 * #! has had its chance, now we need a real binary.
 	 */
-	nldseg = elf64ldseg(chan, &entry, &ldseg, cputype, PGSZ);
+	nldseg = elf64ldseg(chan, &entry, &ldseg, sys->architecture, PGSZ);
 	if(nldseg != 2){
 //		jehanne_print("exec: elf64ldseg returned %d segs!\n", nldseg);
 		error(Ebadexec);
@@ -345,16 +352,15 @@ sysexec(char* p, char **argv)
 	 * - array of pointers to the argument strings with a
 	 *   terminating nil (argv).
 	 * - argc
-	 * When the exec is committed, this temporary stack in es will
+	 * When the exec is committed, this temporary stack in up->seg[ESEG] will
 	 * become SSEG.
 	 * The architecture-dependent code which jumps to the new image
 	 * will also push a count of the argument array onto the stack (argc).
 	 */
-	es = nil;	/* exec new stack */
-	if(!segment_virtual(&es, SgStack, SgRead|SgWrite, 0, USTKTOP-USTKSIZE, USTKTOP))
+	if(!segment_virtual(&up->seg[ESEG], SgStack, SgRead|SgWrite, 0, up->seg[SSEG]->base-USTKSIZE, up->seg[SSEG]->base))
 		error(Enovmem);
 	if(waserror()){
-		segment_release(&es);
+		segment_release(&up->seg[ESEG]);
 		nexterror();
 	}
 
@@ -362,7 +368,7 @@ sysexec(char* p, char **argv)
 	argsize = 0;
 
 	/* 	start with arguments found from a #! header. */
-	for(i = 0; i < argc; i++)
+	for(i = 0; i < progargc; i++)
 		argsize += jehanne_strlen(progarg[i]) + 1 + sizeof(char*);
 
 	/* 	then size strings pointed to by the syscall argument
@@ -393,7 +399,7 @@ sysexec(char* p, char **argv)
 	argsize += sizeof(char*);	/* place for argv[argc] = nil */
 	argsize += sizeof(uintptr_t);	/* place for argc = nil */
 
-	tmp = es->top - argsize;
+	tmp = up->seg[ESEG]->top - argsize;
 	if(tmp&~(PGSZ-1) != (tmp+sizeof(uintptr_t)+sizeof(char*)*(argc+1))&~(PGSZ-1)){
 		/* the argument pointers cross a page boundary, keep
 		 * them all in the same page
@@ -402,138 +408,42 @@ sysexec(char* p, char **argv)
 	}
 	tmp = sysexecstack(tmp, argc);
 
-	argsize += es->top - argsize - tmp;
+	argsize = up->seg[ESEG]->top - tmp;
 
-	/* Step 1: Fault enough pages in the new stack */
-	stack = es->top;
-	while(stack > es->top - argsize){
-		stack -= PGSZ;
-		if(!segment_fault(&tmp, &stack, es, FaultWrite))
-			error(Enovmem);
-	}
+	/*
+	 * Step 1: assemble args; the pages will be faulted in
+	 */
+	argvcopy = (char**)tmp;
 
-//jehanne_print("argsize %d, first stack page %d\n", argsize, stack);
-
-	/* Step 2: Copy arguments into pages in descending order */
-
-	/*	prepare argvcopy to point to the right location */
-	tmp = es->top - argsize;
-	argvpage = segment_page(es, tmp);
-	char *apmem;
-	if(argvpage == 0)
-		panic("sysexec: segment_fault did not allocate enough pages");
-	apmem = page_kmap(argvpage);
-	argvcopy = (char**)((uintptr_t)(apmem + (tmp&(PGSZ-1))));
-
-	/*	add argc */
-	*((uintptr_t*)argvcopy) = argc;
+	/*      set argc (see crt0.s in libc) */
+	*((uintptr_t*)argvcopy) = argc;	/* will page fault here */
 	++argvcopy;
 
-	/*	prepare pmem to to point to the last stack page */
-	char *pmem;
-	stack = es->top;
-	sbottom = es->top;
-	sbottom -= PGSZ;
-	page = segment_page(es, sbottom);
-	if(page == 0)
-		panic("sysexec: segment_fault did not allocate enough pages");
-	pmem = page_kmap(page);
+	tmp = PTR2UINT(argvcopy);
+	ac = (char*)(tmp + ((argc+1)*sizeof(char*)));
 
-	/* 	start filling pmem (from the end) and argvcopy
-	 * 	(from the begin) with arguments found
-	 * 	from a #! header.
-	 */
 	for(i = 0; i < progargc; i++){
-		n = jehanne_strlen(progarg[i])+1;
-CopyProgArgument:
-		if(sbottom <= stack-n){
-			a = pmem+((stack-n)&(PGSZ-1));
-			jehanne_memmove(a, progarg[i], n);
-			stack -= n;
-		} else {
-			/* the current argument cross multiple pages */
-			if(stack&(PGSZ-1)){
-				/* fill the rest of the current page */
-				jehanne_memmove(pmem, progarg[i]+n-1-(stack&(PGSZ-1)), (stack&(PGSZ-1))-1);
-				*(pmem+(stack&(PGSZ-1))-1) = 0;
-				n -= (stack&(PGSZ-1));
-				stack -= (stack&(PGSZ-1));
-			}
-			while(sbottom > stack - n){
-				page_kunmap(page, &pmem);
-				sbottom -= PGSZ;
-				page = segment_page(es, sbottom);
-				if(page == 0)
-					panic("sysexec: segment_fault did not allocate enough pages");
-				pmem = page_kmap(page);
-				if(n > PGSZ){
-					/* fill one full page */
-					jehanne_memmove(pmem, progarg[i]+n-PGSZ, PGSZ);
-					n -= PGSZ;
-					stack -= PGSZ;
-				}
-			}
-			goto CopyProgArgument;
-		}
-		argvcopy[i] = (char*)stack;
+		a = progarg[i];
+		e = strchr(a, 0);
+		n = (e - a) + 1;
+		memmove(ac, a, n);	/* can page fault here */
+		argvcopy[i] = ac + USTKSIZE;
+		ac += n;
 	}
-
-	if(progargc > 0){
-		/* we are in a script: argv[0] has been replaced in
-		 * progarg and already copied, so we need to skip
-		 * it and add any further elements from argv.
-		 */
-		--progargc;
-	}
-
-	/* 	continue filling pmem (descending) and argvcopy
-	 * 	(from the current point) with exec arguments
-	 */
+	if(argc > progargc && progargc > 0)
+		--progargc;	/* to skip original argv0 that was replaced with full path */
 	for(; i < argc; i++){
-		j = i - progargc;
-		n = jehanne_strlen(argv[j])+1;
-
-CopyExecArgument:
-		if(sbottom <= stack-n){
-			a = pmem+((stack-n)&(PGSZ-1));
-			jehanne_memmove(a, argv[j], n);
-			stack -= n;
-		} else {
-			/* the current argument cross multiple pages */
-			if(stack&(PGSZ-1)){
-				/* fill the rest of the current page */
-				jehanne_memmove(pmem, argv[j]+n-1-(stack&(PGSZ-1)), (stack&(PGSZ-1))-1);
-				*(pmem+(stack&(PGSZ-1))-1) = 0;
-				n -= (stack&(PGSZ-1));
-				stack -= (stack&(PGSZ-1));
-			}
-			while(sbottom > stack - n){
-				page_kunmap(page, &pmem);
-				sbottom -= PGSZ;
-				page = segment_page(es, sbottom);
-				if(page == 0)
-					panic("sysexec: segment_fault did not allocate enough pages");
-				pmem = page_kmap(page);
-				if(n > PGSZ){
-					/* fill one full page */
-					jehanne_memmove(pmem, argv[j]+n-PGSZ, PGSZ);
-					n -= PGSZ;
-					stack -= PGSZ;
-				}
-			}
-			goto CopyExecArgument;
-		}
-
-		argvcopy[i] = (char*)stack;
-		INSPECT(stack);
-		INSPECT(pmem);
+		a = argv[i-progargc];
+		validaddr(a, 1, 0);
+		e = vmemchr(a, 0, (char*)up->seg[ESEG]->top - ac);
+		if(e == nil)
+			error(Ebadarg);
+		n = (e - a) + 1;
+		memmove(ac, a, n);	/* can page fault here */
+		argvcopy[i] = ac + USTKSIZE;
+		ac += n;
 	}
-
-	argvcopy[i] = nil;	/* terminating nil */
-	page_kunmap(page, &pmem);
-	page_kunmap(argvpage, &apmem);
-
-	INSPECT(argvcopy);
+	argvcopy[i] = nil;
 
 	/*
 	 * All the argument processing is now done, ready for the image.
@@ -597,7 +507,7 @@ CopyExecArgument:
 		if(up->seg[i])
 			segment_release(&up->seg[i]);
 	}
-	for(i = BSEG+1; i< NSEG; i++) {
+	for(i = ESEG+1; i< NSEG; i++) {
 		s = up->seg[i];
 		if(s && (s->flags&SgCExec))
 			segment_release(&up->seg[i]);
@@ -608,19 +518,15 @@ CopyExecArgument:
 		pt(up, SName, 0, ptarg);
 	}
 
-	/*
-	 *  At this point, the mmu contains info about the old address
-	 *  space and needs to be flushed
-	 */
-	mmuflush();
-
-	up->seg[SSEG] = es;
+	segment_relocate(up->seg[ESEG], USTKTOP-USTKSIZE, USTKTOP);
+	up->seg[SSEG] = up->seg[ESEG];
 	up->seg[TSEG] = ts;
 	up->seg[DSEG] = ds;
 	up->seg[BSEG] = bs;
+	up->seg[ESEG] = nil;
 	poperror();	/* ds */
 	poperror();	/* ts */
-	poperror();	/* es */
+	poperror();	/* up->seg[ESEG] */
 	poperror();	/* img */
 	image_release(img);
 
@@ -629,7 +535,7 @@ CopyExecArgument:
 	elem = nil;
 	if(up->setargs)	/* setargs == 0 => args in stack from sysexec */
 		jehanne_free(up->args);
-	up->args = argvcopy;
+	up->args = (char**)(((uintptr_t)argvcopy)+USTKSIZE);
 	up->nargs = argc;
 	up->setargs = 0;
 
@@ -663,10 +569,16 @@ CopyExecArgument:
 	up->notify = 0;
 	up->notified = 0;
 	up->privatemem = 0;
-	up->lastWakeup = 0;
-	up->pendingWakeup = 0;
+	awake_gc_proc(up);
 	sysprocsetup(up);
 	qunlock(&up->debug);
+
+	/*
+	 *  At this point, the mmu contains info about the old address
+	 *  space and needs to be flushed
+	 */
+	mmuflush();
+
 	if(up->hang)
 		up->procctl = Proc_stopme;
 
@@ -685,12 +597,6 @@ sysalarm(unsigned long millisecs)
 	return procalarm(millisecs);
 }
 
-long
-sysawake(long millisecs)
-{
-	return procawake(millisecs);
-}
-
 int
 sys_exits(char *status)
 {
@@ -837,8 +743,6 @@ sysrendezvous(void* tagp, void* rendvalp)
 			p->rendval = rendval;
 			unlock(&up->rgrp->l);
 
-			while(p->mach != 0)
-				;
 			ready(p);
 
 			result = UINT2PTR(val);
@@ -849,8 +753,8 @@ sysrendezvous(void* tagp, void* rendvalp)
 	}
 
 rendezvousBlocks:
-	up->blockingsc = up->cursyscall;
-	if(awakeOnBlock(up)){
+	awake_fell_asleep(up);
+	if(awake_should_wake_up(up)){
 		unlock(&up->rgrp->l);
 		result = UINT2PTR(up->rendval);
 		goto rendezvousDone;
@@ -858,8 +762,10 @@ rendezvousBlocks:
 	/* Going to sleep here */
 	up->rendtag = tag;
 	up->rendval = rendval;
-	up->rendhash = *l;
-	*l = up;
+	if(tag != (uintptr_t)~0){
+		up->rendhash = *l;
+		*l = up;
+	}
 	up->state = Rendezvous;
 	if(up->trace && (pt = proctrace) != nil){
 		pc = (uintptr_t)sysrendezvous;
diff --git a/sys/src/kern/port/taslock.c b/sys/src/kern/port/taslock.c
new file mode 100644
index 0000000..f9a6374
--- /dev/null
+++ b/sys/src/kern/port/taslock.c
@@ -0,0 +1,232 @@
+#include "u.h"
+#include "../port/lib.h"
+#include "mem.h"
+#include "dat.h"
+#include "fns.h"
+#include "../port/error.h"
+
+long maxlockcycles;
+long maxilockcycles;
+long cumlockcycles;
+long cumilockcycles;
+uintptr_t maxlockpc;
+uintptr_t maxilockpc;
+
+struct
+{
+	uint64_t	locks;
+	uint64_t	glare;
+	uint64_t	inglare;
+} lockstats;
+
+#if 0
+static void
+dumplockmem(char *tag, Lock *l)
+{
+	uint8_t *cp;
+	int i;
+
+	iprint("%s: ", tag);
+	cp = (uint8_t*)l;
+	for(i = 0; i < 64; i++)
+		iprint("%2.2ux ", cp[i]);
+	iprint("\n");
+}
+#endif
+
+void
+lockloop(Lock *l, uintptr_t pc)
+{
+	Proc *p;
+
+	p = l->lp;
+	print("lock %#p loop key %#lux pc %#p held by pc %#p proc %lud\n",
+		l, l->key, pc, l->pc, p ? p->pid : 0);
+	dumpaproc(up);
+	if(p != nil)
+		dumpaproc(p);
+}
+
+int
+lock(Lock *l)
+{
+	int i;
+	uintptr_t pc;
+
+	pc = getcallerpc();
+
+	lockstats.locks++;
+	if(up)
+		up->nlocks++;	/* prevent being scheded */
+	if(tas32(&l->key) == 0){
+		if(up)
+			up->lastlock = l;
+		l->pc = pc;
+		l->lp = up;
+		l->lm = MACHP(m->machno);
+		l->isilock = 0;
+#ifdef LOCKCYCLES
+		l->lockcycles = -lcycles();
+#endif
+		return 0;
+	}
+	if(up)
+		up->nlocks--;
+
+	lockstats.glare++;
+	for(;;){
+		lockstats.inglare++;
+		i = 0;
+		while(l->key){
+			if(i++ > 100000000){
+				i = 0;
+				lockloop(l, pc);
+			}
+		}
+		if(up)
+			up->nlocks++;
+		if(tas32(&l->key) == 0){
+			if(up)
+				up->lastlock = l;
+			l->pc = pc;
+			l->lp = up;
+			l->lm = MACHP(m->machno);
+			l->isilock = 0;
+#ifdef LOCKCYCLES
+			l->lockcycles = -lcycles();
+#endif
+			return 1;
+		}
+		if(up)
+			up->nlocks--;
+	}
+}
+
+void
+ilock(Lock *l)
+{
+	uint64_t x;
+	uintptr_t pc;
+
+	pc = getcallerpc();
+	lockstats.locks++;
+
+	x = splhi();
+	if(tas32(&l->key) != 0){
+		lockstats.glare++;
+		/*
+		 * Cannot also check l->pc, l->lm, or l->isilock here
+		 * because they might just not be set yet, or
+		 * (for pc and m) the lock might have just been unlocked.
+		 */
+		for(;;){
+			lockstats.inglare++;
+			splx(x);
+			while(l->key)
+				;
+			x = splhi();
+			if(tas32(&l->key) == 0)
+				goto acquire;
+		}
+	}
+acquire:
+	m->ilockdepth++;
+	if(up)
+		up->lastilock = l;
+	l->sr = x;
+	l->pc = pc;
+	l->lp = up;
+	l->lm = MACHP(m->machno);
+	l->isilock = 1;
+#ifdef LOCKCYCLES
+	l->lockcycles = -lcycles();
+#endif
+}
+
+int
+canlock(Lock *l)
+{
+	if(up)
+		up->nlocks++;
+	if(tas32(&l->key)){
+		if(up)
+			up->nlocks--;
+		return 0;
+	}
+
+	if(up)
+		up->lastlock = l;
+	l->pc = getcallerpc();
+	l->lp = up;
+	l->lm = MACHP(m->machno);
+	l->isilock = 0;
+#ifdef LOCKCYCLES
+	l->lockcycles = -lcycles();
+#endif
+	return 1;
+}
+
+void
+unlock(Lock *l)
+{
+#ifdef LOCKCYCLES
+	l->lockcycles += lcycles();
+	cumlockcycles += l->lockcycles;
+	if(l->lockcycles > maxlockcycles){
+		maxlockcycles = l->lockcycles;
+		maxlockpc = l->pc;
+	}
+#endif
+	if(l->key == 0)
+		print("unlock: not locked: pc %#p\n", getcallerpc());
+	if(l->isilock)
+		print("unlock of ilock: pc %#p, held by %#p\n", getcallerpc(), l->pc);
+	if(l->lp != up)
+		print("unlock: up changed: pc %#p, acquired at pc %#p, lock p %#p, unlock up %#p\n", getcallerpc(), l->pc, l->lp, up);
+	l->lm = nil;
+	coherence();
+	l->key = 0;
+
+	if(up && --up->nlocks == 0 && up->delaysched && islo()){
+		/*
+		 * Call sched if the need arose while locks were held
+		 * But, don't do it from interrupt routines, hence the islo() test
+		 */
+		sched();
+	}
+}
+
+uintptr_t ilockpcs[0x100] = { [0xff] = 1 };
+//static int n;
+
+void
+iunlock(Lock *l)
+{
+	uint64_t sr;
+
+#ifdef LOCKCYCLES
+	l->lockcycles += lcycles();
+	cumilockcycles += l->lockcycles;
+	if(l->lockcycles > maxilockcycles){
+		maxilockcycles = l->lockcycles;
+		maxilockpc = l->pc;
+	}
+	if(l->lockcycles > 2400)
+		ilockpcs[n++ & 0xff]  = l->pc;
+#endif
+	if(l->key == 0)
+		print("iunlock: not locked: pc %#p\n", getcallerpc());
+	if(!l->isilock)
+		print("iunlock of lock: pc %#p, held by %#p\n", getcallerpc(), l->pc);
+	if(islo())
+		print("iunlock while lo: pc %#p, held by %#p\n", getcallerpc(), l->pc);
+
+	sr = l->sr;
+	l->lm = nil;
+	coherence();
+	l->key = 0;
+	m->ilockdepth--;
+	if(up)
+		up->lastilock = nil;
+	splx(sr);
+}
diff --git a/sys/src/kern/port/umem/images.c b/sys/src/kern/port/umem/images.c
index 74797d1..45a883f 100644
--- a/sys/src/kern/port/umem/images.c
+++ b/sys/src/kern/port/umem/images.c
@@ -1,7 +1,7 @@
 /*
  * This file is part of Jehanne.
  *
- * Copyright (C) 2016 Giacomo Tesio <giacomo@tesio.it>
+ * Copyright (C) 2016-2017 Giacomo Tesio <giacomo@tesio.it>
  *
  * Jehanne is free software: you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -81,6 +81,7 @@ typedef struct ImagePool
 	int		sleeping;	/* number of images that can be reclaimed */
 	unsigned short	first_sleeper;	/* index of first sleeping image */
 	int		blanks;		/* number of blank images */
+	int		max_images;	/* max number of images */
 } ImagePool;
 
 static RWlock pool_lock;	/* to grow chunks or modify free list */
@@ -90,7 +91,7 @@ static ImagePool pool;
 #define img_get(ptr)	(&(pool.chunks[(uint8_t)(ptr-1)>>8]->images[(uint8_t)(ptr-1)&(PSTEP-1)]))
 
 void
-imagepool_init(void)
+imagepool_init(short max_images)
 {
 	pool.chunks = jehanne_malloc(sizeof(ImgPoolChunk*));
 	if(pool.chunks == nil)
@@ -102,6 +103,11 @@ imagepool_init(void)
 	pool.sleeping = 0;
 	pool.blanks = PSTEP;
 	pool.first_sleeper = PSTEP;
+	if(max_images > PSTEP)
+		max_images = ROUNDUP(max_images, PSTEP);
+	if(max_images <= 0)
+		max_images = MAXIMAGES;
+	pool.max_images = max_images;
 }
 
 /* will wlock/wunlock pool_lock */
@@ -115,7 +121,7 @@ imagepool_grow(void)
 
 	wlock(&pool_lock);
 	while(pool.blanks <= 0){
-		if(pool.allocated + PSTEP > MAXIMAGES)
+		if(pool.allocated + PSTEP > pool.max_images)
 			goto Fail;
 		initially_allocated = pool.allocated;
 
diff --git a/sys/src/kern/port/umem/internals.h b/sys/src/kern/port/umem/internals.h
index 2939091..a0cf7ba 100644
--- a/sys/src/kern/port/umem/internals.h
+++ b/sys/src/kern/port/umem/internals.h
@@ -90,4 +90,4 @@ extern void elfsegment_assign(ElfSegPointer *target, ElfSegPointer img);
 
 extern void rawmem_init(void);
 
-extern void imagepool_init(void);
+extern void imagepool_init(short max_images);
diff --git a/sys/src/kern/port/umem/pages.c b/sys/src/kern/port/umem/pages.c
index 1c077d3..d1adf4d 100644
--- a/sys/src/kern/port/umem/pages.c
+++ b/sys/src/kern/port/umem/pages.c
@@ -1,7 +1,7 @@
 /*
  * This file is part of Jehanne.
  *
- * Copyright (C) 2016 Giacomo Tesio <giacomo@tesio.it>
+ * Copyright (C) 2016-2017 Giacomo Tesio <giacomo@tesio.it>
  *
  * Jehanne is free software: you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -22,6 +22,8 @@
 #include "fns.h"
 #include "../port/umem/internals.h"
 
+#define INT32_MAX 2147483647
+
 /* Pages can have 3 states:
  * - Blank:	never used (pa == 0 && r.ref == 0) just after umem_init
  * - In use:	assigned to at least one slot (pa != 0 && r.ref > 0)
@@ -48,6 +50,16 @@ typedef struct PagePool
 
 static PagePool pool;
 
+typedef struct MemoryRegion
+{
+	uintptr_t	base;
+	int		npages;
+	int		used;
+} MemoryRegion;
+
+static MemoryRegion regions[16];
+static int nregions;
+
 static void
 plock(void)
 {
@@ -71,12 +83,25 @@ proc_own_pagepool(Proc* p)
 void
 umem_init(void)
 {
-	uintmem avail;
-	uint64_t pkb, kkb, kmkb, mkb;
+	int64_t pkb, kkb, kmkb, mkb;
+	long npages;
+	int i;
 
-	avail = sys->pmpaged;	/* could include a portion of unassigned memory */
-	pool.npages = avail/PGSZ;
-	pool.npages -= (pool.npages*sizeof(UserPage)) / PGSZ;	/* little overestimate of the space occupied by the paging structures */
+	npages = 0;
+	for(i = 0; i < nelem(regions); ++i)
+		npages += regions[i].npages;
+	if(npages > INT32_MAX){
+		/* TODO: maybe we can move this check to umem_region
+		 * so that unused memory can be given back to kernel.
+		 *
+		 * NOTE however that we are talking about
+		 * unrealistic machines in 2017.
+		 */
+		jehanne_print("user memory: cannot use %lld MiB\n", (npages - INT32_MAX)*PGSZ/MiB);
+		pool.npages = INT32_MAX;
+	} else {
+		pool.npages = npages;
+	}
 	pool.pages = jehanne_mallocz(pool.npages*sizeof(UserPage), 1);
 	if(pool.pages == nil)
 		panic("umem_init: out of memory");
@@ -87,29 +112,69 @@ umem_init(void)
 	/* user, kernel, kernel malloc area, memory */
 	pkb = pool.npages*PGSZ/KiB;
 	kkb = ROUNDUP((uintptr_t)end - KTZERO, PGSZ)/KiB;
-	kmkb = ROUNDDN(sys->vmunmapped - (uintptr_t)end, PGSZ)/KiB;
-	mkb = sys->pmoccupied/KiB;
+	kmkb = (sys->npages - pool.npages)*PGSZ/KiB;
+	mkb = sys->npages*PGSZ/KiB;
 
 	rawmem_init();
-	imagepool_init();
+	imagepool_init(sys->nimage);
 
-	jehanne_print("%lldM memory: %lldK+%lldM kernel,"
-		" %lldM user, %lldM uncommitted\n",
-		mkb/KiB, kkb, kmkb/KiB, pkb/KiB, (mkb-kkb-kmkb-pkb)/KiB
+	jehanne_print("%lldM memory: %lldK+%lldM kernel, %lldM user\n",
+		mkb/KiB, kkb, kmkb/KiB, pkb/KiB
 	);
 
 }
 
+static int
+allocate_region(uintptr_t base, int32_t npages)
+{
+	int n;
+	n = nregions + 1;
+	if(n > sizeof(regions))
+		return 0;
+	regions[nregions].base = base;
+	regions[nregions].npages = npages;
+	regions[nregions].used = 0;
+	nregions = n;
+	return 1;
+}
+
+/* called with plock hold */
+static uintptr_t
+new_physical_page(void)
+{
+	uintptr_t addr;
+	MemoryRegion *r;
+	if(nregions == 0)
+		return 0;
+	r = &regions[nregions-1];
+	addr = r->base + (r->used * PGSZ);
+	++r->used;
+	if(r->used == r->npages)
+		--nregions;
+	return addr;
+}
+
+int
+umem_region(uintptr_t base, uint32_t npages)
+{
+	int r = 0;
+	int32_t np = (int32_t)npages;
+	if(np < 0){
+		r += allocate_region(base, INT32_MAX);
+		npages -= INT32_MAX;
+		base += INT32_MAX*PGSZ;
+	}
+	r += allocate_region(base, npages);
+	return r;
+}
+
 void
 memory_stats(MemoryStats *stats)
 {
-	uintptr_t km;
 	if(stats == nil)
 		panic("memory_stats: nil pointer, pc %#p", getcallerpc());
-	km = ROUNDUP((uintptr_t)end - KTZERO, PGSZ);
-	km += ROUNDDN(sys->vmunmapped - (uintptr_t)end, PGSZ);
-	stats->memory = sys->pmoccupied;
-	stats->kernel = km;
+	stats->memory = sys->npages*PGSZ;
+	stats->kernel = (sys->npages-pool.npages)*PGSZ;
 	stats->user_available = pool.npages*PGSZ;
 	stats->user = (pool.npages - pool.blankpages - pool.freepages)*PGSZ;
 }
@@ -120,7 +185,7 @@ kmap2(UserPage* page)	/* TODO: turn this into kmap */
 	DBG("kmap(%#llux) @ %#p: %#p %#p\n",
 		page->pa, getcallerpc(),
 		page->pa, KADDR(page->pa));
-	return KADDR(page->pa);
+	return kmap(page->pa);
 }
 
 int
@@ -158,7 +223,7 @@ page_new(PagePointer *slot, int clear)
 		pool.firstfree = p->next;
 		adec(&pool.freepages);
 	} else if (pool.blankpages > 0) {
-		pa = physalloc(PGSZ);
+		pa = new_physical_page();
 		if(pa == 0)
 			panic("page_new: out of memory with %d blanks available, pc %#p", pool.blankpages, getcallerpc());
 		pindex = pool.npages - pool.blankpages;
diff --git a/sys/src/kern/port/umem/segments.c b/sys/src/kern/port/umem/segments.c
index 7bcb343..afa896b 100644
--- a/sys/src/kern/port/umem/segments.c
+++ b/sys/src/kern/port/umem/segments.c
@@ -656,6 +656,22 @@ segment_free_pages(ProcSegment *s, uintptr_t from, uintptr_t to)
 	qunlock(&s->ql);
 }
 
+void
+segment_relocate(ProcSegment *s, uintptr_t newbase, uintptr_t newtop)
+{
+	if(s == 0)
+		panic("segment_relocate: nil segment, pc %#p", getcallerpc());
+	if(s->top - s->base != newtop - newbase)
+		panic("segment_relocate: change in size %ulld (old) != %ulld (new), pc %#p", s->top - s->base, newtop - newbase, getcallerpc());
+	if(s->r.ref > 1)
+		panic("segment_relocate: relocating shared segment, pc %#p", getcallerpc());
+	qlock(&s->ql);
+	s->base = newbase;
+	s->top = newtop;
+	s->table->base = newbase;
+	qunlock(&s->ql);
+}
+
 ProcSegment*
 proc_segment(Proc *p, uintptr_t va)
 {
diff --git a/sys/src/kern/port/umem/umem.h b/sys/src/kern/port/umem/umem.h
index 23f345d..499f975 100644
--- a/sys/src/kern/port/umem/umem.h
+++ b/sys/src/kern/port/umem/umem.h
@@ -20,6 +20,9 @@
 
 typedef unsigned int PagePointer;
 
+/* regusterb a memory region available */
+extern int umem_region(uintptr_t base, uint32_t npages);
+
 /* Initialize the user memory system */
 extern void umem_init(void);
 
@@ -204,6 +207,8 @@ extern void image_release(ImagePointer ptr);
 
 extern char* segment_name(ProcSegment *s);
 
+extern void segment_relocate(ProcSegment *s, uintptr_t newbase, uintptr_t newtop);
+
 extern int segment_userinit(ProcSegment** slot, int text);
 
 extern int segment_global(ProcSegment** slot, SegFlag flags, uintptr_t va, char *name);
diff --git a/sys/src/kern/port/usbehci.c b/sys/src/kern/port/usbehci.c
index 5463194..3b1be86 100644
--- a/sys/src/kern/port/usbehci.c
+++ b/sys/src/kern/port/usbehci.c
@@ -1614,7 +1614,7 @@ portenable(Hci *hp, int port, int on)
 	ctlr = hp->aux;
 	opio = ctlr->opio;
 	s = opio->portsc[port-1];
-	qlock(&ctlr->portlck);
+	eqlock(&ctlr->portlck);
 	if(waserror()){
 		qunlock(&ctlr->portlck);
 		nexterror();
@@ -1675,7 +1675,7 @@ portreset(Hci *hp, int port, int on)
 
 	ctlr = hp->aux;
 	opio = ctlr->opio;
-	qlock(&ctlr->portlck);
+	eqlock(&ctlr->portlck);
 	if(waserror()){
 		iunlock(&ctlr->l);
 		qunlock(&ctlr->portlck);
@@ -1726,7 +1726,7 @@ portstatus(Hci *hp, int port)
 
 	ctlr = hp->aux;
 	opio = ctlr->opio;
-	qlock(&ctlr->portlck);
+	eqlock(&ctlr->portlck);
 	if(waserror()){
 		iunlock(&ctlr->l);
 		qunlock(&ctlr->portlck);
@@ -1951,7 +1951,7 @@ episoread(Ep *ep, Isoio *iso, void *a, int32_t count)
 
 	b = a;
 	ctlr = ep->hp->aux;
-	qlock(&iso->ql);
+	eqlock(&iso->ql);
 	if(waserror()){
 		qunlock(&iso->ql);
 		nexterror();
@@ -2065,7 +2065,7 @@ episowrite(Ep *ep, Isoio *iso, void *a, int32_t count)
 	diprint("ehci: episowrite: %#p ep%d.%d\n", iso, ep->dev->nb, ep->nb);
 
 	ctlr = ep->hp->aux;
-	qlock(&iso->ql);
+	eqlock(&iso->ql);
 	if(waserror()){
 		qunlock(&iso->ql);
 		nexterror();
@@ -2360,7 +2360,7 @@ epio(Ep *ep, Qio *io, void *a, int32_t count, int mustlock)
 		jehanne_print("echi epio: user data: %s\n", buf);
 	}
 	if(mustlock){
-		qlock(&io->ql);
+		eqlock(&io->ql);
 		if(waserror()){
 			qunlock(&io->ql);
 			nexterror();
@@ -2492,7 +2492,7 @@ epread(Ep *ep, void *a, int32_t count)
 	switch(ep->ttype){
 	case Tctl:
 		cio = ep->aux;
-		qlock(&cio->ql);
+		eqlock(&cio->ql);
 		if(waserror()){
 			qunlock(&cio->ql);
 			nexterror();
@@ -2563,7 +2563,7 @@ epctlio(Ep *ep, Ctlio *cio, void *a, int32_t count)
 		cio, ep->dev->nb, ep->nb, count);
 	if(count < Rsetuplen)
 		error("short usb comand");
-	qlock(&cio->ql);
+	eqlock(&cio->ql);
 	jehanne_free(cio->data);
 	cio->data = nil;
 	cio->ndata = 0;
diff --git a/sys/src/kern/port/xalloc.c b/sys/src/kern/port/xalloc.c
new file mode 100644
index 0000000..c97137c
--- /dev/null
+++ b/sys/src/kern/port/xalloc.c
@@ -0,0 +1,271 @@
+#include "u.h"
+#include "../port/lib.h"
+#include "mem.h"
+#include "dat.h"
+#include "fns.h"
+
+enum
+{
+	Nhole		= 128,
+	Magichole	= 0x484F4C45,			/* HOLE */
+};
+
+typedef struct Hole Hole;
+typedef struct Xalloc Xalloc;
+typedef struct Xhdr Xhdr;
+
+struct Hole
+{
+	uintptr_t	addr;
+	uintptr_t	size;
+	uintptr_t	top;
+	Hole*	link;
+};
+
+struct Xhdr
+{
+	uint32_t	size;
+	uint32_t	magix;
+	char	data[];
+};
+
+struct Xalloc
+{
+	Lock;
+	Hole	hole[Nhole];
+	Hole*	flist;
+	Hole*	table;
+};
+
+static Xalloc	xlists;
+
+void
+xinit(void)
+{
+	uint32_t maxpages, kpages, n;
+	uintptr_t size;
+	Confmem *mem;
+	Hole *h, *eh;
+	int i;
+
+	eh = &xlists.hole[Nhole-1];
+	for(h = xlists.hole; h < eh; h++)
+		h->link = h+1;
+
+	xlists.flist = xlists.hole;
+
+	kpages = sys->npages - sys->upages;
+
+	for(i=0; i<nelem(sys->mem); i++){
+		mem = &sys->mem[i];
+		n = mem->npage;
+		if(n > kpages)
+			n = kpages;
+		/* don't try to use non-KADDR-able memory for kernel */
+		maxpages = cankaddr(mem->base)/PGSZ;
+		if(n > maxpages)
+			n = maxpages;
+		size = (uintptr_t)n*PGSZ;
+		/* first give to kernel */
+		if(n > 0){
+			mem->kbase = (uintptr_t)KADDR(mem->base);
+			mem->klimit = (uintptr_t)mem->kbase+size;
+			if(mem->klimit == 0)
+				mem->klimit = (uintptr_t)-PGSZ;
+			xhole(mem->base, mem->klimit - mem->kbase);
+			kpages -= n;
+		}
+		/* if anything left over, give to user */
+		if(n < mem->npage){
+			umem_region(mem->base+size, mem->npage - n);
+		}
+	}
+	xsummary();
+}
+
+void*
+xspanalloc(uint32_t size, int align, uint32_t span)
+{
+	uintptr_t a, v, t;
+
+	a = (uintptr_t)xalloc(size+align+span);
+	if(a == 0)
+		panic("xspanalloc: %lud %d %lux", size, align, span);
+
+	if(span > 2) {
+		v = (a + span) & ~((uintptr_t)span-1);
+		t = v - a;
+		if(t > 0)
+			xhole(PADDR(a), t);
+		t = a + span - v;
+		if(t > 0)
+			xhole(PADDR(v+size+align), t);
+	}
+	else
+		v = a;
+
+	if(align > 1)
+		v = (v + align) & ~((uintptr_t)align-1);
+
+	return (void*)v;
+}
+
+void*
+xallocz(uint32_t size, int zero)
+{
+	Xhdr *p;
+	Hole *h, **l;
+
+	/* add room for magix & size overhead, round up to nearest vlong */
+	size += BY2V + offsetof(Xhdr, data[0]);
+	size &= ~(BY2V-1);
+
+	ilock(&xlists);
+	l = &xlists.table;
+	for(h = *l; h; h = h->link) {
+		if(h->size >= size) {
+			p = (Xhdr*)KADDR(h->addr);
+			h->addr += size;
+			h->size -= size;
+			if(h->size == 0) {
+				*l = h->link;
+				h->link = xlists.flist;
+				xlists.flist = h;
+			}
+			iunlock(&xlists);
+			if(zero)
+				memset(p, 0, size);
+			p->magix = Magichole;
+			p->size = size;
+			return p->data;
+		}
+		l = &h->link;
+	}
+	iunlock(&xlists);
+	return nil;
+}
+
+void*
+xalloc(uint32_t size)
+{
+	return xallocz(size, 1);
+}
+
+void
+xfree(void *p)
+{
+	Xhdr *x;
+
+	x = (Xhdr*)((uintptr_t)p - offsetof(Xhdr, data[0]));
+	if(x->magix != Magichole) {
+		xsummary();
+		panic("xfree(%#p) %#ux != %#lux", p, Magichole, x->magix);
+	}
+	xhole(PADDR((uintptr_t)x), x->size);
+}
+
+int
+xmerge(void *vp, void *vq)
+{
+	Xhdr *p, *q;
+
+	p = (Xhdr*)(((uintptr_t)vp - offsetof(Xhdr, data[0])));
+	q = (Xhdr*)(((uintptr_t)vq - offsetof(Xhdr, data[0])));
+	if(p->magix != Magichole || q->magix != Magichole) {
+		int i;
+		uint32_t *wd;
+		void *badp;
+
+		xsummary();
+		badp = (p->magix != Magichole? p: q);
+		wd = (uint32_t *)badp - 12;
+		for (i = 24; i-- > 0; ) {
+			print("%#p: %lux", wd, *wd);
+			if (wd == badp)
+				print(" <-");
+			print("\n");
+			wd++;
+		}
+		panic("xmerge(%#p, %#p) bad magic %#lux, %#lux",
+			vp, vq, p->magix, q->magix);
+	}
+	if((uint8_t*)p+p->size == (uint8_t*)q) {
+		p->size += q->size;
+		return 1;
+	}
+	return 0;
+}
+
+void
+xhole(uintptr_t addr, uintptr_t size)
+{
+	Hole *h, *c, **l;
+	uintptr_t top;
+
+	if(size == 0)
+		return;
+
+	top = addr + size;
+	ilock(&xlists);
+	l = &xlists.table;
+	for(h = *l; h; h = h->link) {
+		if(h->top == addr) {
+			h->size += size;
+			h->top = h->addr+h->size;
+			c = h->link;
+			if(c && h->top == c->addr) {
+				h->top += c->size;
+				h->size += c->size;
+				h->link = c->link;
+				c->link = xlists.flist;
+				xlists.flist = c;
+			}
+			iunlock(&xlists);
+			return;
+		}
+		if(h->addr > addr)
+			break;
+		l = &h->link;
+	}
+	if(h && top == h->addr) {
+		h->addr -= size;
+		h->size += size;
+		iunlock(&xlists);
+		return;
+	}
+
+	if(xlists.flist == nil) {
+		iunlock(&xlists);
+		print("xfree: no free holes, leaked %llud bytes\n", (uint64_t)size);
+		return;
+	}
+
+	h = xlists.flist;
+	xlists.flist = h->link;
+	h->addr = addr;
+	h->top = top;
+	h->size = size;
+	h->link = *l;
+	*l = h;
+	iunlock(&xlists);
+}
+
+void
+xsummary(void)
+{
+	int i;
+	Hole *h;
+	uintptr_t s;
+
+	i = 0;
+	for(h = xlists.flist; h; h = h->link)
+		i++;
+	print("%d holes free\n", i);
+
+	s = 0;
+	for(h = xlists.table; h; h = h->link) {
+		print("%#8.8p %#8.8p %llud\n", h->addr, h->top, (uint64_t)h->size);
+		s += h->size;
+	}
+	print("%llud bytes free\n", (uint64_t)s);
+}
diff --git a/sys/src/lib/auth/newns.c b/sys/src/lib/auth/newns.c
index 2263420..203ba45 100644
--- a/sys/src/lib/auth/newns.c
+++ b/sys/src/lib/auth/newns.c
@@ -167,9 +167,6 @@ nsop(char *fn, int argc, char *argv[], AuthRpc *rpc)
 	case 'c':
 		flags |= MCREATE;
 		break;
-	case 'C':
-		flags |= MCACHE;
-		break;
 	}ARGEND
 
 	if(!(flags & (MAFTER|MBEFORE)))
diff --git a/sys/src/lib/c/9sys/qlock.c b/sys/src/lib/c/9sys/qlock.c
index 3573132..78d8c70 100644
--- a/sys/src/lib/c/9sys/qlock.c
+++ b/sys/src/lib/c/9sys/qlock.c
@@ -1,7 +1,7 @@
 /*
  * This file is part of Jehanne.
  *
- * Copyright (C) 2016 Giacomo Tesio <giacomo@tesio.it>
+ * Copyright (C) 2016-2017 Giacomo Tesio <giacomo@tesio.it>
  *
  * Jehanne is free software: you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -64,6 +64,7 @@ enum
 };
 
 #if 0
+
 typedef struct RendezvousLog
 {
 	void *tag;
@@ -106,15 +107,21 @@ printdebugrendezvouslogs(void)
 		jehanne_print("[%d] %#p @ %#p rendezvous(%#p, %#p) -> %#p @ %#p\n", logs[i].pid, logs[i].caller, logs[i].start, logs[i].tag, logs[i].addr, logs[i].r, logs[i].end);
 }
 static void*	(*_rendezvousp)(void*, void*) = debugrendezvous;
+
 #else
+
 static void*
 __rendezvous(void* tag, void* val)
 {
 	return rendezvous(tag, val);
 }
 static void*	(*_rendezvousp)(void*, void*) = __rendezvous;
+
 #endif
 
+//# define RENDEZVOUS(...) (*_rendezvousp)(__VA_ARGS__)
+//# define RENDEZVOUS(...) sys_rendezvous(__VA_ARGS__)
+# define RENDEZVOUS(tag, val) __rendezvous(tag, __builtin_return_address(0))
 
 /* this gets called by the thread library ONLY to get us to use its rendezvous */
 void
@@ -168,19 +175,18 @@ jehanne_qlock(QLock *q)
 	jehanne_unlock(&q->lock);
 
 	/* wait */
-	while((*_rendezvousp)(mp, (void*)1) == (void*)~0)
+	while(RENDEZVOUS(mp, (void*)1) == (void*)~0)
 		;
-	if(mp->state != Done){
+	if(!cas(&mp->state, Done, Free)){
 		jehanne_print("mp %#p: state %d pc %#p\n", mp, mp->state, __builtin_return_address(0));
 		abort();
 	}
-	mp->state = Free;
 }
 
 void
 jehanne_qunlock(QLock *q)
 {
-	QLp *p;
+	QLp *p, *tmp;
 
 	jehanne_lock(&q->lock);
 	if (q->locked == 0)
@@ -193,8 +199,9 @@ jehanne_qunlock(QLock *q)
 			jehanne_print("qunlock mp %#p: state %d (should be Timedout) pc %#p\n", p, p->state, (uintptr_t)__builtin_return_address(0));
 			abort();
 		}
+		tmp = p->next;
 		p->state = Free;
-		p = p->next;
+		p = tmp;
 	}
 	if(p != nil){
 		/* wakeup head waiting process */
@@ -206,7 +213,7 @@ jehanne_qunlock(QLock *q)
 		if(q->head == nil)
 			q->tail = nil;
 		jehanne_unlock(&q->lock);
-		while((*_rendezvousp)(p, (void*)0x12345) == (void*)~0)
+		while(RENDEZVOUS(p, (void*)0x12345) == (void*)~0)
 			;
 		return;
 	} else {
@@ -224,16 +231,10 @@ jehanne_qlockt(QLock *q, uint32_t ms)
 	QLp *p, *mp;
 	int64_t wkup;
 
-	/* set up awake to interrupt rendezvous */
-	wkup = awake(ms);
-
-	if(!jehanne_lockt(&q->lock, ms)){
-		jehanne_forgivewkp(wkup);
+	if(!jehanne_lockt(&q->lock, ms))
 		return 0;
-	}
 
 	if(!q->locked){
-		jehanne_forgivewkp(wkup);
 		q->locked = 1;
 		jehanne_unlock(&q->lock);
 		return 1;
@@ -250,8 +251,11 @@ jehanne_qlockt(QLock *q, uint32_t ms)
 
 	jehanne_unlock(&q->lock);
 
+	/* set up awake to interrupt rendezvous */
+	wkup = awake(ms);
+
 	/* wait */
-	while((*_rendezvousp)(mp, (void*)1) == (void*)~0)
+	while(RENDEZVOUS(mp, (void*)1) == (void*)~0)
 		if (jehanne_awakened(wkup)){
 			/* interrupted by awake */
 			if(cas(&mp->state, Queuing, Timedout))
@@ -262,12 +266,14 @@ jehanne_qlockt(QLock *q, uint32_t ms)
 			/* ... otherwise we are going to take the lock
 			 * on the next rendezvous from qunlock
 			 */
+			assert(mp->state == Done);
 		}
 
 	jehanne_forgivewkp(wkup);
-	if(mp->state != Done)
+	if(!cas(&mp->state, Done, Free)){
+		jehanne_print("mp %#p: state %d pc %#p\n", mp, mp->state, __builtin_return_address(0));
 		abort();
-	mp->state = Free;
+	}
 
 	return 1;
 }
@@ -310,11 +316,12 @@ jehanne_rlock(RWLock *q)
 	jehanne_unlock(&q->lock);
 
 	/* wait in kernel */
-	while((*_rendezvousp)(mp, (void*)1) == (void*)~0)
+	while(RENDEZVOUS(mp, (void*)1) == (void*)~0)
 		;
-	if(mp->state != Done)
+	if(!cas(&mp->state, Done, Free)){
+		jehanne_print("mp %#p: state %d pc %#p\n", mp, mp->state, __builtin_return_address(0));
 		abort();
-	mp->state = Free;
+	}
 }
 
 int
@@ -323,17 +330,11 @@ jehanne_rlockt(RWLock *q, uint32_t ms)
 	QLp *p, *mp;
 	int64_t wkup;
 
-	/* set up awake to interrupt rendezvous */
-	wkup = awake(ms);
-
-	if(!jehanne_lockt(&q->lock, ms)) {
-		jehanne_forgivewkp(wkup);
+	if(!jehanne_lockt(&q->lock, ms))
 		return 0;
-	}
 
 	if(q->writer == 0 && q->head == nil){
 		/* no writer, go for it */
-		jehanne_forgivewkp(wkup);
 		q->_readers++;
 		jehanne_unlock(&q->lock);
 		return 1;
@@ -351,8 +352,11 @@ jehanne_rlockt(RWLock *q, uint32_t ms)
 
 	jehanne_unlock(&q->lock);
 
+	/* set up awake to interrupt rendezvous */
+	wkup = awake(ms);
+
 	/* wait in kernel */
-	while((*_rendezvousp)(mp, (void*)1) == (void*)~0)
+	while(RENDEZVOUS(mp, (void*)1) == (void*)~0)
 		if (jehanne_awakened(wkup)){
 			/* interrupted by awake */
 			if(cas(&mp->state, QueuingR, Timedout))
@@ -363,12 +367,14 @@ jehanne_rlockt(RWLock *q, uint32_t ms)
 			/* ... otherwise we are going to take the lock
 			 * on the next rendezvous from wunlock
 			 */
+			assert(mp->state == Done);
 		}
 
 	jehanne_forgivewkp(wkup);
-	if(mp->state != Done)
+	if(!cas(&mp->state, Done, Free)){
+		jehanne_print("mp %#p: state %d pc %#p\n", mp, mp->state, __builtin_return_address(0));
 		abort();
-	mp->state = Free;
+	}
 
 	return 1;
 }
@@ -390,7 +396,7 @@ jehanne_canrlock(RWLock *q)
 void
 jehanne_runlock(RWLock *q)
 {
-	QLp *p;
+	QLp *p, *tmp;
 
 	jehanne_lock(&q->lock);
 	if(q->_readers <= 0)
@@ -412,8 +418,9 @@ runlockWithoutWriters:
 		 */
 		if(p->state != Timedout)
 			abort();
+		tmp = p->next;
 		p->state = Free;
-		p = p->next;
+		p = tmp;
 	}
 	if(p == nil)
 		goto runlockWithoutWriters;
@@ -425,7 +432,7 @@ runlockWithoutWriters:
 	jehanne_unlock(&q->lock);
 
 	/* wakeup waiter */
-	while((*_rendezvousp)(p, 0) == (void*)~0)
+	while(RENDEZVOUS(p, 0) == (void*)~0)
 		;
 }
 
@@ -454,12 +461,13 @@ jehanne_wlock(RWLock *q)
 	jehanne_unlock(&q->lock);
 
 	/* wait in kernel */
-	while((*_rendezvousp)(mp, (void*)1) == (void*)~0)
+	while(RENDEZVOUS(mp, (void*)1) == (void*)~0)
 		;
 
-	if(mp->state != Done)
+	if(!cas(&mp->state, Done, Free)){
+		jehanne_print("mp %#p: state %d pc %#p\n", mp, mp->state, __builtin_return_address(0));
 		abort();
-	mp->state = Free;
+	}
 }
 
 
@@ -469,17 +477,11 @@ jehanne_wlockt(RWLock *q, uint32_t ms)
 	QLp *p, *mp;
 	int64_t wkup;
 
-	/* set up awake to interrupt rendezvous */
-	wkup = awake(ms);
-
-	if(!jehanne_lockt(&q->lock, ms)) {
-		jehanne_forgivewkp(wkup);
+	if(!jehanne_lockt(&q->lock, ms))
 		return 0;
-	}
 
 	if(q->_readers == 0 && q->writer == 0){
 		/* noone waiting, go for it */
-		jehanne_forgivewkp(wkup);
 		q->writer = 1;
 		jehanne_unlock(&q->lock);
 		return 1;
@@ -497,8 +499,11 @@ jehanne_wlockt(RWLock *q, uint32_t ms)
 
 	jehanne_unlock(&q->lock);
 
+	/* set up awake to interrupt rendezvous */
+	wkup = awake(ms);
+
 	/* wait in kernel */
-	while((*_rendezvousp)(mp, (void*)1) == (void*)~0)
+	while(RENDEZVOUS(mp, (void*)1) == (void*)~0)
 		if (jehanne_awakened(wkup)){
 			/* interrupted by awake */
 			if(cas(&mp->state, QueuingW, Timedout))
@@ -509,11 +514,13 @@ jehanne_wlockt(RWLock *q, uint32_t ms)
 			/* ... otherwise we are going to take the lock
 			 * on the next rendezvous from runlock/wunlock
 			 */
+			assert(mp->state == Done);
 		}
 	jehanne_forgivewkp(wkup);
-	if(mp->state != Done)
+	if(!cas(&mp->state, Done, Free)){
+		jehanne_print("mp %#p: state %d pc %#p\n", mp, mp->state, __builtin_return_address(0));
 		abort();
-	mp->state = Free;
+	}
 
 	return 1;
 }
@@ -556,13 +563,14 @@ wakeupPendingWriter:	/* when we jump here, we know p is not nil */
 				if(q->head == nil)
 					q->tail = nil;
 				jehanne_unlock(&q->lock);
-				while((*_rendezvousp)(p, 0) == (void*)~0)
+				while(RENDEZVOUS(p, 0) == (void*)~0)
 					;
 				return;
 			case Timedout:
 				/* R and W have the same fate, once Timedout */
+				tmp = p->next;
 				p->state = Free;
-				p = p->next;
+				p = tmp;
 				break;
 			case QueuingR:
 				/* wakeup pending readers */
@@ -581,18 +589,22 @@ wakeupPendingReaders:	/* when we jump here, we know p is not nil */
 			case QueuingR:
 				q->_readers++;
 				tmp = p->next;
-				while((*_rendezvousp)(p, 0) == (void*)~0)
+				jehanne_unlock(&q->lock);
+				while(RENDEZVOUS(p, 0) == (void*)~0)
 					;
 				/* after the rendezvous, p->state will be set to Free
 				 * from the reader we are going to wakeup, thus p could
 				 * be reused before we are scheduled again: we need tmp
 				 * to keep track of the next QLp to test
 				 */
+				jehanne_lock(&q->lock);
 				p = tmp;
 				break;
 			case Timedout:
+				/* R and W have the same fate, once Timedout */
+				tmp = p->next;
 				p->state = Free;
-				p = p->next;
+				p = tmp;
 				break;
 			case QueuingW:
 				if(q->_readers > 0){
@@ -619,7 +631,7 @@ allPendingReadersStarted:
 void
 jehanne_rsleep(Rendez *r)
 {
-	QLp *t, *me;
+	QLp *t, *me, *tmp;
 
 	if(!r->l)
 		abort();
@@ -645,15 +657,16 @@ jehanne_rsleep(Rendez *r)
 			jehanne_print("rsleep mp %#p: state %d (should be Timedout) pc %#p\n", t, t->state, __builtin_return_address(0));
 			abort();
 		}
+		tmp = t->next;
 		t->state = Free;
-		t = t->next;
+		t = tmp;
 	}
 	if(t != nil){
 		r->l->head = t->next;
 		if(r->l->head == nil)
 			r->l->tail = nil;
 		jehanne_unlock(&r->l->lock);
-		while((*_rendezvousp)(t, (void*)0x12345) == (void*)~0)
+		while(RENDEZVOUS(t, (void*)0x12345) == (void*)~0)
 			;
 	}else{
 		r->l->head = nil;
@@ -663,17 +676,18 @@ jehanne_rsleep(Rendez *r)
 	}
 
 	/* wait for a wakeup */
-	while((*_rendezvousp)(me, (void*)1) == (void*)~0)
+	while(RENDEZVOUS(me, (void*)1) == (void*)~0)
 		;
-	if(me->state != Done)
+	if(!cas(&me->state, Done, Free)){
+		jehanne_print("mp %#p: state %d pc %#p\n", me, me->state, __builtin_return_address(0));
 		abort();
-	me->state = Free;
+	}
 }
 
 int
 jehanne_rsleept(Rendez *r, uint32_t ms)
 {
-	QLp *t, *me;
+	QLp *t, *me, *tmp;
 	int64_t wkup;
 
 	if(!r->l)
@@ -703,8 +717,9 @@ jehanne_rsleept(Rendez *r, uint32_t ms)
 			jehanne_print("rsleept mp %#p: state %d (should be Timedout) pc %#p\n", t, t->state, __builtin_return_address(0));
 			abort();
 		}
+		tmp = t->next;
 		t->state = Free;
-		t = t->next;
+		t = tmp;
 	}
 	if(t != nil){
 		r->l->head = t->next;
@@ -712,7 +727,7 @@ jehanne_rsleept(Rendez *r, uint32_t ms)
 			r->l->tail = nil;
 		jehanne_unlock(&r->l->lock);
 
-		while((*_rendezvousp)(t, (void*)0x12345) == (void*)~0)
+		while(RENDEZVOUS(t, (void*)0x12345) == (void*)~0)
 			;
 	}else{
 		r->l->head = nil;
@@ -725,7 +740,7 @@ jehanne_rsleept(Rendez *r, uint32_t ms)
 	wkup = awake(ms);
 
 	/* wait for a rwakeup (or a timeout) */
-	while((*_rendezvousp)(me, (void*)1) == (void*)~0)
+	while(RENDEZVOUS(me, (void*)1) == (void*)~0)
 		if (jehanne_awakened(wkup)){
 			if(cas(&me->state, Sleeping, Timedout)){
 				/* if we can atomically mark the QLp
@@ -737,12 +752,14 @@ jehanne_rsleept(Rendez *r, uint32_t ms)
 			/* ... otherwise we are going to take the lock
 			 * on the next rendezvous from rwakeup
 			 */
+			assert(me->state == Done);
 		}
 
 	jehanne_forgivewkp(wkup);
-	if(me->state != Done)
+	if(!cas(&me->state, Done, Free)){
+		jehanne_print("mp %#p: state %d pc %#p\n", me, me->state, __builtin_return_address(0));
 		abort();
-	me->state = Free;
+	}
 
 	return 1;
 }
@@ -750,7 +767,7 @@ jehanne_rsleept(Rendez *r, uint32_t ms)
 int
 jehanne_rwakeup(Rendez *r)
 {
-	QLp *t;
+	QLp *t, *tmp;
 
 	/*
 	 * take off wait and put on front of queue
@@ -763,18 +780,18 @@ jehanne_rwakeup(Rendez *r)
 	if(!r->l->locked)
 		abort();
 
-	if(r->head && r->head->state == Free)
-		r->head = nil;
-
 	t = r->head;
+	if(t != nil && t->state == Free)
+		abort();
 
 	while(t != nil && !cas(&t->state, Sleeping, Queuing)){
 		if(t->state != Timedout){
 			jehanne_print("rwakeup mp %#p: state %d (should be Timedout) pc %#p\n", t, t->state, __builtin_return_address(0));
 			abort();
 		}
+		tmp = t->next;
 		t->state = Free;
-		t = t->next;
+		t = tmp;
 	}
 	if(t == nil){
 		r->head = nil;
diff --git a/sys/src/lib/c/amd64/setjmp.s b/sys/src/lib/c/amd64/setjmp.s
index 0fe27fb..c0a73a2 100644
--- a/sys/src/lib/c/amd64/setjmp.s
+++ b/sys/src/lib/c/amd64/setjmp.s
@@ -6,10 +6,8 @@ jehanne_longjmp:
 	movq	0(%r9), %rbx
 	movq	8(%r9), %r12
 	movq	16(%r9), %r13
-/*					Do not touch m-> and up->
 	movq	24(%r9), %r14
 	movq	32(%r9), %r15
- */
 	movq	40(%r9), %rbp
 	movq	48(%r9), %rsp
 	movl	%esi, %eax
@@ -29,10 +27,8 @@ jehanne_setjmp:
 	movq	%rbx, 0(%rdi)
 	movq	%r12, 8(%rdi)
 	movq	%r13, 16(%rdi)
-/*					Do not touch m-> and up->
 	movq	%r14, 24(%rdi)
 	movq	%r15, 32(%rdi)
- */
 	movq	%rbp, 40(%rdi)
 	popq	%rdx			/* return address */
 	movq	%rsp, 48(%rdi)
diff --git a/sys/src/lib/memdraw/draw.c b/sys/src/lib/memdraw/draw.c
index 1f5cd4b..d129ead 100644
--- a/sys/src/lib/memdraw/draw.c
+++ b/sys/src/lib/memdraw/draw.c
@@ -51,16 +51,15 @@ Memimage *memopaque;
 
 int	_ifmt(Fmt*);
 
-void
+int
 memimageinit(void)
 {
 	static int didinit = 0;
 
 	if(didinit)
-		return;
-
-	didinit = 1;
+		return 0;
 
+	if(imagmem != nil)
 	if(jehanne_strcmp(imagmem->name, "Image") == 0 || jehanne_strcmp(imagmem->name, "image") == 0)
 		imagmem->move = memimagemove;
 
@@ -72,22 +71,25 @@ memimageinit(void)
 	jehanne_fmtinstall('b', _ifmt);
 
 	memones = allocmemimage(Rect(0,0,1,1), GREY1);
+	memzeros = allocmemimage(Rect(0,0,1,1), GREY1);
+	if(memones == nil || memzeros == nil)
+		return -1;
+
 	memones->flags |= Frepl;
 	memones->clipr = Rect(-0x3FFFFFF, -0x3FFFFFF, 0x3FFFFFF, 0x3FFFFFF);
 	*byteaddr(memones, ZP) = ~0;
 
-	memzeros = allocmemimage(Rect(0,0,1,1), GREY1);
 	memzeros->flags |= Frepl;
 	memzeros->clipr = Rect(-0x3FFFFFF, -0x3FFFFFF, 0x3FFFFFF, 0x3FFFFFF);
 	*byteaddr(memzeros, ZP) = 0;
 
-	if(memones == nil || memzeros == nil)
-		assert(0 /*cannot initialize memimage library */);	/* RSC BUG */
-
 	memwhite = memones;
 	memblack = memzeros;
 	memopaque = memones;
 	memtransparent = memzeros;
+
+	didinit = 1;
+	return 0;
 }
 
 static uint32_t imgtorgba(Memimage*, uint32_t);